Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
Macros
r500_reg.h File Reference

Go to the source code of this file.

Macros

#define R300_GA_POLY_MODE   0x4288
 
#define R300_FRONT_PTYPE_POINT   (0 << 4)
 
#define R300_FRONT_PTYPE_LINE   (1 << 4)
 
#define R300_FRONT_PTYPE_TRIANGE   (2 << 4)
 
#define R300_BACK_PTYPE_POINT   (0 << 7)
 
#define R300_BACK_PTYPE_LINE   (1 << 7)
 
#define R300_BACK_PTYPE_TRIANGE   (2 << 7)
 
#define R300_GA_ROUND_MODE   0x428c
 
#define R300_GEOMETRY_ROUND_TRUNC   (0 << 0)
 
#define R300_GEOMETRY_ROUND_NEAREST   (1 << 0)
 
#define R300_COLOR_ROUND_TRUNC   (0 << 2)
 
#define R300_COLOR_ROUND_NEAREST   (1 << 2)
 
#define R300_GB_MSPOS0   0x4010
 
#define R300_MS_X0_SHIFT   0
 
#define R300_MS_Y0_SHIFT   4
 
#define R300_MS_X1_SHIFT   8
 
#define R300_MS_Y1_SHIFT   12
 
#define R300_MS_X2_SHIFT   16
 
#define R300_MS_Y2_SHIFT   20
 
#define R300_MSBD0_Y_SHIFT   24
 
#define R300_MSBD0_X_SHIFT   28
 
#define R300_GB_MSPOS1   0x4014
 
#define R300_MS_X3_SHIFT   0
 
#define R300_MS_Y3_SHIFT   4
 
#define R300_MS_X4_SHIFT   8
 
#define R300_MS_Y4_SHIFT   12
 
#define R300_MS_X5_SHIFT   16
 
#define R300_MS_Y5_SHIFT   20
 
#define R300_MSBD1_SHIFT   24
 
#define R300_GA_ENHANCE   0x4274
 
#define R300_GA_DEADLOCK_CNTL   (1 << 0)
 
#define R300_GA_FASTSYNC_CNTL   (1 << 1)
 
#define R300_RB3D_DSTCACHE_CTLSTAT   0x4e4c
 
#define R300_RB3D_DC_FLUSH   (2 << 0)
 
#define R300_RB3D_DC_FREE   (2 << 2)
 
#define R300_RB3D_DC_FINISH   (1 << 4)
 
#define R300_RB3D_ZCACHE_CTLSTAT   0x4f18
 
#define R300_ZC_FLUSH   (1 << 0)
 
#define R300_ZC_FREE   (1 << 1)
 
#define R300_ZC_FLUSH_ALL   0x3
 
#define R400_GB_PIPE_SELECT   0x402c
 
#define R500_DYN_SCLK_PWMEM_PIPE   0x000d /* PLL */
 
#define R500_SU_REG_DEST   0x42c8
 
#define R300_GB_TILE_CONFIG   0x4018
 
#define R300_ENABLE_TILING   (1 << 0)
 
#define R300_PIPE_COUNT_RV350   (0 << 1)
 
#define R300_PIPE_COUNT_R300   (3 << 1)
 
#define R300_PIPE_COUNT_R420_3P   (6 << 1)
 
#define R300_PIPE_COUNT_R420   (7 << 1)
 
#define R300_TILE_SIZE_8   (0 << 4)
 
#define R300_TILE_SIZE_16   (1 << 4)
 
#define R300_TILE_SIZE_32   (2 << 4)
 
#define R300_SUBPIXEL_1_12   (0 << 16)
 
#define R300_SUBPIXEL_1_16   (1 << 16)
 
#define R300_DST_PIPE_CONFIG   0x170c
 
#define R300_PIPE_AUTO_CONFIG   (1 << 31)
 
#define R300_RB2D_DSTCACHE_MODE   0x3428
 
#define R300_DC_AUTOFLUSH_ENABLE   (1 << 8)
 
#define R300_DC_DC_DISABLE_IGNORE_PE   (1 << 17)
 
#define RADEON_CP_STAT   0x7C0
 
#define RADEON_RBBM_CMDFIFO_ADDR   0xE70
 
#define RADEON_RBBM_CMDFIFO_DATA   0xE74
 
#define RADEON_ISYNC_CNTL   0x1724
 
#define RADEON_ISYNC_ANY2D_IDLE3D   (1 << 0)
 
#define RADEON_ISYNC_ANY3D_IDLE2D   (1 << 1)
 
#define RADEON_ISYNC_TRIG2D_IDLE3D   (1 << 2)
 
#define RADEON_ISYNC_TRIG3D_IDLE2D   (1 << 3)
 
#define RADEON_ISYNC_WAIT_IDLEGUI   (1 << 4)
 
#define RADEON_ISYNC_CPSCRATCH_IDLEGUI   (1 << 5)
 
#define RS480_NB_MC_INDEX   0x168
 
#define RS480_NB_MC_IND_WR_EN   (1 << 8)
 
#define RS480_NB_MC_DATA   0x16c
 
#define RS690_MCCFG_FB_LOCATION   0x100
 
#define RS690_MC_FB_START_MASK   0x0000FFFF
 
#define RS690_MC_FB_START_SHIFT   0
 
#define RS690_MC_FB_TOP_MASK   0xFFFF0000
 
#define RS690_MC_FB_TOP_SHIFT   16
 
#define RS690_MCCFG_AGP_LOCATION   0x101
 
#define RS690_MC_AGP_START_MASK   0x0000FFFF
 
#define RS690_MC_AGP_START_SHIFT   0
 
#define RS690_MC_AGP_TOP_MASK   0xFFFF0000
 
#define RS690_MC_AGP_TOP_SHIFT   16
 
#define RS690_MCCFG_AGP_BASE   0x102
 
#define RS690_MCCFG_AGP_BASE_2   0x103
 
#define RS690_MC_INIT_MISC_LAT_TIMER   0x104
 
#define RS690_HDP_FB_LOCATION   0x0134
 
#define RS690_MC_INDEX   0x78
 
#define RS690_MC_INDEX_MASK   0x1ff
 
#define RS690_MC_INDEX_WR_EN   (1 << 9)
 
#define RS690_MC_INDEX_WR_ACK   0x7f
 
#define RS690_MC_DATA   0x7c
 
#define RS690_MC_STATUS   0x90
 
#define RS690_MC_STATUS_IDLE   (1 << 0)
 
#define RS480_AGP_BASE_2   0x0164
 
#define RS480_MC_MISC_CNTL   0x18
 
#define RS480_DISABLE_GTW   (1 << 1)
 
#define RS480_GART_INDEX_REG_EN   (1 << 12)
 
#define RS690_BLOCK_GFX_D3_EN   (1 << 14)
 
#define RS480_GART_FEATURE_ID   0x2b
 
#define RS480_HANG_EN   (1 << 11)
 
#define RS480_TLB_ENABLE   (1 << 18)
 
#define RS480_P2P_ENABLE   (1 << 19)
 
#define RS480_GTW_LAC_EN   (1 << 25)
 
#define RS480_2LEVEL_GART   (0 << 30)
 
#define RS480_1LEVEL_GART   (1 << 30)
 
#define RS480_PDC_EN   (1 << 31)
 
#define RS480_GART_BASE   0x2c
 
#define RS480_GART_CACHE_CNTRL   0x2e
 
#define RS480_GART_CACHE_INVALIDATE   (1 << 0) /* wait for it to clear */
 
#define RS480_AGP_ADDRESS_SPACE_SIZE   0x38
 
#define RS480_GART_EN   (1 << 0)
 
#define RS480_VA_SIZE_32MB   (0 << 1)
 
#define RS480_VA_SIZE_64MB   (1 << 1)
 
#define RS480_VA_SIZE_128MB   (2 << 1)
 
#define RS480_VA_SIZE_256MB   (3 << 1)
 
#define RS480_VA_SIZE_512MB   (4 << 1)
 
#define RS480_VA_SIZE_1GB   (5 << 1)
 
#define RS480_VA_SIZE_2GB   (6 << 1)
 
#define RS480_AGP_MODE_CNTL   0x39
 
#define RS480_POST_GART_Q_SIZE   (1 << 18)
 
#define RS480_NONGART_SNOOP   (1 << 19)
 
#define RS480_AGP_RD_BUF_SIZE   (1 << 20)
 
#define RS480_REQ_TYPE_SNOOP_SHIFT   22
 
#define RS480_REQ_TYPE_SNOOP_MASK   0x3
 
#define RS480_REQ_TYPE_SNOOP_DIS   (1 << 24)
 
#define RS690_AIC_CTRL_SCRATCH   0x3A
 
#define RS690_DIS_OUT_OF_PCI_GART_ACCESS   (1 << 1)
 
#define RS600_MC_STATUS   0x0
 
#define RS600_MC_STATUS_IDLE   (1 << 0)
 
#define RS600_MC_INDEX   0x70
 
#define RS600_MC_ADDR_MASK   0xffff
 
#define RS600_MC_IND_SEQ_RBS_0   (1 << 16)
 
#define RS600_MC_IND_SEQ_RBS_1   (1 << 17)
 
#define RS600_MC_IND_SEQ_RBS_2   (1 << 18)
 
#define RS600_MC_IND_SEQ_RBS_3   (1 << 19)
 
#define RS600_MC_IND_AIC_RBS   (1 << 20)
 
#define RS600_MC_IND_CITF_ARB0   (1 << 21)
 
#define RS600_MC_IND_CITF_ARB1   (1 << 22)
 
#define RS600_MC_IND_WR_EN   (1 << 23)
 
#define RS600_MC_DATA   0x74
 
#define RS600_MC_STATUS   0x0
 
#define RS600_MC_IDLE   (1 << 1)
 
#define RS600_MC_FB_LOCATION   0x4
 
#define RS600_MC_FB_START_MASK   0x0000FFFF
 
#define RS600_MC_FB_START_SHIFT   0
 
#define RS600_MC_FB_TOP_MASK   0xFFFF0000
 
#define RS600_MC_FB_TOP_SHIFT   16
 
#define RS600_MC_AGP_LOCATION   0x5
 
#define RS600_MC_AGP_START_MASK   0x0000FFFF
 
#define RS600_MC_AGP_START_SHIFT   0
 
#define RS600_MC_AGP_TOP_MASK   0xFFFF0000
 
#define RS600_MC_AGP_TOP_SHIFT   16
 
#define RS600_MC_AGP_BASE   0x6
 
#define RS600_MC_AGP_BASE_2   0x7
 
#define RS600_MC_CNTL1   0x9
 
#define RS600_ENABLE_PAGE_TABLES   (1 << 26)
 
#define RS600_MC_PT0_CNTL   0x100
 
#define RS600_ENABLE_PT   (1 << 0)
 
#define RS600_EFFECTIVE_L2_CACHE_SIZE(x)   ((x) << 15)
 
#define RS600_EFFECTIVE_L2_QUEUE_SIZE(x)   ((x) << 21)
 
#define RS600_INVALIDATE_ALL_L1_TLBS   (1 << 28)
 
#define RS600_INVALIDATE_L2_CACHE   (1 << 29)
 
#define RS600_MC_PT0_CONTEXT0_CNTL   0x102
 
#define RS600_ENABLE_PAGE_TABLE   (1 << 0)
 
#define RS600_PAGE_TABLE_TYPE_FLAT   (0 << 1)
 
#define RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR   0x112
 
#define RS600_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR   0x114
 
#define RS600_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR   0x11c
 
#define RS600_MC_PT0_CONTEXT0_FLAT_BASE_ADDR   0x12c
 
#define RS600_MC_PT0_CONTEXT0_FLAT_START_ADDR   0x13c
 
#define RS600_MC_PT0_CONTEXT0_FLAT_END_ADDR   0x14c
 
#define RS600_MC_PT0_CLIENT0_CNTL   0x16c
 
#define RS600_ENABLE_TRANSLATION_MODE_OVERRIDE   (1 << 0)
 
#define RS600_TRANSLATION_MODE_OVERRIDE   (1 << 1)
 
#define RS600_SYSTEM_ACCESS_MODE_MASK   (3 << 8)
 
#define RS600_SYSTEM_ACCESS_MODE_PA_ONLY   (0 << 8)
 
#define RS600_SYSTEM_ACCESS_MODE_USE_SYS_MAP   (1 << 8)
 
#define RS600_SYSTEM_ACCESS_MODE_IN_SYS   (2 << 8)
 
#define RS600_SYSTEM_ACCESS_MODE_NOT_IN_SYS   (3 << 8)
 
#define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASSTHROUGH   (0 << 10)
 
#define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_DEFAULT_PAGE   (1 << 10)
 
#define RS600_EFFECTIVE_L1_CACHE_SIZE(x)   ((x) << 11)
 
#define RS600_ENABLE_FRAGMENT_PROCESSING   (1 << 14)
 
#define RS600_EFFECTIVE_L1_QUEUE_SIZE(x)   ((x) << 15)
 
#define RS600_INVALIDATE_L1_TLB   (1 << 20)
 
#define RS600_BUS_MASTER_DIS   (1 << 14)
 
#define RS600_MSI_REARM   (1 << 20)
 
#define RV515_MC_FB_LOCATION   0x01
 
#define RV515_MC_FB_START_MASK   0x0000FFFF
 
#define RV515_MC_FB_START_SHIFT   0
 
#define RV515_MC_FB_TOP_MASK   0xFFFF0000
 
#define RV515_MC_FB_TOP_SHIFT   16
 
#define RV515_MC_AGP_LOCATION   0x02
 
#define RV515_MC_AGP_START_MASK   0x0000FFFF
 
#define RV515_MC_AGP_START_SHIFT   0
 
#define RV515_MC_AGP_TOP_MASK   0xFFFF0000
 
#define RV515_MC_AGP_TOP_SHIFT   16
 
#define RV515_MC_AGP_BASE   0x03
 
#define RV515_MC_AGP_BASE_2   0x04
 
#define R520_MC_FB_LOCATION   0x04
 
#define R520_MC_FB_START_MASK   0x0000FFFF
 
#define R520_MC_FB_START_SHIFT   0
 
#define R520_MC_FB_TOP_MASK   0xFFFF0000
 
#define R520_MC_FB_TOP_SHIFT   16
 
#define R520_MC_AGP_LOCATION   0x05
 
#define R520_MC_AGP_START_MASK   0x0000FFFF
 
#define R520_MC_AGP_START_SHIFT   0
 
#define R520_MC_AGP_TOP_MASK   0xFFFF0000
 
#define R520_MC_AGP_TOP_SHIFT   16
 
#define R520_MC_AGP_BASE   0x06
 
#define R520_MC_AGP_BASE_2   0x07
 
#define AVIVO_MC_INDEX   0x0070
 
#define R520_MC_STATUS   0x00
 
#define R520_MC_STATUS_IDLE   (1<<1)
 
#define RV515_MC_STATUS   0x08
 
#define RV515_MC_STATUS_IDLE   (1<<4)
 
#define RV515_MC_INIT_MISC_LAT_TIMER   0x09
 
#define AVIVO_MC_DATA   0x0074
 
#define R520_MC_IND_INDEX   0x70
 
#define R520_MC_IND_WR_EN   (1 << 24)
 
#define R520_MC_IND_DATA   0x74
 
#define RV515_MC_CNTL   0x5
 
#define RV515_MEM_NUM_CHANNELS_MASK   0x3
 
#define R520_MC_CNTL0   0x8
 
#define R520_MEM_NUM_CHANNELS_MASK   (0x3 << 24)
 
#define R520_MEM_NUM_CHANNELS_SHIFT   24
 
#define R520_MC_CHANNEL_SIZE   (1 << 23)
 
#define AVIVO_CP_DYN_CNTL   0x000f /* PLL */
 
#define AVIVO_CP_FORCEON   (1 << 0)
 
#define AVIVO_E2_DYN_CNTL   0x0011 /* PLL */
 
#define AVIVO_E2_FORCEON   (1 << 0)
 
#define AVIVO_IDCT_DYN_CNTL   0x0013 /* PLL */
 
#define AVIVO_IDCT_FORCEON   (1 << 0)
 
#define AVIVO_HDP_FB_LOCATION   0x134
 
#define AVIVO_VGA_RENDER_CONTROL   0x0300
 
#define AVIVO_VGA_VSTATUS_CNTL_MASK   (3 << 16)
 
#define AVIVO_D1VGA_CONTROL   0x0330
 
#define AVIVO_DVGA_CONTROL_MODE_ENABLE   (1<<0)
 
#define AVIVO_DVGA_CONTROL_TIMING_SELECT   (1<<8)
 
#define AVIVO_DVGA_CONTROL_SYNC_POLARITY_SELECT   (1<<9)
 
#define AVIVO_DVGA_CONTROL_OVERSCAN_TIMING_SELECT   (1<<10)
 
#define AVIVO_DVGA_CONTROL_OVERSCAN_COLOR_EN   (1<<16)
 
#define AVIVO_DVGA_CONTROL_ROTATE   (1<<24)
 
#define AVIVO_D2VGA_CONTROL   0x0338
 
#define AVIVO_EXT1_PPLL_REF_DIV_SRC   0x400
 
#define AVIVO_EXT1_PPLL_REF_DIV   0x404
 
#define AVIVO_EXT1_PPLL_UPDATE_LOCK   0x408
 
#define AVIVO_EXT1_PPLL_UPDATE_CNTL   0x40c
 
#define AVIVO_EXT2_PPLL_REF_DIV_SRC   0x410
 
#define AVIVO_EXT2_PPLL_REF_DIV   0x414
 
#define AVIVO_EXT2_PPLL_UPDATE_LOCK   0x418
 
#define AVIVO_EXT2_PPLL_UPDATE_CNTL   0x41c
 
#define AVIVO_EXT1_PPLL_FB_DIV   0x430
 
#define AVIVO_EXT2_PPLL_FB_DIV   0x434
 
#define AVIVO_EXT1_PPLL_POST_DIV_SRC   0x438
 
#define AVIVO_EXT1_PPLL_POST_DIV   0x43c
 
#define AVIVO_EXT2_PPLL_POST_DIV_SRC   0x440
 
#define AVIVO_EXT2_PPLL_POST_DIV   0x444
 
#define AVIVO_EXT1_PPLL_CNTL   0x448
 
#define AVIVO_EXT2_PPLL_CNTL   0x44c
 
#define AVIVO_P1PLL_CNTL   0x450
 
#define AVIVO_P2PLL_CNTL   0x454
 
#define AVIVO_P1PLL_INT_SS_CNTL   0x458
 
#define AVIVO_P2PLL_INT_SS_CNTL   0x45c
 
#define AVIVO_P1PLL_TMDSA_CNTL   0x460
 
#define AVIVO_P2PLL_LVTMA_CNTL   0x464
 
#define AVIVO_PCLK_CRTC1_CNTL   0x480
 
#define AVIVO_PCLK_CRTC2_CNTL   0x484
 
#define AVIVO_D1CRTC_H_TOTAL   0x6000
 
#define AVIVO_D1CRTC_H_BLANK_START_END   0x6004
 
#define AVIVO_D1CRTC_H_SYNC_A   0x6008
 
#define AVIVO_D1CRTC_H_SYNC_A_CNTL   0x600c
 
#define AVIVO_D1CRTC_H_SYNC_B   0x6010
 
#define AVIVO_D1CRTC_H_SYNC_B_CNTL   0x6014
 
#define AVIVO_D1CRTC_V_TOTAL   0x6020
 
#define AVIVO_D1CRTC_V_BLANK_START_END   0x6024
 
#define AVIVO_D1CRTC_V_SYNC_A   0x6028
 
#define AVIVO_D1CRTC_V_SYNC_A_CNTL   0x602c
 
#define AVIVO_D1CRTC_V_SYNC_B   0x6030
 
#define AVIVO_D1CRTC_V_SYNC_B_CNTL   0x6034
 
#define AVIVO_D1CRTC_CONTROL   0x6080
 
#define AVIVO_CRTC_EN   (1 << 0)
 
#define AVIVO_CRTC_DISP_READ_REQUEST_DISABLE   (1 << 24)
 
#define AVIVO_D1CRTC_BLANK_CONTROL   0x6084
 
#define AVIVO_D1CRTC_INTERLACE_CONTROL   0x6088
 
#define AVIVO_D1CRTC_INTERLACE_STATUS   0x608c
 
#define AVIVO_D1CRTC_STATUS   0x609c
 
#define AVIVO_D1CRTC_V_BLANK   (1 << 0)
 
#define AVIVO_D1CRTC_STATUS_POSITION   0x60a0
 
#define AVIVO_D1CRTC_FRAME_COUNT   0x60a4
 
#define AVIVO_D1CRTC_STEREO_CONTROL   0x60c4
 
#define AVIVO_D1MODE_MASTER_UPDATE_MODE   0x60e4
 
#define AVIVO_DC_CRTC_MASTER_EN   0x60f8
 
#define AVIVO_DC_CRTC_TV_CONTROL   0x60fc
 
#define AVIVO_D1GRPH_ENABLE   0x6100
 
#define AVIVO_D1GRPH_CONTROL   0x6104
 
#define AVIVO_D1GRPH_CONTROL_DEPTH_8BPP   (0 << 0)
 
#define AVIVO_D1GRPH_CONTROL_DEPTH_16BPP   (1 << 0)
 
#define AVIVO_D1GRPH_CONTROL_DEPTH_32BPP   (2 << 0)
 
#define AVIVO_D1GRPH_CONTROL_DEPTH_64BPP   (3 << 0)
 
#define AVIVO_D1GRPH_CONTROL_8BPP_INDEXED   (0 << 8)
 
#define AVIVO_D1GRPH_CONTROL_16BPP_ARGB1555   (0 << 8)
 
#define AVIVO_D1GRPH_CONTROL_16BPP_RGB565   (1 << 8)
 
#define AVIVO_D1GRPH_CONTROL_16BPP_ARGB4444   (2 << 8)
 
#define AVIVO_D1GRPH_CONTROL_16BPP_AI88   (3 << 8)
 
#define AVIVO_D1GRPH_CONTROL_16BPP_MONO16   (4 << 8)
 
#define AVIVO_D1GRPH_CONTROL_32BPP_ARGB8888   (0 << 8)
 
#define AVIVO_D1GRPH_CONTROL_32BPP_ARGB2101010   (1 << 8)
 
#define AVIVO_D1GRPH_CONTROL_32BPP_DIGITAL   (2 << 8)
 
#define AVIVO_D1GRPH_CONTROL_32BPP_8B_ARGB2101010   (3 << 8)
 
#define AVIVO_D1GRPH_CONTROL_64BPP_ARGB16161616   (0 << 8)
 
#define AVIVO_D1GRPH_SWAP_RB   (1 << 16)
 
#define AVIVO_D1GRPH_TILED   (1 << 20)
 
#define AVIVO_D1GRPH_MACRO_ADDRESS_MODE   (1 << 21)
 
#define R600_D1GRPH_ARRAY_MODE_LINEAR_GENERAL   (0 << 20)
 
#define R600_D1GRPH_ARRAY_MODE_LINEAR_ALIGNED   (1 << 20)
 
#define R600_D1GRPH_ARRAY_MODE_1D_TILED_THIN1   (2 << 20)
 
#define R600_D1GRPH_ARRAY_MODE_2D_TILED_THIN1   (4 << 20)
 
#define AVIVO_D1GRPH_LUT_SEL   0x6108
 
#define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS   0x6110
 
#define R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH   0x6914
 
#define R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH   0x6114
 
#define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS   0x6118
 
#define R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH   0x691c
 
#define R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH   0x611c
 
#define AVIVO_D1GRPH_PITCH   0x6120
 
#define AVIVO_D1GRPH_SURFACE_OFFSET_X   0x6124
 
#define AVIVO_D1GRPH_SURFACE_OFFSET_Y   0x6128
 
#define AVIVO_D1GRPH_X_START   0x612c
 
#define AVIVO_D1GRPH_Y_START   0x6130
 
#define AVIVO_D1GRPH_X_END   0x6134
 
#define AVIVO_D1GRPH_Y_END   0x6138
 
#define AVIVO_D1GRPH_UPDATE   0x6144
 
#define AVIVO_D1GRPH_SURFACE_UPDATE_PENDING   (1 << 2)
 
#define AVIVO_D1GRPH_UPDATE_LOCK   (1 << 16)
 
#define AVIVO_D1GRPH_FLIP_CONTROL   0x6148
 
#define AVIVO_D1GRPH_SURFACE_UPDATE_H_RETRACE_EN   (1 << 0)
 
#define AVIVO_D1CUR_CONTROL   0x6400
 
#define AVIVO_D1CURSOR_EN   (1 << 0)
 
#define AVIVO_D1CURSOR_MODE_SHIFT   8
 
#define AVIVO_D1CURSOR_MODE_MASK   (3 << 8)
 
#define AVIVO_D1CURSOR_MODE_24BPP   2
 
#define AVIVO_D1CUR_SURFACE_ADDRESS   0x6408
 
#define R700_D1CUR_SURFACE_ADDRESS_HIGH   0x6c0c
 
#define R700_D2CUR_SURFACE_ADDRESS_HIGH   0x640c
 
#define AVIVO_D1CUR_SIZE   0x6410
 
#define AVIVO_D1CUR_POSITION   0x6414
 
#define AVIVO_D1CUR_HOT_SPOT   0x6418
 
#define AVIVO_D1CUR_UPDATE   0x6424
 
#define AVIVO_D1CURSOR_UPDATE_LOCK   (1 << 16)
 
#define AVIVO_DC_LUT_RW_SELECT   0x6480
 
#define AVIVO_DC_LUT_RW_MODE   0x6484
 
#define AVIVO_DC_LUT_RW_INDEX   0x6488
 
#define AVIVO_DC_LUT_SEQ_COLOR   0x648c
 
#define AVIVO_DC_LUT_PWL_DATA   0x6490
 
#define AVIVO_DC_LUT_30_COLOR   0x6494
 
#define AVIVO_DC_LUT_READ_PIPE_SELECT   0x6498
 
#define AVIVO_DC_LUT_WRITE_EN_MASK   0x649c
 
#define AVIVO_DC_LUT_AUTOFILL   0x64a0
 
#define AVIVO_DC_LUTA_CONTROL   0x64c0
 
#define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE   0x64c4
 
#define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN   0x64c8
 
#define AVIVO_DC_LUTA_BLACK_OFFSET_RED   0x64cc
 
#define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE   0x64d0
 
#define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN   0x64d4
 
#define AVIVO_DC_LUTA_WHITE_OFFSET_RED   0x64d8
 
#define AVIVO_DC_LB_MEMORY_SPLIT   0x6520
 
#define AVIVO_DC_LB_MEMORY_SPLIT_MASK   0x3
 
#define AVIVO_DC_LB_MEMORY_SPLIT_SHIFT   0
 
#define AVIVO_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF   0
 
#define AVIVO_DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q   1
 
#define AVIVO_DC_LB_MEMORY_SPLIT_D1_ONLY   2
 
#define AVIVO_DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q   3
 
#define AVIVO_DC_LB_MEMORY_SPLIT_SHIFT_MODE   (1 << 2)
 
#define AVIVO_DC_LB_DISP1_END_ADR_SHIFT   4
 
#define AVIVO_DC_LB_DISP1_END_ADR_MASK   0x7ff
 
#define AVIVO_D1MODE_DATA_FORMAT   0x6528
 
#define AVIVO_D1MODE_INTERLEAVE_EN   (1 << 0)
 
#define AVIVO_D1MODE_DESKTOP_HEIGHT   0x652C
 
#define AVIVO_D1MODE_VBLANK_STATUS   0x6534
 
#define AVIVO_VBLANK_ACK   (1 << 4)
 
#define AVIVO_D1MODE_VLINE_START_END   0x6538
 
#define AVIVO_D1MODE_VLINE_STATUS   0x653c
 
#define AVIVO_D1MODE_VLINE_STAT   (1 << 12)
 
#define AVIVO_DxMODE_INT_MASK   0x6540
 
#define AVIVO_D1MODE_INT_MASK   (1 << 0)
 
#define AVIVO_D2MODE_INT_MASK   (1 << 8)
 
#define AVIVO_D1MODE_VIEWPORT_START   0x6580
 
#define AVIVO_D1MODE_VIEWPORT_SIZE   0x6584
 
#define AVIVO_D1MODE_EXT_OVERSCAN_LEFT_RIGHT   0x6588
 
#define AVIVO_D1MODE_EXT_OVERSCAN_TOP_BOTTOM   0x658c
 
#define AVIVO_D1SCL_SCALER_ENABLE   0x6590
 
#define AVIVO_D1SCL_SCALER_TAP_CONTROL   0x6594
 
#define AVIVO_D1SCL_UPDATE   0x65cc
 
#define AVIVO_D1SCL_UPDATE_LOCK   (1 << 16)
 
#define AVIVO_D2CRTC_H_TOTAL   0x6800
 
#define AVIVO_D2CRTC_H_BLANK_START_END   0x6804
 
#define AVIVO_D2CRTC_H_SYNC_A   0x6808
 
#define AVIVO_D2CRTC_H_SYNC_A_CNTL   0x680c
 
#define AVIVO_D2CRTC_H_SYNC_B   0x6810
 
#define AVIVO_D2CRTC_H_SYNC_B_CNTL   0x6814
 
#define AVIVO_D2CRTC_V_TOTAL   0x6820
 
#define AVIVO_D2CRTC_V_BLANK_START_END   0x6824
 
#define AVIVO_D2CRTC_V_SYNC_A   0x6828
 
#define AVIVO_D2CRTC_V_SYNC_A_CNTL   0x682c
 
#define AVIVO_D2CRTC_V_SYNC_B   0x6830
 
#define AVIVO_D2CRTC_V_SYNC_B_CNTL   0x6834
 
#define AVIVO_D2CRTC_CONTROL   0x6880
 
#define AVIVO_D2CRTC_BLANK_CONTROL   0x6884
 
#define AVIVO_D2CRTC_INTERLACE_CONTROL   0x6888
 
#define AVIVO_D2CRTC_INTERLACE_STATUS   0x688c
 
#define AVIVO_D2CRTC_STATUS_POSITION   0x68a0
 
#define AVIVO_D2CRTC_FRAME_COUNT   0x68a4
 
#define AVIVO_D2CRTC_STEREO_CONTROL   0x68c4
 
#define AVIVO_D2GRPH_ENABLE   0x6900
 
#define AVIVO_D2GRPH_CONTROL   0x6904
 
#define AVIVO_D2GRPH_LUT_SEL   0x6908
 
#define AVIVO_D2GRPH_PRIMARY_SURFACE_ADDRESS   0x6910
 
#define AVIVO_D2GRPH_SECONDARY_SURFACE_ADDRESS   0x6918
 
#define AVIVO_D2GRPH_PITCH   0x6920
 
#define AVIVO_D2GRPH_SURFACE_OFFSET_X   0x6924
 
#define AVIVO_D2GRPH_SURFACE_OFFSET_Y   0x6928
 
#define AVIVO_D2GRPH_X_START   0x692c
 
#define AVIVO_D2GRPH_Y_START   0x6930
 
#define AVIVO_D2GRPH_X_END   0x6934
 
#define AVIVO_D2GRPH_Y_END   0x6938
 
#define AVIVO_D2GRPH_UPDATE   0x6944
 
#define AVIVO_D2GRPH_FLIP_CONTROL   0x6948
 
#define AVIVO_D2CUR_CONTROL   0x6c00
 
#define AVIVO_D2CUR_SURFACE_ADDRESS   0x6c08
 
#define AVIVO_D2CUR_SIZE   0x6c10
 
#define AVIVO_D2CUR_POSITION   0x6c14
 
#define AVIVO_D2MODE_VBLANK_STATUS   0x6d34
 
#define AVIVO_D2MODE_VLINE_START_END   0x6d38
 
#define AVIVO_D2MODE_VLINE_STATUS   0x6d3c
 
#define AVIVO_D2MODE_VIEWPORT_START   0x6d80
 
#define AVIVO_D2MODE_VIEWPORT_SIZE   0x6d84
 
#define AVIVO_D2MODE_EXT_OVERSCAN_LEFT_RIGHT   0x6d88
 
#define AVIVO_D2MODE_EXT_OVERSCAN_TOP_BOTTOM   0x6d8c
 
#define AVIVO_D2SCL_SCALER_ENABLE   0x6d90
 
#define AVIVO_D2SCL_SCALER_TAP_CONTROL   0x6d94
 
#define AVIVO_DDIA_BIT_DEPTH_CONTROL   0x7214
 
#define AVIVO_DACA_ENABLE   0x7800
 
#define AVIVO_DAC_ENABLE   (1 << 0)
 
#define AVIVO_DACA_SOURCE_SELECT   0x7804
 
#define AVIVO_DAC_SOURCE_CRTC1   (0 << 0)
 
#define AVIVO_DAC_SOURCE_CRTC2   (1 << 0)
 
#define AVIVO_DAC_SOURCE_TV   (2 << 0)
 
#define AVIVO_DACA_FORCE_OUTPUT_CNTL   0x783c
 
#define AVIVO_DACA_FORCE_OUTPUT_CNTL_FORCE_DATA_EN   (1 << 0)
 
#define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_SHIFT   (8)
 
#define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_BLUE   (1 << 0)
 
#define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_GREEN   (1 << 1)
 
#define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_RED   (1 << 2)
 
#define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_ON_BLANKB_ONLY   (1 << 24)
 
#define AVIVO_DACA_POWERDOWN   0x7850
 
#define AVIVO_DACA_POWERDOWN_POWERDOWN   (1 << 0)
 
#define AVIVO_DACA_POWERDOWN_BLUE   (1 << 8)
 
#define AVIVO_DACA_POWERDOWN_GREEN   (1 << 16)
 
#define AVIVO_DACA_POWERDOWN_RED   (1 << 24)
 
#define AVIVO_DACB_ENABLE   0x7a00
 
#define AVIVO_DACB_SOURCE_SELECT   0x7a04
 
#define AVIVO_DACB_FORCE_OUTPUT_CNTL   0x7a3c
 
#define AVIVO_DACB_FORCE_OUTPUT_CNTL_FORCE_DATA_EN   (1 << 0)
 
#define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_SHIFT   (8)
 
#define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_BLUE   (1 << 0)
 
#define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_GREEN   (1 << 1)
 
#define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_RED   (1 << 2)
 
#define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_ON_BLANKB_ONLY   (1 << 24)
 
#define AVIVO_DACB_POWERDOWN   0x7a50
 
#define AVIVO_DACB_POWERDOWN_POWERDOWN   (1 << 0)
 
#define AVIVO_DACB_POWERDOWN_BLUE   (1 << 8)
 
#define AVIVO_DACB_POWERDOWN_GREEN   (1 << 16)
 
#define AVIVO_DACB_POWERDOWN_RED
 
#define AVIVO_TMDSA_CNTL   0x7880
 
#define AVIVO_TMDSA_CNTL_ENABLE   (1 << 0)
 
#define AVIVO_TMDSA_CNTL_HDMI_EN   (1 << 2)
 
#define AVIVO_TMDSA_CNTL_HPD_MASK   (1 << 4)
 
#define AVIVO_TMDSA_CNTL_HPD_SELECT   (1 << 8)
 
#define AVIVO_TMDSA_CNTL_SYNC_PHASE   (1 << 12)
 
#define AVIVO_TMDSA_CNTL_PIXEL_ENCODING   (1 << 16)
 
#define AVIVO_TMDSA_CNTL_DUAL_LINK_ENABLE   (1 << 24)
 
#define AVIVO_TMDSA_CNTL_SWAP   (1 << 28)
 
#define AVIVO_TMDSA_SOURCE_SELECT   0x7884
 
#define AVIVO_TMDSA_BIT_DEPTH_CONTROL   0x7894
 
#define AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN   (1 << 0)
 
#define AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH   (1 << 4)
 
#define AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN   (1 << 8)
 
#define AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH   (1 << 12)
 
#define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_EN   (1 << 16)
 
#define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_DEPTH   (1 << 20)
 
#define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_LEVEL   (1 << 24)
 
#define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET   (1 << 26)
 
#define AVIVO_TMDSA_DCBALANCER_CONTROL   0x78d0
 
#define AVIVO_TMDSA_DCBALANCER_CONTROL_EN   (1 << 0)
 
#define AVIVO_TMDSA_DCBALANCER_CONTROL_TEST_EN   (1 << 8)
 
#define AVIVO_TMDSA_DCBALANCER_CONTROL_TEST_IN_SHIFT   (16)
 
#define AVIVO_TMDSA_DCBALANCER_CONTROL_FORCE   (1 << 24)
 
#define AVIVO_TMDSA_DATA_SYNCHRONIZATION   0x78d8
 
#define AVIVO_TMDSA_DATA_SYNCHRONIZATION_DSYNSEL   (1 << 0)
 
#define AVIVO_TMDSA_DATA_SYNCHRONIZATION_PFREQCHG   (1 << 8)
 
#define AVIVO_TMDSA_CLOCK_ENABLE   0x7900
 
#define AVIVO_TMDSA_TRANSMITTER_ENABLE   0x7904
 
#define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX0_ENABLE   (1 << 0)
 
#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKC0EN   (1 << 1)
 
#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD00EN   (1 << 2)
 
#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD01EN   (1 << 3)
 
#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD02EN   (1 << 4)
 
#define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX1_ENABLE   (1 << 8)
 
#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD10EN   (1 << 10)
 
#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD11EN   (1 << 11)
 
#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD12EN   (1 << 12)
 
#define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX_ENABLE_HPD_MASK   (1 << 16)
 
#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKCEN_HPD_MASK   (1 << 17)
 
#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKDEN_HPD_MASK   (1 << 18)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL   0x7910
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_ENABLE   (1 << 0)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_RESET   (1 << 1)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_HPD_MASK_SHIFT   (2)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_IDSCKSEL   (1 << 4)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_BGSLEEP   (1 << 5)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_PWRUP_SEQ_EN   (1 << 6)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_TMCLK   (1 << 8)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_TMCLK_FROM_PADS   (1 << 13)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_TDCLK   (1 << 14)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_TDCLK_FROM_PADS   (1 << 15)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_CLK_PATTERN_SHIFT   (16)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_BYPASS_PLL   (1 << 28)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_USE_CLK_DATA   (1 << 29)
 
#define AVIVO_TMDSA_TRANSMITTER_CONTROL_INPUT_TEST_CLK_SEL   (1 << 31)
 
#define AVIVO_LVTMA_CNTL   0x7a80
 
#define AVIVO_LVTMA_CNTL_ENABLE   (1 << 0)
 
#define AVIVO_LVTMA_CNTL_HDMI_EN   (1 << 2)
 
#define AVIVO_LVTMA_CNTL_HPD_MASK   (1 << 4)
 
#define AVIVO_LVTMA_CNTL_HPD_SELECT   (1 << 8)
 
#define AVIVO_LVTMA_CNTL_SYNC_PHASE   (1 << 12)
 
#define AVIVO_LVTMA_CNTL_PIXEL_ENCODING   (1 << 16)
 
#define AVIVO_LVTMA_CNTL_DUAL_LINK_ENABLE   (1 << 24)
 
#define AVIVO_LVTMA_CNTL_SWAP   (1 << 28)
 
#define AVIVO_LVTMA_SOURCE_SELECT   0x7a84
 
#define AVIVO_LVTMA_COLOR_FORMAT   0x7a88
 
#define AVIVO_LVTMA_BIT_DEPTH_CONTROL   0x7a94
 
#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TRUNCATE_EN   (1 << 0)
 
#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH   (1 << 4)
 
#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN   (1 << 8)
 
#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH   (1 << 12)
 
#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_EN   (1 << 16)
 
#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_DEPTH   (1 << 20)
 
#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_LEVEL   (1 << 24)
 
#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET   (1 << 26)
 
#define AVIVO_LVTMA_DCBALANCER_CONTROL   0x7ad0
 
#define AVIVO_LVTMA_DCBALANCER_CONTROL_EN   (1 << 0)
 
#define AVIVO_LVTMA_DCBALANCER_CONTROL_TEST_EN   (1 << 8)
 
#define AVIVO_LVTMA_DCBALANCER_CONTROL_TEST_IN_SHIFT   (16)
 
#define AVIVO_LVTMA_DCBALANCER_CONTROL_FORCE   (1 << 24)
 
#define AVIVO_LVTMA_DATA_SYNCHRONIZATION   0x78d8
 
#define AVIVO_LVTMA_DATA_SYNCHRONIZATION_DSYNSEL   (1 << 0)
 
#define AVIVO_LVTMA_DATA_SYNCHRONIZATION_PFREQCHG   (1 << 8)
 
#define R500_LVTMA_CLOCK_ENABLE   0x7b00
 
#define R600_LVTMA_CLOCK_ENABLE   0x7b04
 
#define R500_LVTMA_TRANSMITTER_ENABLE   0x7b04
 
#define R600_LVTMA_TRANSMITTER_ENABLE   0x7b08
 
#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC0EN   (1 << 1)
 
#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD00EN   (1 << 2)
 
#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD01EN   (1 << 3)
 
#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD02EN   (1 << 4)
 
#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD03EN   (1 << 5)
 
#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC1EN   (1 << 9)
 
#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD10EN   (1 << 10)
 
#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD11EN   (1 << 11)
 
#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD12EN   (1 << 12)
 
#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKCEN_HPD_MASK   (1 << 17)
 
#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKDEN_HPD_MASK   (1 << 18)
 
#define R500_LVTMA_TRANSMITTER_CONTROL   0x7b10
 
#define R600_LVTMA_TRANSMITTER_CONTROL   0x7b14
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_ENABLE   (1 << 0)
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_RESET   (1 << 1)
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_HPD_MASK_SHIFT   (2)
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_IDSCKSEL   (1 << 4)
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_BGSLEEP   (1 << 5)
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_PWRUP_SEQ_EN   (1 << 6)
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_TMCLK   (1 << 8)
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_TMCLK_FROM_PADS   (1 << 13)
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_TDCLK   (1 << 14)
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_TDCLK_FROM_PADS   (1 << 15)
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_CLK_PATTERN_SHIFT   (16)
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_BYPASS_PLL   (1 << 28)
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_USE_CLK_DATA   (1 << 29)
 
#define AVIVO_LVTMA_TRANSMITTER_CONTROL_INPUT_TEST_CLK_SEL   (1 << 31)
 
#define R500_LVTMA_PWRSEQ_CNTL   0x7af0
 
#define R600_LVTMA_PWRSEQ_CNTL   0x7af4
 
#define AVIVO_LVTMA_PWRSEQ_EN   (1 << 0)
 
#define AVIVO_LVTMA_PWRSEQ_PLL_ENABLE_MASK   (1 << 2)
 
#define AVIVO_LVTMA_PWRSEQ_PLL_RESET_MASK   (1 << 3)
 
#define AVIVO_LVTMA_PWRSEQ_TARGET_STATE   (1 << 4)
 
#define AVIVO_LVTMA_SYNCEN   (1 << 8)
 
#define AVIVO_LVTMA_SYNCEN_OVRD   (1 << 9)
 
#define AVIVO_LVTMA_SYNCEN_POL   (1 << 10)
 
#define AVIVO_LVTMA_DIGON   (1 << 16)
 
#define AVIVO_LVTMA_DIGON_OVRD   (1 << 17)
 
#define AVIVO_LVTMA_DIGON_POL   (1 << 18)
 
#define AVIVO_LVTMA_BLON   (1 << 24)
 
#define AVIVO_LVTMA_BLON_OVRD   (1 << 25)
 
#define AVIVO_LVTMA_BLON_POL   (1 << 26)
 
#define R500_LVTMA_PWRSEQ_STATE   0x7af4
 
#define R600_LVTMA_PWRSEQ_STATE   0x7af8
 
#define AVIVO_LVTMA_PWRSEQ_STATE_TARGET_STATE_R   (1 << 0)
 
#define AVIVO_LVTMA_PWRSEQ_STATE_DIGON   (1 << 1)
 
#define AVIVO_LVTMA_PWRSEQ_STATE_SYNCEN   (1 << 2)
 
#define AVIVO_LVTMA_PWRSEQ_STATE_BLON   (1 << 3)
 
#define AVIVO_LVTMA_PWRSEQ_STATE_DONE   (1 << 4)
 
#define AVIVO_LVTMA_PWRSEQ_STATE_STATUS_SHIFT   (8)
 
#define AVIVO_LVDS_BACKLIGHT_CNTL   0x7af8
 
#define AVIVO_LVDS_BACKLIGHT_CNTL_EN   (1 << 0)
 
#define AVIVO_LVDS_BACKLIGHT_LEVEL_MASK   0x0000ff00
 
#define AVIVO_LVDS_BACKLIGHT_LEVEL_SHIFT   8
 
#define AVIVO_DVOA_BIT_DEPTH_CONTROL   0x7988
 
#define AVIVO_DC_GPIO_HPD_A   0x7e94
 
#define AVIVO_DC_GPIO_HPD_Y   0x7e9c
 
#define AVIVO_DC_I2C_STATUS1   0x7d30
 
#define AVIVO_DC_I2C_DONE   (1 << 0)
 
#define AVIVO_DC_I2C_NACK   (1 << 1)
 
#define AVIVO_DC_I2C_HALT   (1 << 2)
 
#define AVIVO_DC_I2C_GO   (1 << 3)
 
#define AVIVO_DC_I2C_RESET   0x7d34
 
#define AVIVO_DC_I2C_SOFT_RESET   (1 << 0)
 
#define AVIVO_DC_I2C_ABORT   (1 << 8)
 
#define AVIVO_DC_I2C_CONTROL1   0x7d38
 
#define AVIVO_DC_I2C_START   (1 << 0)
 
#define AVIVO_DC_I2C_STOP   (1 << 1)
 
#define AVIVO_DC_I2C_RECEIVE   (1 << 2)
 
#define AVIVO_DC_I2C_EN   (1 << 8)
 
#define AVIVO_DC_I2C_PIN_SELECT(x)   ((x) << 16)
 
#define AVIVO_SEL_DDC1   0
 
#define AVIVO_SEL_DDC2   1
 
#define AVIVO_SEL_DDC3   2
 
#define AVIVO_DC_I2C_CONTROL2   0x7d3c
 
#define AVIVO_DC_I2C_ADDR_COUNT(x)   ((x) << 0)
 
#define AVIVO_DC_I2C_DATA_COUNT(x)   ((x) << 8)
 
#define AVIVO_DC_I2C_CONTROL3   0x7d40
 
#define AVIVO_DC_I2C_DATA_DRIVE_EN   (1 << 0)
 
#define AVIVO_DC_I2C_DATA_DRIVE_SEL   (1 << 1)
 
#define AVIVO_DC_I2C_CLK_DRIVE_EN   (1 << 7)
 
#define AVIVO_DC_I2C_RD_INTRA_BYTE_DELAY(x)   ((x) << 8)
 
#define AVIVO_DC_I2C_WR_INTRA_BYTE_DELAY(x)   ((x) << 16)
 
#define AVIVO_DC_I2C_TIME_LIMIT(x)   ((x) << 24)
 
#define AVIVO_DC_I2C_DATA   0x7d44
 
#define AVIVO_DC_I2C_INTERRUPT_CONTROL   0x7d48
 
#define AVIVO_DC_I2C_INTERRUPT_STATUS   (1 << 0)
 
#define AVIVO_DC_I2C_INTERRUPT_AK   (1 << 8)
 
#define AVIVO_DC_I2C_INTERRUPT_ENABLE   (1 << 16)
 
#define AVIVO_DC_I2C_ARBITRATION   0x7d50
 
#define AVIVO_DC_I2C_SW_WANTS_TO_USE_I2C   (1 << 0)
 
#define AVIVO_DC_I2C_SW_CAN_USE_I2C   (1 << 1)
 
#define AVIVO_DC_I2C_SW_DONE_USING_I2C   (1 << 8)
 
#define AVIVO_DC_I2C_HW_NEEDS_I2C   (1 << 9)
 
#define AVIVO_DC_I2C_ABORT_HDCP_I2C   (1 << 16)
 
#define AVIVO_DC_I2C_HW_USING_I2C   (1 << 17)
 
#define AVIVO_DC_GPIO_DDC1_MASK   0x7e40
 
#define AVIVO_DC_GPIO_DDC1_A   0x7e44
 
#define AVIVO_DC_GPIO_DDC1_EN   0x7e48
 
#define AVIVO_DC_GPIO_DDC1_Y   0x7e4c
 
#define AVIVO_DC_GPIO_DDC2_MASK   0x7e50
 
#define AVIVO_DC_GPIO_DDC2_A   0x7e54
 
#define AVIVO_DC_GPIO_DDC2_EN   0x7e58
 
#define AVIVO_DC_GPIO_DDC2_Y   0x7e5c
 
#define AVIVO_DC_GPIO_DDC3_MASK   0x7e60
 
#define AVIVO_DC_GPIO_DDC3_A   0x7e64
 
#define AVIVO_DC_GPIO_DDC3_EN   0x7e68
 
#define AVIVO_DC_GPIO_DDC3_Y   0x7e6c
 
#define AVIVO_DISP_INTERRUPT_STATUS   0x7edc
 
#define AVIVO_D1_VBLANK_INTERRUPT   (1 << 4)
 
#define AVIVO_D2_VBLANK_INTERRUPT   (1 << 5)
 

Macro Definition Documentation

#define AVIVO_CP_DYN_CNTL   0x000f /* PLL */

Definition at line 282 of file r500_reg.h.

#define AVIVO_CP_FORCEON   (1 << 0)

Definition at line 283 of file r500_reg.h.

#define AVIVO_CRTC_DISP_READ_REQUEST_DISABLE   (1 << 24)

Definition at line 350 of file r500_reg.h.

#define AVIVO_CRTC_EN   (1 << 0)

Definition at line 349 of file r500_reg.h.

#define AVIVO_D1_VBLANK_INTERRUPT   (1 << 4)

Definition at line 794 of file r500_reg.h.

#define AVIVO_D1CRTC_BLANK_CONTROL   0x6084

Definition at line 351 of file r500_reg.h.

#define AVIVO_D1CRTC_CONTROL   0x6080

Definition at line 348 of file r500_reg.h.

#define AVIVO_D1CRTC_FRAME_COUNT   0x60a4

Definition at line 357 of file r500_reg.h.

#define AVIVO_D1CRTC_H_BLANK_START_END   0x6004

Definition at line 335 of file r500_reg.h.

#define AVIVO_D1CRTC_H_SYNC_A   0x6008

Definition at line 336 of file r500_reg.h.

#define AVIVO_D1CRTC_H_SYNC_A_CNTL   0x600c

Definition at line 337 of file r500_reg.h.

#define AVIVO_D1CRTC_H_SYNC_B   0x6010

Definition at line 338 of file r500_reg.h.

#define AVIVO_D1CRTC_H_SYNC_B_CNTL   0x6014

Definition at line 339 of file r500_reg.h.

#define AVIVO_D1CRTC_H_TOTAL   0x6000

Definition at line 334 of file r500_reg.h.

#define AVIVO_D1CRTC_INTERLACE_CONTROL   0x6088

Definition at line 352 of file r500_reg.h.

#define AVIVO_D1CRTC_INTERLACE_STATUS   0x608c

Definition at line 353 of file r500_reg.h.

#define AVIVO_D1CRTC_STATUS   0x609c

Definition at line 354 of file r500_reg.h.

#define AVIVO_D1CRTC_STATUS_POSITION   0x60a0

Definition at line 356 of file r500_reg.h.

#define AVIVO_D1CRTC_STEREO_CONTROL   0x60c4

Definition at line 358 of file r500_reg.h.

#define AVIVO_D1CRTC_V_BLANK   (1 << 0)

Definition at line 355 of file r500_reg.h.

#define AVIVO_D1CRTC_V_BLANK_START_END   0x6024

Definition at line 342 of file r500_reg.h.

#define AVIVO_D1CRTC_V_SYNC_A   0x6028

Definition at line 343 of file r500_reg.h.

#define AVIVO_D1CRTC_V_SYNC_A_CNTL   0x602c

Definition at line 344 of file r500_reg.h.

#define AVIVO_D1CRTC_V_SYNC_B   0x6030

Definition at line 345 of file r500_reg.h.

#define AVIVO_D1CRTC_V_SYNC_B_CNTL   0x6034

Definition at line 346 of file r500_reg.h.

#define AVIVO_D1CRTC_V_TOTAL   0x6020

Definition at line 341 of file r500_reg.h.

#define AVIVO_D1CUR_CONTROL   0x6400

Definition at line 421 of file r500_reg.h.

#define AVIVO_D1CUR_HOT_SPOT   0x6418

Definition at line 431 of file r500_reg.h.

#define AVIVO_D1CUR_POSITION   0x6414

Definition at line 430 of file r500_reg.h.

#define AVIVO_D1CUR_SIZE   0x6410

Definition at line 429 of file r500_reg.h.

#define AVIVO_D1CUR_SURFACE_ADDRESS   0x6408

Definition at line 426 of file r500_reg.h.

#define AVIVO_D1CUR_UPDATE   0x6424

Definition at line 432 of file r500_reg.h.

#define AVIVO_D1CURSOR_EN   (1 << 0)

Definition at line 422 of file r500_reg.h.

#define AVIVO_D1CURSOR_MODE_24BPP   2

Definition at line 425 of file r500_reg.h.

#define AVIVO_D1CURSOR_MODE_MASK   (3 << 8)

Definition at line 424 of file r500_reg.h.

#define AVIVO_D1CURSOR_MODE_SHIFT   8

Definition at line 423 of file r500_reg.h.

#define AVIVO_D1CURSOR_UPDATE_LOCK   (1 << 16)

Definition at line 433 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL   0x6104

Definition at line 367 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_16BPP_AI88   (3 << 8)

Definition at line 378 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_16BPP_ARGB1555   (0 << 8)

Definition at line 375 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_16BPP_ARGB4444   (2 << 8)

Definition at line 377 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_16BPP_MONO16   (4 << 8)

Definition at line 379 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_16BPP_RGB565   (1 << 8)

Definition at line 376 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_32BPP_8B_ARGB2101010   (3 << 8)

Definition at line 384 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_32BPP_ARGB2101010   (1 << 8)

Definition at line 382 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_32BPP_ARGB8888   (0 << 8)

Definition at line 381 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_32BPP_DIGITAL   (2 << 8)

Definition at line 383 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_64BPP_ARGB16161616   (0 << 8)

Definition at line 387 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_8BPP_INDEXED   (0 << 8)

Definition at line 373 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_DEPTH_16BPP   (1 << 0)

Definition at line 369 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_DEPTH_32BPP   (2 << 0)

Definition at line 370 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_DEPTH_64BPP   (3 << 0)

Definition at line 371 of file r500_reg.h.

#define AVIVO_D1GRPH_CONTROL_DEPTH_8BPP   (0 << 0)

Definition at line 368 of file r500_reg.h.

#define AVIVO_D1GRPH_ENABLE   0x6100

Definition at line 366 of file r500_reg.h.

#define AVIVO_D1GRPH_FLIP_CONTROL   0x6148

Definition at line 418 of file r500_reg.h.

#define AVIVO_D1GRPH_LUT_SEL   0x6108

Definition at line 401 of file r500_reg.h.

#define AVIVO_D1GRPH_MACRO_ADDRESS_MODE   (1 << 21)

Definition at line 391 of file r500_reg.h.

#define AVIVO_D1GRPH_PITCH   0x6120

Definition at line 408 of file r500_reg.h.

#define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS   0x6110

Definition at line 402 of file r500_reg.h.

#define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS   0x6118

Definition at line 405 of file r500_reg.h.

#define AVIVO_D1GRPH_SURFACE_OFFSET_X   0x6124

Definition at line 409 of file r500_reg.h.

#define AVIVO_D1GRPH_SURFACE_OFFSET_Y   0x6128

Definition at line 410 of file r500_reg.h.

#define AVIVO_D1GRPH_SURFACE_UPDATE_H_RETRACE_EN   (1 << 0)

Definition at line 419 of file r500_reg.h.

#define AVIVO_D1GRPH_SURFACE_UPDATE_PENDING   (1 << 2)

Definition at line 416 of file r500_reg.h.

#define AVIVO_D1GRPH_SWAP_RB   (1 << 16)

Definition at line 389 of file r500_reg.h.

#define AVIVO_D1GRPH_TILED   (1 << 20)

Definition at line 390 of file r500_reg.h.

#define AVIVO_D1GRPH_UPDATE   0x6144

Definition at line 415 of file r500_reg.h.

#define AVIVO_D1GRPH_UPDATE_LOCK   (1 << 16)

Definition at line 417 of file r500_reg.h.

#define AVIVO_D1GRPH_X_END   0x6134

Definition at line 413 of file r500_reg.h.

#define AVIVO_D1GRPH_X_START   0x612c

Definition at line 411 of file r500_reg.h.

#define AVIVO_D1GRPH_Y_END   0x6138

Definition at line 414 of file r500_reg.h.

#define AVIVO_D1GRPH_Y_START   0x6130

Definition at line 412 of file r500_reg.h.

#define AVIVO_D1MODE_DATA_FORMAT   0x6528

Definition at line 464 of file r500_reg.h.

#define AVIVO_D1MODE_DESKTOP_HEIGHT   0x652C

Definition at line 466 of file r500_reg.h.

#define AVIVO_D1MODE_EXT_OVERSCAN_LEFT_RIGHT   0x6588

Definition at line 477 of file r500_reg.h.

#define AVIVO_D1MODE_EXT_OVERSCAN_TOP_BOTTOM   0x658c

Definition at line 478 of file r500_reg.h.

#define AVIVO_D1MODE_INT_MASK   (1 << 0)

Definition at line 473 of file r500_reg.h.

#define AVIVO_D1MODE_INTERLEAVE_EN   (1 << 0)

Definition at line 465 of file r500_reg.h.

#define AVIVO_D1MODE_MASTER_UPDATE_MODE   0x60e4

Definition at line 360 of file r500_reg.h.

#define AVIVO_D1MODE_VBLANK_STATUS   0x6534

Definition at line 467 of file r500_reg.h.

#define AVIVO_D1MODE_VIEWPORT_SIZE   0x6584

Definition at line 476 of file r500_reg.h.

#define AVIVO_D1MODE_VIEWPORT_START   0x6580

Definition at line 475 of file r500_reg.h.

#define AVIVO_D1MODE_VLINE_START_END   0x6538

Definition at line 469 of file r500_reg.h.

#define AVIVO_D1MODE_VLINE_STAT   (1 << 12)

Definition at line 471 of file r500_reg.h.

#define AVIVO_D1MODE_VLINE_STATUS   0x653c

Definition at line 470 of file r500_reg.h.

#define AVIVO_D1SCL_SCALER_ENABLE   0x6590

Definition at line 480 of file r500_reg.h.

#define AVIVO_D1SCL_SCALER_TAP_CONTROL   0x6594

Definition at line 481 of file r500_reg.h.

#define AVIVO_D1SCL_UPDATE   0x65cc

Definition at line 482 of file r500_reg.h.

#define AVIVO_D1SCL_UPDATE_LOCK   (1 << 16)

Definition at line 483 of file r500_reg.h.

#define AVIVO_D1VGA_CONTROL   0x0330

Definition at line 293 of file r500_reg.h.

#define AVIVO_D2_VBLANK_INTERRUPT   (1 << 5)

Definition at line 795 of file r500_reg.h.

#define AVIVO_D2CRTC_BLANK_CONTROL   0x6884

Definition at line 501 of file r500_reg.h.

#define AVIVO_D2CRTC_CONTROL   0x6880

Definition at line 500 of file r500_reg.h.

#define AVIVO_D2CRTC_FRAME_COUNT   0x68a4

Definition at line 505 of file r500_reg.h.

#define AVIVO_D2CRTC_H_BLANK_START_END   0x6804

Definition at line 487 of file r500_reg.h.

#define AVIVO_D2CRTC_H_SYNC_A   0x6808

Definition at line 488 of file r500_reg.h.

#define AVIVO_D2CRTC_H_SYNC_A_CNTL   0x680c

Definition at line 489 of file r500_reg.h.

#define AVIVO_D2CRTC_H_SYNC_B   0x6810

Definition at line 490 of file r500_reg.h.

#define AVIVO_D2CRTC_H_SYNC_B_CNTL   0x6814

Definition at line 491 of file r500_reg.h.

#define AVIVO_D2CRTC_H_TOTAL   0x6800

Definition at line 486 of file r500_reg.h.

#define AVIVO_D2CRTC_INTERLACE_CONTROL   0x6888

Definition at line 502 of file r500_reg.h.

#define AVIVO_D2CRTC_INTERLACE_STATUS   0x688c

Definition at line 503 of file r500_reg.h.

#define AVIVO_D2CRTC_STATUS_POSITION   0x68a0

Definition at line 504 of file r500_reg.h.

#define AVIVO_D2CRTC_STEREO_CONTROL   0x68c4

Definition at line 506 of file r500_reg.h.

#define AVIVO_D2CRTC_V_BLANK_START_END   0x6824

Definition at line 494 of file r500_reg.h.

#define AVIVO_D2CRTC_V_SYNC_A   0x6828

Definition at line 495 of file r500_reg.h.

#define AVIVO_D2CRTC_V_SYNC_A_CNTL   0x682c

Definition at line 496 of file r500_reg.h.

#define AVIVO_D2CRTC_V_SYNC_B   0x6830

Definition at line 497 of file r500_reg.h.

#define AVIVO_D2CRTC_V_SYNC_B_CNTL   0x6834

Definition at line 498 of file r500_reg.h.

#define AVIVO_D2CRTC_V_TOTAL   0x6820

Definition at line 493 of file r500_reg.h.

#define AVIVO_D2CUR_CONTROL   0x6c00

Definition at line 523 of file r500_reg.h.

#define AVIVO_D2CUR_POSITION   0x6c14

Definition at line 526 of file r500_reg.h.

#define AVIVO_D2CUR_SIZE   0x6c10

Definition at line 525 of file r500_reg.h.

#define AVIVO_D2CUR_SURFACE_ADDRESS   0x6c08

Definition at line 524 of file r500_reg.h.

#define AVIVO_D2GRPH_CONTROL   0x6904

Definition at line 509 of file r500_reg.h.

#define AVIVO_D2GRPH_ENABLE   0x6900

Definition at line 508 of file r500_reg.h.

#define AVIVO_D2GRPH_FLIP_CONTROL   0x6948

Definition at line 521 of file r500_reg.h.

#define AVIVO_D2GRPH_LUT_SEL   0x6908

Definition at line 510 of file r500_reg.h.

#define AVIVO_D2GRPH_PITCH   0x6920

Definition at line 513 of file r500_reg.h.

#define AVIVO_D2GRPH_PRIMARY_SURFACE_ADDRESS   0x6910

Definition at line 511 of file r500_reg.h.

#define AVIVO_D2GRPH_SECONDARY_SURFACE_ADDRESS   0x6918

Definition at line 512 of file r500_reg.h.

#define AVIVO_D2GRPH_SURFACE_OFFSET_X   0x6924

Definition at line 514 of file r500_reg.h.

#define AVIVO_D2GRPH_SURFACE_OFFSET_Y   0x6928

Definition at line 515 of file r500_reg.h.

#define AVIVO_D2GRPH_UPDATE   0x6944

Definition at line 520 of file r500_reg.h.

#define AVIVO_D2GRPH_X_END   0x6934

Definition at line 518 of file r500_reg.h.

#define AVIVO_D2GRPH_X_START   0x692c

Definition at line 516 of file r500_reg.h.

#define AVIVO_D2GRPH_Y_END   0x6938

Definition at line 519 of file r500_reg.h.

#define AVIVO_D2GRPH_Y_START   0x6930

Definition at line 517 of file r500_reg.h.

#define AVIVO_D2MODE_EXT_OVERSCAN_LEFT_RIGHT   0x6d88

Definition at line 533 of file r500_reg.h.

#define AVIVO_D2MODE_EXT_OVERSCAN_TOP_BOTTOM   0x6d8c

Definition at line 534 of file r500_reg.h.

#define AVIVO_D2MODE_INT_MASK   (1 << 8)

Definition at line 474 of file r500_reg.h.

#define AVIVO_D2MODE_VBLANK_STATUS   0x6d34

Definition at line 528 of file r500_reg.h.

#define AVIVO_D2MODE_VIEWPORT_SIZE   0x6d84

Definition at line 532 of file r500_reg.h.

#define AVIVO_D2MODE_VIEWPORT_START   0x6d80

Definition at line 531 of file r500_reg.h.

#define AVIVO_D2MODE_VLINE_START_END   0x6d38

Definition at line 529 of file r500_reg.h.

#define AVIVO_D2MODE_VLINE_STATUS   0x6d3c

Definition at line 530 of file r500_reg.h.

#define AVIVO_D2SCL_SCALER_ENABLE   0x6d90

Definition at line 536 of file r500_reg.h.

#define AVIVO_D2SCL_SCALER_TAP_CONTROL   0x6d94

Definition at line 537 of file r500_reg.h.

#define AVIVO_D2VGA_CONTROL   0x0338

Definition at line 300 of file r500_reg.h.

#define AVIVO_DAC_ENABLE   (1 << 0)

Definition at line 542 of file r500_reg.h.

#define AVIVO_DAC_SOURCE_CRTC1   (0 << 0)

Definition at line 544 of file r500_reg.h.

#define AVIVO_DAC_SOURCE_CRTC2   (1 << 0)

Definition at line 545 of file r500_reg.h.

#define AVIVO_DAC_SOURCE_TV   (2 << 0)

Definition at line 546 of file r500_reg.h.

#define AVIVO_DACA_ENABLE   0x7800

Definition at line 541 of file r500_reg.h.

#define AVIVO_DACA_FORCE_OUTPUT_CNTL   0x783c

Definition at line 548 of file r500_reg.h.

#define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_ON_BLANKB_ONLY   (1 << 24)

Definition at line 554 of file r500_reg.h.

#define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_BLUE   (1 << 0)

Definition at line 551 of file r500_reg.h.

#define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_GREEN   (1 << 1)

Definition at line 552 of file r500_reg.h.

#define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_RED   (1 << 2)

Definition at line 553 of file r500_reg.h.

#define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_SHIFT   (8)

Definition at line 550 of file r500_reg.h.

#define AVIVO_DACA_FORCE_OUTPUT_CNTL_FORCE_DATA_EN   (1 << 0)

Definition at line 549 of file r500_reg.h.

#define AVIVO_DACA_POWERDOWN   0x7850

Definition at line 555 of file r500_reg.h.

#define AVIVO_DACA_POWERDOWN_BLUE   (1 << 8)

Definition at line 557 of file r500_reg.h.

#define AVIVO_DACA_POWERDOWN_GREEN   (1 << 16)

Definition at line 558 of file r500_reg.h.

#define AVIVO_DACA_POWERDOWN_POWERDOWN   (1 << 0)

Definition at line 556 of file r500_reg.h.

#define AVIVO_DACA_POWERDOWN_RED   (1 << 24)

Definition at line 559 of file r500_reg.h.

#define AVIVO_DACA_SOURCE_SELECT   0x7804

Definition at line 543 of file r500_reg.h.

#define AVIVO_DACB_ENABLE   0x7a00

Definition at line 561 of file r500_reg.h.

#define AVIVO_DACB_FORCE_OUTPUT_CNTL   0x7a3c

Definition at line 563 of file r500_reg.h.

#define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_ON_BLANKB_ONLY   (1 << 24)

Definition at line 569 of file r500_reg.h.

#define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_BLUE   (1 << 0)

Definition at line 566 of file r500_reg.h.

#define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_GREEN   (1 << 1)

Definition at line 567 of file r500_reg.h.

#define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_RED   (1 << 2)

Definition at line 568 of file r500_reg.h.

#define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_SHIFT   (8)

Definition at line 565 of file r500_reg.h.

#define AVIVO_DACB_FORCE_OUTPUT_CNTL_FORCE_DATA_EN   (1 << 0)

Definition at line 564 of file r500_reg.h.

#define AVIVO_DACB_POWERDOWN   0x7a50

Definition at line 570 of file r500_reg.h.

#define AVIVO_DACB_POWERDOWN_BLUE   (1 << 8)

Definition at line 572 of file r500_reg.h.

#define AVIVO_DACB_POWERDOWN_GREEN   (1 << 16)

Definition at line 573 of file r500_reg.h.

#define AVIVO_DACB_POWERDOWN_POWERDOWN   (1 << 0)

Definition at line 571 of file r500_reg.h.

#define AVIVO_DACB_POWERDOWN_RED

Definition at line 574 of file r500_reg.h.

#define AVIVO_DACB_SOURCE_SELECT   0x7a04

Definition at line 562 of file r500_reg.h.

#define AVIVO_DC_CRTC_MASTER_EN   0x60f8

Definition at line 363 of file r500_reg.h.

#define AVIVO_DC_CRTC_TV_CONTROL   0x60fc

Definition at line 364 of file r500_reg.h.

#define AVIVO_DC_GPIO_DDC1_A   0x7e44

Definition at line 779 of file r500_reg.h.

#define AVIVO_DC_GPIO_DDC1_EN   0x7e48

Definition at line 780 of file r500_reg.h.

#define AVIVO_DC_GPIO_DDC1_MASK   0x7e40

Definition at line 778 of file r500_reg.h.

#define AVIVO_DC_GPIO_DDC1_Y   0x7e4c

Definition at line 781 of file r500_reg.h.

#define AVIVO_DC_GPIO_DDC2_A   0x7e54

Definition at line 784 of file r500_reg.h.

#define AVIVO_DC_GPIO_DDC2_EN   0x7e58

Definition at line 785 of file r500_reg.h.

#define AVIVO_DC_GPIO_DDC2_MASK   0x7e50

Definition at line 783 of file r500_reg.h.

#define AVIVO_DC_GPIO_DDC2_Y   0x7e5c

Definition at line 786 of file r500_reg.h.

#define AVIVO_DC_GPIO_DDC3_A   0x7e64

Definition at line 789 of file r500_reg.h.

#define AVIVO_DC_GPIO_DDC3_EN   0x7e68

Definition at line 790 of file r500_reg.h.

#define AVIVO_DC_GPIO_DDC3_MASK   0x7e60

Definition at line 788 of file r500_reg.h.

#define AVIVO_DC_GPIO_DDC3_Y   0x7e6c

Definition at line 791 of file r500_reg.h.

#define AVIVO_DC_GPIO_HPD_A   0x7e94

Definition at line 735 of file r500_reg.h.

#define AVIVO_DC_GPIO_HPD_Y   0x7e9c

Definition at line 736 of file r500_reg.h.

#define AVIVO_DC_I2C_ABORT   (1 << 8)

Definition at line 745 of file r500_reg.h.

#define AVIVO_DC_I2C_ABORT_HDCP_I2C   (1 << 16)

Definition at line 775 of file r500_reg.h.

#define AVIVO_DC_I2C_ADDR_COUNT (   x)    ((x) << 0)

Definition at line 756 of file r500_reg.h.

#define AVIVO_DC_I2C_ARBITRATION   0x7d50

Definition at line 770 of file r500_reg.h.

#define AVIVO_DC_I2C_CLK_DRIVE_EN   (1 << 7)

Definition at line 761 of file r500_reg.h.

#define AVIVO_DC_I2C_CONTROL1   0x7d38

Definition at line 746 of file r500_reg.h.

#define AVIVO_DC_I2C_CONTROL2   0x7d3c

Definition at line 755 of file r500_reg.h.

#define AVIVO_DC_I2C_CONTROL3   0x7d40

Definition at line 758 of file r500_reg.h.

#define AVIVO_DC_I2C_DATA   0x7d44

Definition at line 765 of file r500_reg.h.

#define AVIVO_DC_I2C_DATA_COUNT (   x)    ((x) << 8)

Definition at line 757 of file r500_reg.h.

#define AVIVO_DC_I2C_DATA_DRIVE_EN   (1 << 0)

Definition at line 759 of file r500_reg.h.

#define AVIVO_DC_I2C_DATA_DRIVE_SEL   (1 << 1)

Definition at line 760 of file r500_reg.h.

#define AVIVO_DC_I2C_DONE   (1 << 0)

Definition at line 739 of file r500_reg.h.

#define AVIVO_DC_I2C_EN   (1 << 8)

Definition at line 750 of file r500_reg.h.

#define AVIVO_DC_I2C_GO   (1 << 3)

Definition at line 742 of file r500_reg.h.

#define AVIVO_DC_I2C_HALT   (1 << 2)

Definition at line 741 of file r500_reg.h.

#define AVIVO_DC_I2C_HW_NEEDS_I2C   (1 << 9)

Definition at line 774 of file r500_reg.h.

#define AVIVO_DC_I2C_HW_USING_I2C   (1 << 17)

Definition at line 776 of file r500_reg.h.

#define AVIVO_DC_I2C_INTERRUPT_AK   (1 << 8)

Definition at line 768 of file r500_reg.h.

#define AVIVO_DC_I2C_INTERRUPT_CONTROL   0x7d48

Definition at line 766 of file r500_reg.h.

#define AVIVO_DC_I2C_INTERRUPT_ENABLE   (1 << 16)

Definition at line 769 of file r500_reg.h.

#define AVIVO_DC_I2C_INTERRUPT_STATUS   (1 << 0)

Definition at line 767 of file r500_reg.h.

#define AVIVO_DC_I2C_NACK   (1 << 1)

Definition at line 740 of file r500_reg.h.

#define AVIVO_DC_I2C_PIN_SELECT (   x)    ((x) << 16)

Definition at line 751 of file r500_reg.h.

#define AVIVO_DC_I2C_RD_INTRA_BYTE_DELAY (   x)    ((x) << 8)

Definition at line 762 of file r500_reg.h.

#define AVIVO_DC_I2C_RECEIVE   (1 << 2)

Definition at line 749 of file r500_reg.h.

#define AVIVO_DC_I2C_RESET   0x7d34

Definition at line 743 of file r500_reg.h.

#define AVIVO_DC_I2C_SOFT_RESET   (1 << 0)

Definition at line 744 of file r500_reg.h.

#define AVIVO_DC_I2C_START   (1 << 0)

Definition at line 747 of file r500_reg.h.

#define AVIVO_DC_I2C_STATUS1   0x7d30

Definition at line 738 of file r500_reg.h.

#define AVIVO_DC_I2C_STOP   (1 << 1)

Definition at line 748 of file r500_reg.h.

#define AVIVO_DC_I2C_SW_CAN_USE_I2C   (1 << 1)

Definition at line 772 of file r500_reg.h.

#define AVIVO_DC_I2C_SW_DONE_USING_I2C   (1 << 8)

Definition at line 773 of file r500_reg.h.

#define AVIVO_DC_I2C_SW_WANTS_TO_USE_I2C   (1 << 0)

Definition at line 771 of file r500_reg.h.

#define AVIVO_DC_I2C_TIME_LIMIT (   x)    ((x) << 24)

Definition at line 764 of file r500_reg.h.

#define AVIVO_DC_I2C_WR_INTRA_BYTE_DELAY (   x)    ((x) << 16)

Definition at line 763 of file r500_reg.h.

#define AVIVO_DC_LB_DISP1_END_ADR_MASK   0x7ff

Definition at line 462 of file r500_reg.h.

#define AVIVO_DC_LB_DISP1_END_ADR_SHIFT   4

Definition at line 461 of file r500_reg.h.

#define AVIVO_DC_LB_MEMORY_SPLIT   0x6520

Definition at line 453 of file r500_reg.h.

#define AVIVO_DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q   3

Definition at line 459 of file r500_reg.h.

#define AVIVO_DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q   1

Definition at line 457 of file r500_reg.h.

#define AVIVO_DC_LB_MEMORY_SPLIT_D1_ONLY   2

Definition at line 458 of file r500_reg.h.

#define AVIVO_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF   0

Definition at line 456 of file r500_reg.h.

#define AVIVO_DC_LB_MEMORY_SPLIT_MASK   0x3

Definition at line 454 of file r500_reg.h.

#define AVIVO_DC_LB_MEMORY_SPLIT_SHIFT   0

Definition at line 455 of file r500_reg.h.

#define AVIVO_DC_LB_MEMORY_SPLIT_SHIFT_MODE   (1 << 2)

Definition at line 460 of file r500_reg.h.

#define AVIVO_DC_LUT_30_COLOR   0x6494

Definition at line 440 of file r500_reg.h.

#define AVIVO_DC_LUT_AUTOFILL   0x64a0

Definition at line 443 of file r500_reg.h.

#define AVIVO_DC_LUT_PWL_DATA   0x6490

Definition at line 439 of file r500_reg.h.

#define AVIVO_DC_LUT_READ_PIPE_SELECT   0x6498

Definition at line 441 of file r500_reg.h.

#define AVIVO_DC_LUT_RW_INDEX   0x6488

Definition at line 437 of file r500_reg.h.

#define AVIVO_DC_LUT_RW_MODE   0x6484

Definition at line 436 of file r500_reg.h.

#define AVIVO_DC_LUT_RW_SELECT   0x6480

Definition at line 435 of file r500_reg.h.

#define AVIVO_DC_LUT_SEQ_COLOR   0x648c

Definition at line 438 of file r500_reg.h.

#define AVIVO_DC_LUT_WRITE_EN_MASK   0x649c

Definition at line 442 of file r500_reg.h.

#define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE   0x64c4

Definition at line 446 of file r500_reg.h.

#define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN   0x64c8

Definition at line 447 of file r500_reg.h.

#define AVIVO_DC_LUTA_BLACK_OFFSET_RED   0x64cc

Definition at line 448 of file r500_reg.h.

#define AVIVO_DC_LUTA_CONTROL   0x64c0

Definition at line 445 of file r500_reg.h.

#define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE   0x64d0

Definition at line 449 of file r500_reg.h.

#define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN   0x64d4

Definition at line 450 of file r500_reg.h.

#define AVIVO_DC_LUTA_WHITE_OFFSET_RED   0x64d8

Definition at line 451 of file r500_reg.h.

#define AVIVO_DDIA_BIT_DEPTH_CONTROL   0x7214

Definition at line 539 of file r500_reg.h.

#define AVIVO_DISP_INTERRUPT_STATUS   0x7edc

Definition at line 793 of file r500_reg.h.

#define AVIVO_DVGA_CONTROL_MODE_ENABLE   (1<<0)

Definition at line 294 of file r500_reg.h.

#define AVIVO_DVGA_CONTROL_OVERSCAN_COLOR_EN   (1<<16)

Definition at line 298 of file r500_reg.h.

#define AVIVO_DVGA_CONTROL_OVERSCAN_TIMING_SELECT   (1<<10)

Definition at line 297 of file r500_reg.h.

#define AVIVO_DVGA_CONTROL_ROTATE   (1<<24)

Definition at line 299 of file r500_reg.h.

#define AVIVO_DVGA_CONTROL_SYNC_POLARITY_SELECT   (1<<9)

Definition at line 296 of file r500_reg.h.

#define AVIVO_DVGA_CONTROL_TIMING_SELECT   (1<<8)

Definition at line 295 of file r500_reg.h.

#define AVIVO_DVOA_BIT_DEPTH_CONTROL   0x7988

Definition at line 733 of file r500_reg.h.

#define AVIVO_DxMODE_INT_MASK   0x6540

Definition at line 472 of file r500_reg.h.

#define AVIVO_E2_DYN_CNTL   0x0011 /* PLL */

Definition at line 284 of file r500_reg.h.

#define AVIVO_E2_FORCEON   (1 << 0)

Definition at line 285 of file r500_reg.h.

#define AVIVO_EXT1_PPLL_CNTL   0x448

Definition at line 321 of file r500_reg.h.

#define AVIVO_EXT1_PPLL_FB_DIV   0x430

Definition at line 312 of file r500_reg.h.

#define AVIVO_EXT1_PPLL_POST_DIV   0x43c

Definition at line 316 of file r500_reg.h.

#define AVIVO_EXT1_PPLL_POST_DIV_SRC   0x438

Definition at line 315 of file r500_reg.h.

#define AVIVO_EXT1_PPLL_REF_DIV   0x404

Definition at line 303 of file r500_reg.h.

#define AVIVO_EXT1_PPLL_REF_DIV_SRC   0x400

Definition at line 302 of file r500_reg.h.

#define AVIVO_EXT1_PPLL_UPDATE_CNTL   0x40c

Definition at line 305 of file r500_reg.h.

#define AVIVO_EXT1_PPLL_UPDATE_LOCK   0x408

Definition at line 304 of file r500_reg.h.

#define AVIVO_EXT2_PPLL_CNTL   0x44c

Definition at line 322 of file r500_reg.h.

#define AVIVO_EXT2_PPLL_FB_DIV   0x434

Definition at line 313 of file r500_reg.h.

#define AVIVO_EXT2_PPLL_POST_DIV   0x444

Definition at line 319 of file r500_reg.h.

#define AVIVO_EXT2_PPLL_POST_DIV_SRC   0x440

Definition at line 318 of file r500_reg.h.

#define AVIVO_EXT2_PPLL_REF_DIV   0x414

Definition at line 308 of file r500_reg.h.

#define AVIVO_EXT2_PPLL_REF_DIV_SRC   0x410

Definition at line 307 of file r500_reg.h.

#define AVIVO_EXT2_PPLL_UPDATE_CNTL   0x41c

Definition at line 310 of file r500_reg.h.

#define AVIVO_EXT2_PPLL_UPDATE_LOCK   0x418

Definition at line 309 of file r500_reg.h.

#define AVIVO_HDP_FB_LOCATION   0x134

Definition at line 289 of file r500_reg.h.

#define AVIVO_IDCT_DYN_CNTL   0x0013 /* PLL */

Definition at line 286 of file r500_reg.h.

#define AVIVO_IDCT_FORCEON   (1 << 0)

Definition at line 287 of file r500_reg.h.

#define AVIVO_LVDS_BACKLIGHT_CNTL   0x7af8

Definition at line 728 of file r500_reg.h.

#define AVIVO_LVDS_BACKLIGHT_CNTL_EN   (1 << 0)

Definition at line 729 of file r500_reg.h.

#define AVIVO_LVDS_BACKLIGHT_LEVEL_MASK   0x0000ff00

Definition at line 730 of file r500_reg.h.

#define AVIVO_LVDS_BACKLIGHT_LEVEL_SHIFT   8

Definition at line 731 of file r500_reg.h.

#define AVIVO_LVTMA_BIT_DEPTH_CONTROL   0x7a94

Definition at line 648 of file r500_reg.h.

#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH   (1 << 12)

Definition at line 652 of file r500_reg.h.

#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN   (1 << 8)

Definition at line 651 of file r500_reg.h.

#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_DEPTH   (1 << 20)

Definition at line 654 of file r500_reg.h.

#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_EN   (1 << 16)

Definition at line 653 of file r500_reg.h.

#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET   (1 << 26)

Definition at line 656 of file r500_reg.h.

#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_LEVEL   (1 << 24)

Definition at line 655 of file r500_reg.h.

#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH   (1 << 4)

Definition at line 650 of file r500_reg.h.

#define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TRUNCATE_EN   (1 << 0)

Definition at line 649 of file r500_reg.h.

#define AVIVO_LVTMA_BLON   (1 << 24)

Definition at line 715 of file r500_reg.h.

#define AVIVO_LVTMA_BLON_OVRD   (1 << 25)

Definition at line 716 of file r500_reg.h.

#define AVIVO_LVTMA_BLON_POL   (1 << 26)

Definition at line 717 of file r500_reg.h.

#define AVIVO_LVTMA_CNTL   0x7a80

Definition at line 637 of file r500_reg.h.

#define AVIVO_LVTMA_CNTL_DUAL_LINK_ENABLE   (1 << 24)

Definition at line 644 of file r500_reg.h.

#define AVIVO_LVTMA_CNTL_ENABLE   (1 << 0)

Definition at line 638 of file r500_reg.h.

#define AVIVO_LVTMA_CNTL_HDMI_EN   (1 << 2)

Definition at line 639 of file r500_reg.h.

#define AVIVO_LVTMA_CNTL_HPD_MASK   (1 << 4)

Definition at line 640 of file r500_reg.h.

#define AVIVO_LVTMA_CNTL_HPD_SELECT   (1 << 8)

Definition at line 641 of file r500_reg.h.

#define AVIVO_LVTMA_CNTL_PIXEL_ENCODING   (1 << 16)

Definition at line 643 of file r500_reg.h.

#define AVIVO_LVTMA_CNTL_SWAP   (1 << 28)

Definition at line 645 of file r500_reg.h.

#define AVIVO_LVTMA_CNTL_SYNC_PHASE   (1 << 12)

Definition at line 642 of file r500_reg.h.

#define AVIVO_LVTMA_COLOR_FORMAT   0x7a88

Definition at line 647 of file r500_reg.h.

#define AVIVO_LVTMA_DATA_SYNCHRONIZATION   0x78d8

Definition at line 666 of file r500_reg.h.

#define AVIVO_LVTMA_DATA_SYNCHRONIZATION_DSYNSEL   (1 << 0)

Definition at line 667 of file r500_reg.h.

#define AVIVO_LVTMA_DATA_SYNCHRONIZATION_PFREQCHG   (1 << 8)

Definition at line 668 of file r500_reg.h.

#define AVIVO_LVTMA_DCBALANCER_CONTROL   0x7ad0

Definition at line 660 of file r500_reg.h.

#define AVIVO_LVTMA_DCBALANCER_CONTROL_EN   (1 << 0)

Definition at line 661 of file r500_reg.h.

#define AVIVO_LVTMA_DCBALANCER_CONTROL_FORCE   (1 << 24)

Definition at line 664 of file r500_reg.h.

#define AVIVO_LVTMA_DCBALANCER_CONTROL_TEST_EN   (1 << 8)

Definition at line 662 of file r500_reg.h.

#define AVIVO_LVTMA_DCBALANCER_CONTROL_TEST_IN_SHIFT   (16)

Definition at line 663 of file r500_reg.h.

#define AVIVO_LVTMA_DIGON   (1 << 16)

Definition at line 712 of file r500_reg.h.

#define AVIVO_LVTMA_DIGON_OVRD   (1 << 17)

Definition at line 713 of file r500_reg.h.

#define AVIVO_LVTMA_DIGON_POL   (1 << 18)

Definition at line 714 of file r500_reg.h.

#define AVIVO_LVTMA_PWRSEQ_EN   (1 << 0)

Definition at line 705 of file r500_reg.h.

#define AVIVO_LVTMA_PWRSEQ_PLL_ENABLE_MASK   (1 << 2)

Definition at line 706 of file r500_reg.h.

#define AVIVO_LVTMA_PWRSEQ_PLL_RESET_MASK   (1 << 3)

Definition at line 707 of file r500_reg.h.

#define AVIVO_LVTMA_PWRSEQ_STATE_BLON   (1 << 3)

Definition at line 724 of file r500_reg.h.

#define AVIVO_LVTMA_PWRSEQ_STATE_DIGON   (1 << 1)

Definition at line 722 of file r500_reg.h.

#define AVIVO_LVTMA_PWRSEQ_STATE_DONE   (1 << 4)

Definition at line 725 of file r500_reg.h.

#define AVIVO_LVTMA_PWRSEQ_STATE_STATUS_SHIFT   (8)

Definition at line 726 of file r500_reg.h.

#define AVIVO_LVTMA_PWRSEQ_STATE_SYNCEN   (1 << 2)

Definition at line 723 of file r500_reg.h.

#define AVIVO_LVTMA_PWRSEQ_STATE_TARGET_STATE_R   (1 << 0)

Definition at line 721 of file r500_reg.h.

#define AVIVO_LVTMA_PWRSEQ_TARGET_STATE   (1 << 4)

Definition at line 708 of file r500_reg.h.

#define AVIVO_LVTMA_SOURCE_SELECT   0x7a84

Definition at line 646 of file r500_reg.h.

#define AVIVO_LVTMA_SYNCEN   (1 << 8)

Definition at line 709 of file r500_reg.h.

#define AVIVO_LVTMA_SYNCEN_OVRD   (1 << 9)

Definition at line 710 of file r500_reg.h.

#define AVIVO_LVTMA_SYNCEN_POL   (1 << 10)

Definition at line 711 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_BGSLEEP   (1 << 5)

Definition at line 692 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_BYPASS_PLL   (1 << 28)

Definition at line 699 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_CLK_PATTERN_SHIFT   (16)

Definition at line 698 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_IDSCKSEL   (1 << 4)

Definition at line 691 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_INPUT_TEST_CLK_SEL   (1 << 31)

Definition at line 701 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_ENABLE   (1 << 0)

Definition at line 688 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_HPD_MASK_SHIFT   (2)

Definition at line 690 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_PWRUP_SEQ_EN   (1 << 6)

Definition at line 693 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_RESET   (1 << 1)

Definition at line 689 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_TDCLK   (1 << 14)

Definition at line 696 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_TDCLK_FROM_PADS   (1 << 15)

Definition at line 697 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_TMCLK   (1 << 8)

Definition at line 694 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_TMCLK_FROM_PADS   (1 << 13)

Definition at line 695 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_CONTROL_USE_CLK_DATA   (1 << 29)

Definition at line 700 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC0EN   (1 << 1)

Definition at line 674 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC1EN   (1 << 9)

Definition at line 679 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKCEN_HPD_MASK   (1 << 17)

Definition at line 683 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD00EN   (1 << 2)

Definition at line 675 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD01EN   (1 << 3)

Definition at line 676 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD02EN   (1 << 4)

Definition at line 677 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD03EN   (1 << 5)

Definition at line 678 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD10EN   (1 << 10)

Definition at line 680 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD11EN   (1 << 11)

Definition at line 681 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD12EN   (1 << 12)

Definition at line 682 of file r500_reg.h.

#define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKDEN_HPD_MASK   (1 << 18)

Definition at line 684 of file r500_reg.h.

#define AVIVO_MC_DATA   0x0074

Definition at line 269 of file r500_reg.h.

#define AVIVO_MC_INDEX   0x0070

Definition at line 263 of file r500_reg.h.

#define AVIVO_P1PLL_CNTL   0x450

Definition at line 324 of file r500_reg.h.

#define AVIVO_P1PLL_INT_SS_CNTL   0x458

Definition at line 326 of file r500_reg.h.

#define AVIVO_P1PLL_TMDSA_CNTL   0x460

Definition at line 328 of file r500_reg.h.

#define AVIVO_P2PLL_CNTL   0x454

Definition at line 325 of file r500_reg.h.

#define AVIVO_P2PLL_INT_SS_CNTL   0x45c

Definition at line 327 of file r500_reg.h.

#define AVIVO_P2PLL_LVTMA_CNTL   0x464

Definition at line 329 of file r500_reg.h.

#define AVIVO_PCLK_CRTC1_CNTL   0x480

Definition at line 331 of file r500_reg.h.

#define AVIVO_PCLK_CRTC2_CNTL   0x484

Definition at line 332 of file r500_reg.h.

#define AVIVO_SEL_DDC1   0

Definition at line 752 of file r500_reg.h.

#define AVIVO_SEL_DDC2   1

Definition at line 753 of file r500_reg.h.

#define AVIVO_SEL_DDC3   2

Definition at line 754 of file r500_reg.h.

#define AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH   (1 << 12)

Definition at line 593 of file r500_reg.h.

#define AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN   (1 << 8)

Definition at line 592 of file r500_reg.h.

#define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_DEPTH   (1 << 20)

Definition at line 595 of file r500_reg.h.

#define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_EN   (1 << 16)

Definition at line 594 of file r500_reg.h.

#define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET   (1 << 26)

Definition at line 597 of file r500_reg.h.

#define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_LEVEL   (1 << 24)

Definition at line 596 of file r500_reg.h.

#define AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH   (1 << 4)

Definition at line 591 of file r500_reg.h.

#define AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN   (1 << 0)

Definition at line 590 of file r500_reg.h.

#define AVIVO_TMDSA_BIT_DEPTH_CONTROL   0x7894

Definition at line 589 of file r500_reg.h.

#define AVIVO_TMDSA_CLOCK_ENABLE   0x7900

Definition at line 606 of file r500_reg.h.

#define AVIVO_TMDSA_CNTL   0x7880

Definition at line 576 of file r500_reg.h.

#define AVIVO_TMDSA_CNTL_DUAL_LINK_ENABLE   (1 << 24)

Definition at line 583 of file r500_reg.h.

#define AVIVO_TMDSA_CNTL_ENABLE   (1 << 0)

Definition at line 577 of file r500_reg.h.

#define AVIVO_TMDSA_CNTL_HDMI_EN   (1 << 2)

Definition at line 578 of file r500_reg.h.

#define AVIVO_TMDSA_CNTL_HPD_MASK   (1 << 4)

Definition at line 579 of file r500_reg.h.

#define AVIVO_TMDSA_CNTL_HPD_SELECT   (1 << 8)

Definition at line 580 of file r500_reg.h.

#define AVIVO_TMDSA_CNTL_PIXEL_ENCODING   (1 << 16)

Definition at line 582 of file r500_reg.h.

#define AVIVO_TMDSA_CNTL_SWAP   (1 << 28)

Definition at line 584 of file r500_reg.h.

#define AVIVO_TMDSA_CNTL_SYNC_PHASE   (1 << 12)

Definition at line 581 of file r500_reg.h.

#define AVIVO_TMDSA_DATA_SYNCHRONIZATION   0x78d8

Definition at line 603 of file r500_reg.h.

#define AVIVO_TMDSA_DATA_SYNCHRONIZATION_DSYNSEL   (1 << 0)

Definition at line 604 of file r500_reg.h.

#define AVIVO_TMDSA_DATA_SYNCHRONIZATION_PFREQCHG   (1 << 8)

Definition at line 605 of file r500_reg.h.

#define AVIVO_TMDSA_DCBALANCER_CONTROL   0x78d0

Definition at line 598 of file r500_reg.h.

#define AVIVO_TMDSA_DCBALANCER_CONTROL_EN   (1 << 0)

Definition at line 599 of file r500_reg.h.

#define AVIVO_TMDSA_DCBALANCER_CONTROL_FORCE   (1 << 24)

Definition at line 602 of file r500_reg.h.

#define AVIVO_TMDSA_DCBALANCER_CONTROL_TEST_EN   (1 << 8)

Definition at line 600 of file r500_reg.h.

#define AVIVO_TMDSA_DCBALANCER_CONTROL_TEST_IN_SHIFT   (16)

Definition at line 601 of file r500_reg.h.

#define AVIVO_TMDSA_SOURCE_SELECT   0x7884

Definition at line 585 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL   0x7910

Definition at line 621 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_BGSLEEP   (1 << 5)

Definition at line 626 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_BYPASS_PLL   (1 << 28)

Definition at line 633 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_CLK_PATTERN_SHIFT   (16)

Definition at line 632 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_IDSCKSEL   (1 << 4)

Definition at line 625 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_INPUT_TEST_CLK_SEL   (1 << 31)

Definition at line 635 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_ENABLE   (1 << 0)

Definition at line 622 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_HPD_MASK_SHIFT   (2)

Definition at line 624 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_PWRUP_SEQ_EN   (1 << 6)

Definition at line 627 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_RESET   (1 << 1)

Definition at line 623 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_TDCLK   (1 << 14)

Definition at line 630 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_TDCLK_FROM_PADS   (1 << 15)

Definition at line 631 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_TMCLK   (1 << 8)

Definition at line 628 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_TMCLK_FROM_PADS   (1 << 13)

Definition at line 629 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_CONTROL_USE_CLK_DATA   (1 << 29)

Definition at line 634 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_ENABLE   0x7904

Definition at line 607 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKC0EN   (1 << 1)

Definition at line 609 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKCEN_HPD_MASK   (1 << 17)

Definition at line 618 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD00EN   (1 << 2)

Definition at line 610 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD01EN   (1 << 3)

Definition at line 611 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD02EN   (1 << 4)

Definition at line 612 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD10EN   (1 << 10)

Definition at line 614 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD11EN   (1 << 11)

Definition at line 615 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD12EN   (1 << 12)

Definition at line 616 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKDEN_HPD_MASK   (1 << 18)

Definition at line 619 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX0_ENABLE   (1 << 0)

Definition at line 608 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX1_ENABLE   (1 << 8)

Definition at line 613 of file r500_reg.h.

#define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX_ENABLE_HPD_MASK   (1 << 16)

Definition at line 617 of file r500_reg.h.

#define AVIVO_VBLANK_ACK   (1 << 4)

Definition at line 468 of file r500_reg.h.

#define AVIVO_VGA_RENDER_CONTROL   0x0300

Definition at line 291 of file r500_reg.h.

#define AVIVO_VGA_VSTATUS_CNTL_MASK   (3 << 16)

Definition at line 292 of file r500_reg.h.

#define R300_BACK_PTYPE_LINE   (1 << 7)

Definition at line 37 of file r500_reg.h.

#define R300_BACK_PTYPE_POINT   (0 << 7)

Definition at line 36 of file r500_reg.h.

#define R300_BACK_PTYPE_TRIANGE   (2 << 7)

Definition at line 38 of file r500_reg.h.

#define R300_COLOR_ROUND_NEAREST   (1 << 2)

Definition at line 43 of file r500_reg.h.

#define R300_COLOR_ROUND_TRUNC   (0 << 2)

Definition at line 42 of file r500_reg.h.

#define R300_DC_AUTOFLUSH_ENABLE   (1 << 8)

Definition at line 90 of file r500_reg.h.

#define R300_DC_DC_DISABLE_IGNORE_PE   (1 << 17)

Definition at line 91 of file r500_reg.h.

#define R300_DST_PIPE_CONFIG   0x170c

Definition at line 87 of file r500_reg.h.

#define R300_ENABLE_TILING   (1 << 0)

Definition at line 77 of file r500_reg.h.

#define R300_FRONT_PTYPE_LINE   (1 << 4)

Definition at line 34 of file r500_reg.h.

#define R300_FRONT_PTYPE_POINT   (0 << 4)

Definition at line 33 of file r500_reg.h.

#define R300_FRONT_PTYPE_TRIANGE   (2 << 4)

Definition at line 35 of file r500_reg.h.

#define R300_GA_DEADLOCK_CNTL   (1 << 0)

Definition at line 63 of file r500_reg.h.

#define R300_GA_ENHANCE   0x4274

Definition at line 62 of file r500_reg.h.

#define R300_GA_FASTSYNC_CNTL   (1 << 1)

Definition at line 64 of file r500_reg.h.

#define R300_GA_POLY_MODE   0x4288

Definition at line 32 of file r500_reg.h.

#define R300_GA_ROUND_MODE   0x428c

Definition at line 39 of file r500_reg.h.

#define R300_GB_MSPOS0   0x4010

Definition at line 44 of file r500_reg.h.

#define R300_GB_MSPOS1   0x4014

Definition at line 53 of file r500_reg.h.

#define R300_GB_TILE_CONFIG   0x4018

Definition at line 76 of file r500_reg.h.

#define R300_GEOMETRY_ROUND_NEAREST   (1 << 0)

Definition at line 41 of file r500_reg.h.

#define R300_GEOMETRY_ROUND_TRUNC   (0 << 0)

Definition at line 40 of file r500_reg.h.

#define R300_MS_X0_SHIFT   0

Definition at line 45 of file r500_reg.h.

#define R300_MS_X1_SHIFT   8

Definition at line 47 of file r500_reg.h.

#define R300_MS_X2_SHIFT   16

Definition at line 49 of file r500_reg.h.

#define R300_MS_X3_SHIFT   0

Definition at line 54 of file r500_reg.h.

#define R300_MS_X4_SHIFT   8

Definition at line 56 of file r500_reg.h.

#define R300_MS_X5_SHIFT   16

Definition at line 58 of file r500_reg.h.

#define R300_MS_Y0_SHIFT   4

Definition at line 46 of file r500_reg.h.

#define R300_MS_Y1_SHIFT   12

Definition at line 48 of file r500_reg.h.

#define R300_MS_Y2_SHIFT   20

Definition at line 50 of file r500_reg.h.

#define R300_MS_Y3_SHIFT   4

Definition at line 55 of file r500_reg.h.

#define R300_MS_Y4_SHIFT   12

Definition at line 57 of file r500_reg.h.

#define R300_MS_Y5_SHIFT   20

Definition at line 59 of file r500_reg.h.

#define R300_MSBD0_X_SHIFT   28

Definition at line 52 of file r500_reg.h.

#define R300_MSBD0_Y_SHIFT   24

Definition at line 51 of file r500_reg.h.

#define R300_MSBD1_SHIFT   24

Definition at line 60 of file r500_reg.h.

#define R300_PIPE_AUTO_CONFIG   (1 << 31)

Definition at line 88 of file r500_reg.h.

#define R300_PIPE_COUNT_R300   (3 << 1)

Definition at line 79 of file r500_reg.h.

#define R300_PIPE_COUNT_R420   (7 << 1)

Definition at line 81 of file r500_reg.h.

#define R300_PIPE_COUNT_R420_3P   (6 << 1)

Definition at line 80 of file r500_reg.h.

#define R300_PIPE_COUNT_RV350   (0 << 1)

Definition at line 78 of file r500_reg.h.

#define R300_RB2D_DSTCACHE_MODE   0x3428

Definition at line 89 of file r500_reg.h.

#define R300_RB3D_DC_FINISH   (1 << 4)

Definition at line 68 of file r500_reg.h.

#define R300_RB3D_DC_FLUSH   (2 << 0)

Definition at line 66 of file r500_reg.h.

#define R300_RB3D_DC_FREE   (2 << 2)

Definition at line 67 of file r500_reg.h.

#define R300_RB3D_DSTCACHE_CTLSTAT   0x4e4c

Definition at line 65 of file r500_reg.h.

#define R300_RB3D_ZCACHE_CTLSTAT   0x4f18

Definition at line 69 of file r500_reg.h.

#define R300_SUBPIXEL_1_12   (0 << 16)

Definition at line 85 of file r500_reg.h.

#define R300_SUBPIXEL_1_16   (1 << 16)

Definition at line 86 of file r500_reg.h.

#define R300_TILE_SIZE_16   (1 << 4)

Definition at line 83 of file r500_reg.h.

#define R300_TILE_SIZE_32   (2 << 4)

Definition at line 84 of file r500_reg.h.

#define R300_TILE_SIZE_8   (0 << 4)

Definition at line 82 of file r500_reg.h.

#define R300_ZC_FLUSH   (1 << 0)

Definition at line 70 of file r500_reg.h.

#define R300_ZC_FLUSH_ALL   0x3

Definition at line 72 of file r500_reg.h.

#define R300_ZC_FREE   (1 << 1)

Definition at line 71 of file r500_reg.h.

#define R400_GB_PIPE_SELECT   0x402c

Definition at line 73 of file r500_reg.h.

#define R500_DYN_SCLK_PWMEM_PIPE   0x000d /* PLL */

Definition at line 74 of file r500_reg.h.

#define R500_LVTMA_CLOCK_ENABLE   0x7b00

Definition at line 669 of file r500_reg.h.

#define R500_LVTMA_PWRSEQ_CNTL   0x7af0

Definition at line 703 of file r500_reg.h.

#define R500_LVTMA_PWRSEQ_STATE   0x7af4

Definition at line 719 of file r500_reg.h.

#define R500_LVTMA_TRANSMITTER_CONTROL   0x7b10

Definition at line 686 of file r500_reg.h.

#define R500_LVTMA_TRANSMITTER_ENABLE   0x7b04

Definition at line 672 of file r500_reg.h.

#define R500_SU_REG_DEST   0x42c8

Definition at line 75 of file r500_reg.h.

#define R520_MC_AGP_BASE   0x06

Definition at line 259 of file r500_reg.h.

#define R520_MC_AGP_BASE_2   0x07

Definition at line 260 of file r500_reg.h.

#define R520_MC_AGP_LOCATION   0x05

Definition at line 254 of file r500_reg.h.

#define R520_MC_AGP_START_MASK   0x0000FFFF

Definition at line 255 of file r500_reg.h.

#define R520_MC_AGP_START_SHIFT   0

Definition at line 256 of file r500_reg.h.

#define R520_MC_AGP_TOP_MASK   0xFFFF0000

Definition at line 257 of file r500_reg.h.

#define R520_MC_AGP_TOP_SHIFT   16

Definition at line 258 of file r500_reg.h.

#define R520_MC_CHANNEL_SIZE   (1 << 23)

Definition at line 280 of file r500_reg.h.

#define R520_MC_CNTL0   0x8

Definition at line 277 of file r500_reg.h.

#define R520_MC_FB_LOCATION   0x04

Definition at line 249 of file r500_reg.h.

#define R520_MC_FB_START_MASK   0x0000FFFF

Definition at line 250 of file r500_reg.h.

#define R520_MC_FB_START_SHIFT   0

Definition at line 251 of file r500_reg.h.

#define R520_MC_FB_TOP_MASK   0xFFFF0000

Definition at line 252 of file r500_reg.h.

#define R520_MC_FB_TOP_SHIFT   16

Definition at line 253 of file r500_reg.h.

#define R520_MC_IND_DATA   0x74

Definition at line 273 of file r500_reg.h.

#define R520_MC_IND_INDEX   0x70

Definition at line 271 of file r500_reg.h.

#define R520_MC_IND_WR_EN   (1 << 24)

Definition at line 272 of file r500_reg.h.

#define R520_MC_STATUS   0x00

Definition at line 264 of file r500_reg.h.

#define R520_MC_STATUS_IDLE   (1<<1)

Definition at line 265 of file r500_reg.h.

#define R520_MEM_NUM_CHANNELS_MASK   (0x3 << 24)

Definition at line 278 of file r500_reg.h.

#define R520_MEM_NUM_CHANNELS_SHIFT   24

Definition at line 279 of file r500_reg.h.

#define R600_D1GRPH_ARRAY_MODE_1D_TILED_THIN1   (2 << 20)

Definition at line 395 of file r500_reg.h.

#define R600_D1GRPH_ARRAY_MODE_2D_TILED_THIN1   (4 << 20)

Definition at line 396 of file r500_reg.h.

#define R600_D1GRPH_ARRAY_MODE_LINEAR_ALIGNED   (1 << 20)

Definition at line 394 of file r500_reg.h.

#define R600_D1GRPH_ARRAY_MODE_LINEAR_GENERAL   (0 << 20)

Definition at line 393 of file r500_reg.h.

#define R600_LVTMA_CLOCK_ENABLE   0x7b04

Definition at line 670 of file r500_reg.h.

#define R600_LVTMA_PWRSEQ_CNTL   0x7af4

Definition at line 704 of file r500_reg.h.

#define R600_LVTMA_PWRSEQ_STATE   0x7af8

Definition at line 720 of file r500_reg.h.

#define R600_LVTMA_TRANSMITTER_CONTROL   0x7b14

Definition at line 687 of file r500_reg.h.

#define R600_LVTMA_TRANSMITTER_ENABLE   0x7b08

Definition at line 673 of file r500_reg.h.

#define R700_D1CUR_SURFACE_ADDRESS_HIGH   0x6c0c

Definition at line 427 of file r500_reg.h.

#define R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH   0x6914

Definition at line 403 of file r500_reg.h.

#define R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH   0x691c

Definition at line 406 of file r500_reg.h.

#define R700_D2CUR_SURFACE_ADDRESS_HIGH   0x640c

Definition at line 428 of file r500_reg.h.

#define R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH   0x6114

Definition at line 404 of file r500_reg.h.

#define R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH   0x611c

Definition at line 407 of file r500_reg.h.

#define RADEON_CP_STAT   0x7C0

Definition at line 93 of file r500_reg.h.

#define RADEON_ISYNC_ANY2D_IDLE3D   (1 << 0)

Definition at line 97 of file r500_reg.h.

#define RADEON_ISYNC_ANY3D_IDLE2D   (1 << 1)

Definition at line 98 of file r500_reg.h.

#define RADEON_ISYNC_CNTL   0x1724

Definition at line 96 of file r500_reg.h.

#define RADEON_ISYNC_CPSCRATCH_IDLEGUI   (1 << 5)

Definition at line 102 of file r500_reg.h.

#define RADEON_ISYNC_TRIG2D_IDLE3D   (1 << 2)

Definition at line 99 of file r500_reg.h.

#define RADEON_ISYNC_TRIG3D_IDLE2D   (1 << 3)

Definition at line 100 of file r500_reg.h.

#define RADEON_ISYNC_WAIT_IDLEGUI   (1 << 4)

Definition at line 101 of file r500_reg.h.

#define RADEON_RBBM_CMDFIFO_ADDR   0xE70

Definition at line 94 of file r500_reg.h.

#define RADEON_RBBM_CMDFIFO_DATA   0xE74

Definition at line 95 of file r500_reg.h.

#define RS480_1LEVEL_GART   (1 << 30)

Definition at line 143 of file r500_reg.h.

#define RS480_2LEVEL_GART   (0 << 30)

Definition at line 142 of file r500_reg.h.

#define RS480_AGP_ADDRESS_SPACE_SIZE   0x38

Definition at line 148 of file r500_reg.h.

#define RS480_AGP_BASE_2   0x0164

Definition at line 132 of file r500_reg.h.

#define RS480_AGP_MODE_CNTL   0x39

Definition at line 157 of file r500_reg.h.

#define RS480_AGP_RD_BUF_SIZE   (1 << 20)

Definition at line 160 of file r500_reg.h.

#define RS480_DISABLE_GTW   (1 << 1)

Definition at line 134 of file r500_reg.h.

#define RS480_GART_BASE   0x2c

Definition at line 145 of file r500_reg.h.

#define RS480_GART_CACHE_CNTRL   0x2e

Definition at line 146 of file r500_reg.h.

#define RS480_GART_CACHE_INVALIDATE   (1 << 0) /* wait for it to clear */

Definition at line 147 of file r500_reg.h.

#define RS480_GART_EN   (1 << 0)

Definition at line 149 of file r500_reg.h.

#define RS480_GART_FEATURE_ID   0x2b

Definition at line 137 of file r500_reg.h.

#define RS480_GART_INDEX_REG_EN   (1 << 12)

Definition at line 135 of file r500_reg.h.

#define RS480_GTW_LAC_EN   (1 << 25)

Definition at line 141 of file r500_reg.h.

#define RS480_HANG_EN   (1 << 11)

Definition at line 138 of file r500_reg.h.

#define RS480_MC_MISC_CNTL   0x18

Definition at line 133 of file r500_reg.h.

#define RS480_NB_MC_DATA   0x16c

Definition at line 106 of file r500_reg.h.

#define RS480_NB_MC_IND_WR_EN   (1 << 8)

Definition at line 105 of file r500_reg.h.

#define RS480_NB_MC_INDEX   0x168

Definition at line 104 of file r500_reg.h.

#define RS480_NONGART_SNOOP   (1 << 19)

Definition at line 159 of file r500_reg.h.

#define RS480_P2P_ENABLE   (1 << 19)

Definition at line 140 of file r500_reg.h.

#define RS480_PDC_EN   (1 << 31)

Definition at line 144 of file r500_reg.h.

#define RS480_POST_GART_Q_SIZE   (1 << 18)

Definition at line 158 of file r500_reg.h.

#define RS480_REQ_TYPE_SNOOP_DIS   (1 << 24)

Definition at line 163 of file r500_reg.h.

#define RS480_REQ_TYPE_SNOOP_MASK   0x3

Definition at line 162 of file r500_reg.h.

#define RS480_REQ_TYPE_SNOOP_SHIFT   22

Definition at line 161 of file r500_reg.h.

#define RS480_TLB_ENABLE   (1 << 18)

Definition at line 139 of file r500_reg.h.

#define RS480_VA_SIZE_128MB   (2 << 1)

Definition at line 152 of file r500_reg.h.

#define RS480_VA_SIZE_1GB   (5 << 1)

Definition at line 155 of file r500_reg.h.

#define RS480_VA_SIZE_256MB   (3 << 1)

Definition at line 153 of file r500_reg.h.

#define RS480_VA_SIZE_2GB   (6 << 1)

Definition at line 156 of file r500_reg.h.

#define RS480_VA_SIZE_32MB   (0 << 1)

Definition at line 150 of file r500_reg.h.

#define RS480_VA_SIZE_512MB   (4 << 1)

Definition at line 154 of file r500_reg.h.

#define RS480_VA_SIZE_64MB   (1 << 1)

Definition at line 151 of file r500_reg.h.

#define RS600_BUS_MASTER_DIS   (1 << 14)

Definition at line 230 of file r500_reg.h.

#define RS600_EFFECTIVE_L1_CACHE_SIZE (   x)    ((x) << 11)

Definition at line 225 of file r500_reg.h.

#define RS600_EFFECTIVE_L1_QUEUE_SIZE (   x)    ((x) << 15)

Definition at line 227 of file r500_reg.h.

#define RS600_EFFECTIVE_L2_CACHE_SIZE (   x)    ((x) << 15)

Definition at line 202 of file r500_reg.h.

#define RS600_EFFECTIVE_L2_QUEUE_SIZE (   x)    ((x) << 21)

Definition at line 203 of file r500_reg.h.

#define RS600_ENABLE_FRAGMENT_PROCESSING   (1 << 14)

Definition at line 226 of file r500_reg.h.

#define RS600_ENABLE_PAGE_TABLE   (1 << 0)

Definition at line 207 of file r500_reg.h.

#define RS600_ENABLE_PAGE_TABLES   (1 << 26)

Definition at line 199 of file r500_reg.h.

#define RS600_ENABLE_PT   (1 << 0)

Definition at line 201 of file r500_reg.h.

#define RS600_ENABLE_TRANSLATION_MODE_OVERRIDE   (1 << 0)

Definition at line 216 of file r500_reg.h.

#define RS600_INVALIDATE_ALL_L1_TLBS   (1 << 28)

Definition at line 204 of file r500_reg.h.

#define RS600_INVALIDATE_L1_TLB   (1 << 20)

Definition at line 228 of file r500_reg.h.

#define RS600_INVALIDATE_L2_CACHE   (1 << 29)

Definition at line 205 of file r500_reg.h.

#define RS600_MC_ADDR_MASK   0xffff

Definition at line 174 of file r500_reg.h.

#define RS600_MC_AGP_BASE   0x6

Definition at line 196 of file r500_reg.h.

#define RS600_MC_AGP_BASE_2   0x7

Definition at line 197 of file r500_reg.h.

#define RS600_MC_AGP_LOCATION   0x5

Definition at line 191 of file r500_reg.h.

#define RS600_MC_AGP_START_MASK   0x0000FFFF

Definition at line 192 of file r500_reg.h.

#define RS600_MC_AGP_START_SHIFT   0

Definition at line 193 of file r500_reg.h.

#define RS600_MC_AGP_TOP_MASK   0xFFFF0000

Definition at line 194 of file r500_reg.h.

#define RS600_MC_AGP_TOP_SHIFT   16

Definition at line 195 of file r500_reg.h.

#define RS600_MC_CNTL1   0x9

Definition at line 198 of file r500_reg.h.

#define RS600_MC_DATA   0x74

Definition at line 183 of file r500_reg.h.

#define RS600_MC_FB_LOCATION   0x4

Definition at line 186 of file r500_reg.h.

#define RS600_MC_FB_START_MASK   0x0000FFFF

Definition at line 187 of file r500_reg.h.

#define RS600_MC_FB_START_SHIFT   0

Definition at line 188 of file r500_reg.h.

#define RS600_MC_FB_TOP_MASK   0xFFFF0000

Definition at line 189 of file r500_reg.h.

#define RS600_MC_FB_TOP_SHIFT   16

Definition at line 190 of file r500_reg.h.

#define RS600_MC_IDLE   (1 << 1)

Definition at line 185 of file r500_reg.h.

#define RS600_MC_IND_AIC_RBS   (1 << 20)

Definition at line 179 of file r500_reg.h.

#define RS600_MC_IND_CITF_ARB0   (1 << 21)

Definition at line 180 of file r500_reg.h.

#define RS600_MC_IND_CITF_ARB1   (1 << 22)

Definition at line 181 of file r500_reg.h.

#define RS600_MC_IND_SEQ_RBS_0   (1 << 16)

Definition at line 175 of file r500_reg.h.

#define RS600_MC_IND_SEQ_RBS_1   (1 << 17)

Definition at line 176 of file r500_reg.h.

#define RS600_MC_IND_SEQ_RBS_2   (1 << 18)

Definition at line 177 of file r500_reg.h.

#define RS600_MC_IND_SEQ_RBS_3   (1 << 19)

Definition at line 178 of file r500_reg.h.

#define RS600_MC_IND_WR_EN   (1 << 23)

Definition at line 182 of file r500_reg.h.

#define RS600_MC_INDEX   0x70

Definition at line 173 of file r500_reg.h.

#define RS600_MC_PT0_CLIENT0_CNTL   0x16c

Definition at line 215 of file r500_reg.h.

#define RS600_MC_PT0_CNTL   0x100

Definition at line 200 of file r500_reg.h.

#define RS600_MC_PT0_CONTEXT0_CNTL   0x102

Definition at line 206 of file r500_reg.h.

#define RS600_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR   0x11c

Definition at line 211 of file r500_reg.h.

#define RS600_MC_PT0_CONTEXT0_FLAT_BASE_ADDR   0x12c

Definition at line 212 of file r500_reg.h.

#define RS600_MC_PT0_CONTEXT0_FLAT_END_ADDR   0x14c

Definition at line 214 of file r500_reg.h.

#define RS600_MC_PT0_CONTEXT0_FLAT_START_ADDR   0x13c

Definition at line 213 of file r500_reg.h.

#define RS600_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR   0x114

Definition at line 210 of file r500_reg.h.

#define RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR   0x112

Definition at line 209 of file r500_reg.h.

#define RS600_MC_STATUS   0x0

Definition at line 184 of file r500_reg.h.

#define RS600_MC_STATUS   0x0

Definition at line 184 of file r500_reg.h.

#define RS600_MC_STATUS_IDLE   (1 << 0)

Definition at line 172 of file r500_reg.h.

#define RS600_MSI_REARM   (1 << 20)

Definition at line 231 of file r500_reg.h.

#define RS600_PAGE_TABLE_TYPE_FLAT   (0 << 1)

Definition at line 208 of file r500_reg.h.

#define RS600_SYSTEM_ACCESS_MODE_IN_SYS   (2 << 8)

Definition at line 221 of file r500_reg.h.

#define RS600_SYSTEM_ACCESS_MODE_MASK   (3 << 8)

Definition at line 218 of file r500_reg.h.

#define RS600_SYSTEM_ACCESS_MODE_NOT_IN_SYS   (3 << 8)

Definition at line 222 of file r500_reg.h.

#define RS600_SYSTEM_ACCESS_MODE_PA_ONLY   (0 << 8)

Definition at line 219 of file r500_reg.h.

#define RS600_SYSTEM_ACCESS_MODE_USE_SYS_MAP   (1 << 8)

Definition at line 220 of file r500_reg.h.

#define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_DEFAULT_PAGE   (1 << 10)

Definition at line 224 of file r500_reg.h.

#define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASSTHROUGH   (0 << 10)

Definition at line 223 of file r500_reg.h.

#define RS600_TRANSLATION_MODE_OVERRIDE   (1 << 1)

Definition at line 217 of file r500_reg.h.

#define RS690_AIC_CTRL_SCRATCH   0x3A

Definition at line 165 of file r500_reg.h.

#define RS690_BLOCK_GFX_D3_EN   (1 << 14)

Definition at line 136 of file r500_reg.h.

#define RS690_DIS_OUT_OF_PCI_GART_ACCESS   (1 << 1)

Definition at line 166 of file r500_reg.h.

#define RS690_HDP_FB_LOCATION   0x0134

Definition at line 124 of file r500_reg.h.

#define RS690_MC_AGP_START_MASK   0x0000FFFF

Definition at line 117 of file r500_reg.h.

#define RS690_MC_AGP_START_SHIFT   0

Definition at line 118 of file r500_reg.h.

#define RS690_MC_AGP_TOP_MASK   0xFFFF0000

Definition at line 119 of file r500_reg.h.

#define RS690_MC_AGP_TOP_SHIFT   16

Definition at line 120 of file r500_reg.h.

#define RS690_MC_DATA   0x7c

Definition at line 129 of file r500_reg.h.

#define RS690_MC_FB_START_MASK   0x0000FFFF

Definition at line 112 of file r500_reg.h.

#define RS690_MC_FB_START_SHIFT   0

Definition at line 113 of file r500_reg.h.

#define RS690_MC_FB_TOP_MASK   0xFFFF0000

Definition at line 114 of file r500_reg.h.

#define RS690_MC_FB_TOP_SHIFT   16

Definition at line 115 of file r500_reg.h.

#define RS690_MC_INDEX   0x78

Definition at line 125 of file r500_reg.h.

#define RS690_MC_INDEX_MASK   0x1ff

Definition at line 126 of file r500_reg.h.

#define RS690_MC_INDEX_WR_ACK   0x7f

Definition at line 128 of file r500_reg.h.

#define RS690_MC_INDEX_WR_EN   (1 << 9)

Definition at line 127 of file r500_reg.h.

#define RS690_MC_INIT_MISC_LAT_TIMER   0x104

Definition at line 123 of file r500_reg.h.

#define RS690_MC_STATUS   0x90

Definition at line 130 of file r500_reg.h.

#define RS690_MC_STATUS_IDLE   (1 << 0)

Definition at line 131 of file r500_reg.h.

#define RS690_MCCFG_AGP_BASE   0x102

Definition at line 121 of file r500_reg.h.

#define RS690_MCCFG_AGP_BASE_2   0x103

Definition at line 122 of file r500_reg.h.

#define RS690_MCCFG_AGP_LOCATION   0x101

Definition at line 116 of file r500_reg.h.

#define RS690_MCCFG_FB_LOCATION   0x100

Definition at line 111 of file r500_reg.h.

#define RV515_MC_AGP_BASE   0x03

Definition at line 246 of file r500_reg.h.

#define RV515_MC_AGP_BASE_2   0x04

Definition at line 247 of file r500_reg.h.

#define RV515_MC_AGP_LOCATION   0x02

Definition at line 241 of file r500_reg.h.

#define RV515_MC_AGP_START_MASK   0x0000FFFF

Definition at line 242 of file r500_reg.h.

#define RV515_MC_AGP_START_SHIFT   0

Definition at line 243 of file r500_reg.h.

#define RV515_MC_AGP_TOP_MASK   0xFFFF0000

Definition at line 244 of file r500_reg.h.

#define RV515_MC_AGP_TOP_SHIFT   16

Definition at line 245 of file r500_reg.h.

#define RV515_MC_CNTL   0x5

Definition at line 275 of file r500_reg.h.

#define RV515_MC_FB_LOCATION   0x01

Definition at line 236 of file r500_reg.h.

#define RV515_MC_FB_START_MASK   0x0000FFFF

Definition at line 237 of file r500_reg.h.

#define RV515_MC_FB_START_SHIFT   0

Definition at line 238 of file r500_reg.h.

#define RV515_MC_FB_TOP_MASK   0xFFFF0000

Definition at line 239 of file r500_reg.h.

#define RV515_MC_FB_TOP_SHIFT   16

Definition at line 240 of file r500_reg.h.

#define RV515_MC_INIT_MISC_LAT_TIMER   0x09

Definition at line 268 of file r500_reg.h.

#define RV515_MC_STATUS   0x08

Definition at line 266 of file r500_reg.h.

#define RV515_MC_STATUS_IDLE   (1<<4)

Definition at line 267 of file r500_reg.h.

#define RV515_MEM_NUM_CHANNELS_MASK   0x3

Definition at line 276 of file r500_reg.h.

Generated on Thu Jan 10 2013 15:30:09 for Linux Kernel by   doxygen 1.8.2