Go to the documentation of this file. 1 #ifndef B43_RADIO_2055_H_
2 #define B43_RADIO_2055_H_
4 #include <linux/types.h>
8 #define B2055_GEN_SPARE 0x00
9 #define B2055_SP_PINPD 0x02
10 #define B2055_C1_SP_RSSI 0x03
11 #define B2055_C1_SP_PDMISC 0x04
12 #define B2055_C2_SP_RSSI 0x05
13 #define B2055_C2_SP_PDMISC 0x06
14 #define B2055_C1_SP_RXGC1 0x07
15 #define B2055_C1_SP_RXGC2 0x08
16 #define B2055_C2_SP_RXGC1 0x09
17 #define B2055_C2_SP_RXGC2 0x0A
18 #define B2055_C1_SP_LPFBWSEL 0x0B
19 #define B2055_C2_SP_LPFBWSEL 0x0C
20 #define B2055_C1_SP_TXGC1 0x0D
21 #define B2055_C1_SP_TXGC2 0x0E
22 #define B2055_C2_SP_TXGC1 0x0F
23 #define B2055_C2_SP_TXGC2 0x10
24 #define B2055_MASTER1 0x11
25 #define B2055_MASTER2 0x12
26 #define B2055_PD_LGEN 0x13
27 #define B2055_PD_PLLTS 0x14
28 #define B2055_C1_PD_LGBUF 0x15
29 #define B2055_C1_PD_TX 0x16
30 #define B2055_C1_PD_RXTX 0x17
31 #define B2055_C1_PD_RSSIMISC 0x18
32 #define B2055_C2_PD_LGBUF 0x19
33 #define B2055_C2_PD_TX 0x1A
34 #define B2055_C2_PD_RXTX 0x1B
35 #define B2055_C2_PD_RSSIMISC 0x1C
36 #define B2055_PWRDET_LGEN 0x1D
37 #define B2055_C1_PWRDET_LGBUF 0x1E
38 #define B2055_C1_PWRDET_RXTX 0x1F
39 #define B2055_C2_PWRDET_LGBUF 0x20
40 #define B2055_C2_PWRDET_RXTX 0x21
41 #define B2055_RRCCAL_CS 0x22
42 #define B2055_RRCCAL_NOPTSEL 0x23
43 #define B2055_CAL_MISC 0x24
44 #define B2055_CAL_COUT 0x25
45 #define B2055_CAL_COUT2 0x26
46 #define B2055_CAL_CVARCTL 0x27
47 #define B2055_CAL_RVARCTL 0x28
48 #define B2055_CAL_LPOCTL 0x29
49 #define B2055_CAL_TS 0x2A
50 #define B2055_CAL_RCCALRTS 0x2B
51 #define B2055_CAL_RCALRTS 0x2C
52 #define B2055_PADDRV 0x2D
53 #define B2055_XOCTL1 0x2E
54 #define B2055_XOCTL2 0x2F
55 #define B2055_XOREGUL 0x30
56 #define B2055_XOMISC 0x31
57 #define B2055_PLL_LFC1 0x32
58 #define B2055_PLL_CALVTH 0x33
59 #define B2055_PLL_LFC2 0x34
60 #define B2055_PLL_REF 0x35
61 #define B2055_PLL_LFR1 0x36
62 #define B2055_PLL_PFDCP 0x37
63 #define B2055_PLL_IDAC_CPOPAMP 0x38
64 #define B2055_PLL_CPREG 0x39
65 #define B2055_PLL_RCAL 0x3A
66 #define B2055_RF_PLLMOD0 0x3B
67 #define B2055_RF_PLLMOD1 0x3C
68 #define B2055_RF_MMDIDAC1 0x3D
69 #define B2055_RF_MMDIDAC0 0x3E
70 #define B2055_RF_MMDSP 0x3F
71 #define B2055_VCO_CAL1 0x40
72 #define B2055_VCO_CAL2 0x41
73 #define B2055_VCO_CAL3 0x42
74 #define B2055_VCO_CAL4 0x43
75 #define B2055_VCO_CAL5 0x44
76 #define B2055_VCO_CAL6 0x45
77 #define B2055_VCO_CAL7 0x46
78 #define B2055_VCO_CAL8 0x47
79 #define B2055_VCO_CAL9 0x48
80 #define B2055_VCO_CAL10 0x49
81 #define B2055_VCO_CAL11 0x4A
82 #define B2055_VCO_CAL12 0x4B
83 #define B2055_VCO_CAL13 0x4C
84 #define B2055_VCO_CAL14 0x4D
85 #define B2055_VCO_CAL15 0x4E
86 #define B2055_VCO_CAL16 0x4F
87 #define B2055_VCO_KVCO 0x50
88 #define B2055_VCO_CAPTAIL 0x51
89 #define B2055_VCO_IDACVCO 0x52
90 #define B2055_VCO_REG 0x53
91 #define B2055_PLL_RFVTH 0x54
92 #define B2055_LGBUF_CENBUF 0x55
93 #define B2055_LGEN_TUNE1 0x56
94 #define B2055_LGEN_TUNE2 0x57
95 #define B2055_LGEN_IDAC1 0x58
96 #define B2055_LGEN_IDAC2 0x59
97 #define B2055_LGEN_BIASC 0x5A
98 #define B2055_LGEN_BIASIDAC 0x5B
99 #define B2055_LGEN_RCAL 0x5C
100 #define B2055_LGEN_DIV 0x5D
101 #define B2055_LGEN_SPARE2 0x5E
102 #define B2055_C1_LGBUF_ATUNE 0x5F
103 #define B2055_C1_LGBUF_GTUNE 0x60
104 #define B2055_C1_LGBUF_DIV 0x61
105 #define B2055_C1_LGBUF_AIDAC 0x62
106 #define B2055_C1_LGBUF_GIDAC 0x63
107 #define B2055_C1_LGBUF_IDACFO 0x64
108 #define B2055_C1_LGBUF_SPARE 0x65
109 #define B2055_C1_RX_RFSPC1 0x66
110 #define B2055_C1_RX_RFR1 0x67
111 #define B2055_C1_RX_RFR2 0x68
112 #define B2055_C1_RX_RFRCAL 0x69
113 #define B2055_C1_RX_BB_BLCMP 0x6A
114 #define B2055_C1_RX_BB_LPF 0x6B
115 #define B2055_C1_RX_BB_MIDACHP 0x6C
116 #define B2055_C1_RX_BB_VGA1IDAC 0x6D
117 #define B2055_C1_RX_BB_VGA2IDAC 0x6E
118 #define B2055_C1_RX_BB_VGA3IDAC 0x6F
119 #define B2055_C1_RX_BB_BUFOCTL 0x70
120 #define B2055_C1_RX_BB_RCCALCTL 0x71
121 #define B2055_C1_RX_BB_RSSICTL1 0x72
122 #define B2055_C1_RX_BB_RSSICTL2 0x73
123 #define B2055_C1_RX_BB_RSSICTL3 0x74
124 #define B2055_C1_RX_BB_RSSICTL4 0x75
125 #define B2055_C1_RX_BB_RSSICTL5 0x76
126 #define B2055_C1_RX_BB_REG 0x77
127 #define B2055_C1_RX_BB_SPARE1 0x78
128 #define B2055_C1_RX_TXBBRCAL 0x79
129 #define B2055_C1_TX_RF_SPGA 0x7A
130 #define B2055_C1_TX_RF_SPAD 0x7B
131 #define B2055_C1_TX_RF_CNTPGA1 0x7C
132 #define B2055_C1_TX_RF_CNTPAD1 0x7D
133 #define B2055_C1_TX_RF_PGAIDAC 0x7E
134 #define B2055_C1_TX_PGAPADTN 0x7F
135 #define B2055_C1_TX_PADIDAC1 0x80
136 #define B2055_C1_TX_PADIDAC2 0x81
137 #define B2055_C1_TX_MXBGTRIM 0x82
138 #define B2055_C1_TX_RF_RCAL 0x83
139 #define B2055_C1_TX_RF_PADTSSI1 0x84
140 #define B2055_C1_TX_RF_PADTSSI2 0x85
141 #define B2055_C1_TX_RF_SPARE 0x86
142 #define B2055_C1_TX_RF_IQCAL1 0x87
143 #define B2055_C1_TX_RF_IQCAL2 0x88
144 #define B2055_C1_TXBB_RCCAL 0x89
145 #define B2055_C1_TXBB_LPF1 0x8A
146 #define B2055_C1_TX_VOSCNCL 0x8B
147 #define B2055_C1_TX_LPF_MXGMIDAC 0x8C
148 #define B2055_C1_TX_BB_MXGM 0x8D
149 #define B2055_C2_LGBUF_ATUNE 0x8E
150 #define B2055_C2_LGBUF_GTUNE 0x8F
151 #define B2055_C2_LGBUF_DIV 0x90
152 #define B2055_C2_LGBUF_AIDAC 0x91
153 #define B2055_C2_LGBUF_GIDAC 0x92
154 #define B2055_C2_LGBUF_IDACFO 0x93
155 #define B2055_C2_LGBUF_SPARE 0x94
156 #define B2055_C2_RX_RFSPC1 0x95
157 #define B2055_C2_RX_RFR1 0x96
158 #define B2055_C2_RX_RFR2 0x97
159 #define B2055_C2_RX_RFRCAL 0x98
160 #define B2055_C2_RX_BB_BLCMP 0x99
161 #define B2055_C2_RX_BB_LPF 0x9A
162 #define B2055_C2_RX_BB_MIDACHP 0x9B
163 #define B2055_C2_RX_BB_VGA1IDAC 0x9C
164 #define B2055_C2_RX_BB_VGA2IDAC 0x9D
165 #define B2055_C2_RX_BB_VGA3IDAC 0x9E
166 #define B2055_C2_RX_BB_BUFOCTL 0x9F
167 #define B2055_C2_RX_BB_RCCALCTL 0xA0
168 #define B2055_C2_RX_BB_RSSICTL1 0xA1
169 #define B2055_C2_RX_BB_RSSICTL2 0xA2
170 #define B2055_C2_RX_BB_RSSICTL3 0xA3
171 #define B2055_C2_RX_BB_RSSICTL4 0xA4
172 #define B2055_C2_RX_BB_RSSICTL5 0xA5
173 #define B2055_C2_RX_BB_REG 0xA6
174 #define B2055_C2_RX_BB_SPARE1 0xA7
175 #define B2055_C2_RX_TXBBRCAL 0xA8
176 #define B2055_C2_TX_RF_SPGA 0xA9
177 #define B2055_C2_TX_RF_SPAD 0xAA
178 #define B2055_C2_TX_RF_CNTPGA1 0xAB
179 #define B2055_C2_TX_RF_CNTPAD1 0xAC
180 #define B2055_C2_TX_RF_PGAIDAC 0xAD
181 #define B2055_C2_TX_PGAPADTN 0xAE
182 #define B2055_C2_TX_PADIDAC1 0xAF
183 #define B2055_C2_TX_PADIDAC2 0xB0
184 #define B2055_C2_TX_MXBGTRIM 0xB1
185 #define B2055_C2_TX_RF_RCAL 0xB2
186 #define B2055_C2_TX_RF_PADTSSI1 0xB3
187 #define B2055_C2_TX_RF_PADTSSI2 0xB4
188 #define B2055_C2_TX_RF_SPARE 0xB5
189 #define B2055_C2_TX_RF_IQCAL1 0xB6
190 #define B2055_C2_TX_RF_IQCAL2 0xB7
191 #define B2055_C2_TXBB_RCCAL 0xB8
192 #define B2055_C2_TXBB_LPF1 0xB9
193 #define B2055_C2_TX_VOSCNCL 0xBA
194 #define B2055_C2_TX_LPF_MXGMIDAC 0xBB
195 #define B2055_C2_TX_BB_MXGM 0xBC
196 #define B2055_PRG_GCHP21 0xBD
197 #define B2055_PRG_GCHP22 0xBE
198 #define B2055_PRG_GCHP23 0xBF
199 #define B2055_PRG_GCHP24 0xC0
200 #define B2055_PRG_GCHP25 0xC1
201 #define B2055_PRG_GCHP26 0xC2
202 #define B2055_PRG_GCHP27 0xC3
203 #define B2055_PRG_GCHP28 0xC4
204 #define B2055_PRG_GCHP29 0xC5
205 #define B2055_PRG_GCHP30 0xC6
206 #define B2055_C1_LNA_GAINBST 0xCD
207 #define B2055_C1_B0NB_RSSIVCM 0xD2
208 #define B2055_C1_GENSPARE2 0xD6
209 #define B2055_C2_LNA_GAINBST 0xD9
210 #define B2055_C2_B0NB_RSSIVCM 0xDE
211 #define B2055_C2_GENSPARE2 0xE2
252 bool ghz5,
bool ignore_uploadflag);