regs-i2s-v2.h File Reference

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Macros
#define	S3C2412_IISCON   (0x00)
#define	S3C2412_IISMOD   (0x04)
#define	S3C2412_IISFIC   (0x08)
#define	S3C2412_IISPSR   (0x0C)
#define	S3C2412_IISTXD   (0x10)
#define	S3C2412_IISRXD   (0x14)
#define	S5PC1XX_IISFICS   0x18
#define	S5PC1XX_IISTXDS   0x1C
#define	S5PC1XX_IISCON_SW_RST   (1 << 31)
#define	S5PC1XX_IISCON_FRXOFSTATUS   (1 << 26)
#define	S5PC1XX_IISCON_FRXORINTEN   (1 << 25)
#define	S5PC1XX_IISCON_FTXSURSTAT   (1 << 24)
#define	S5PC1XX_IISCON_FTXSURINTEN   (1 << 23)
#define	S5PC1XX_IISCON_TXSDMAPAUSE   (1 << 20)
#define	S5PC1XX_IISCON_TXSDMACTIVE   (1 << 18)
#define	S3C64XX_IISCON_FTXURSTATUS   (1 << 17)
#define	S3C64XX_IISCON_FTXURINTEN   (1 << 16)
#define	S3C64XX_IISCON_TXFIFO2_EMPTY   (1 << 15)
#define	S3C64XX_IISCON_TXFIFO1_EMPTY   (1 << 14)
#define	S3C64XX_IISCON_TXFIFO2_FULL   (1 << 13)
#define	S3C64XX_IISCON_TXFIFO1_FULL   (1 << 12)
#define	S3C2412_IISCON_LRINDEX   (1 << 11)
#define	S3C2412_IISCON_TXFIFO_EMPTY   (1 << 10)
#define	S3C2412_IISCON_RXFIFO_EMPTY   (1 << 9)
#define	S3C2412_IISCON_TXFIFO_FULL   (1 << 8)
#define	S3C2412_IISCON_RXFIFO_FULL   (1 << 7)
#define	S3C2412_IISCON_TXDMA_PAUSE   (1 << 6)
#define	S3C2412_IISCON_RXDMA_PAUSE   (1 << 5)
#define	S3C2412_IISCON_TXCH_PAUSE   (1 << 4)
#define	S3C2412_IISCON_RXCH_PAUSE   (1 << 3)
#define	S3C2412_IISCON_TXDMA_ACTIVE   (1 << 2)
#define	S3C2412_IISCON_RXDMA_ACTIVE   (1 << 1)
#define	S3C2412_IISCON_IIS_ACTIVE   (1 << 0)
#define	S5PC1XX_IISMOD_OPCLK_CDCLK_OUT   (0 << 30)
#define	S5PC1XX_IISMOD_OPCLK_CDCLK_IN   (1 << 30)
#define	S5PC1XX_IISMOD_OPCLK_BCLK_OUT   (2 << 30)
#define	S5PC1XX_IISMOD_OPCLK_PCLK   (3 << 30)
#define	S5PC1XX_IISMOD_OPCLK_MASK   (3 << 30)
#define	S5PC1XX_IISMOD_TXS_IDMA   (1 << 28) /* Sec_TXFIFO use I-DMA */
#define	S5PC1XX_IISMOD_BLCS_MASK   0x3
#define	S5PC1XX_IISMOD_BLCS_SHIFT   26
#define	S5PC1XX_IISMOD_BLCP_MASK   0x3
#define	S5PC1XX_IISMOD_BLCP_SHIFT   24
#define	S3C64XX_IISMOD_C2DD_HHALF   (1 << 21) /* Discard Higher-half */
#define	S3C64XX_IISMOD_C2DD_LHALF   (1 << 20) /* Discard Lower-half */
#define	S3C64XX_IISMOD_C1DD_HHALF   (1 << 19)
#define	S3C64XX_IISMOD_C1DD_LHALF   (1 << 18)
#define	S3C64XX_IISMOD_DC2_EN   (1 << 17)
#define	S3C64XX_IISMOD_DC1_EN   (1 << 16)
#define	S3C64XX_IISMOD_BLC_16BIT   (0 << 13)
#define	S3C64XX_IISMOD_BLC_8BIT   (1 << 13)
#define	S3C64XX_IISMOD_BLC_24BIT   (2 << 13)
#define	S3C64XX_IISMOD_BLC_MASK   (3 << 13)
#define	S3C2412_IISMOD_IMS_SYSMUX   (1 << 10)
#define	S3C2412_IISMOD_SLAVE   (1 << 11)
#define	S3C2412_IISMOD_MODE_TXONLY   (0 << 8)
#define	S3C2412_IISMOD_MODE_RXONLY   (1 << 8)
#define	S3C2412_IISMOD_MODE_TXRX   (2 << 8)
#define	S3C2412_IISMOD_MODE_MASK   (3 << 8)
#define	S3C2412_IISMOD_LR_LLOW   (0 << 7)
#define	S3C2412_IISMOD_LR_RLOW   (1 << 7)
#define	S3C2412_IISMOD_SDF_IIS   (0 << 5)
#define	S3C2412_IISMOD_SDF_MSB   (1 << 5)
#define	S3C2412_IISMOD_SDF_LSB   (2 << 5)
#define	S3C2412_IISMOD_SDF_MASK   (3 << 5)
#define	S3C2412_IISMOD_RCLK_256FS   (0 << 3)
#define	S3C2412_IISMOD_RCLK_512FS   (1 << 3)
#define	S3C2412_IISMOD_RCLK_384FS   (2 << 3)
#define	S3C2412_IISMOD_RCLK_768FS   (3 << 3)
#define	S3C2412_IISMOD_RCLK_MASK   (3 << 3)
#define	S3C2412_IISMOD_BCLK_32FS   (0 << 1)
#define	S3C2412_IISMOD_BCLK_48FS   (1 << 1)
#define	S3C2412_IISMOD_BCLK_16FS   (2 << 1)
#define	S3C2412_IISMOD_BCLK_24FS   (3 << 1)
#define	S3C2412_IISMOD_BCLK_MASK   (3 << 1)
#define	S3C2412_IISMOD_8BIT   (1 << 0)
#define	S3C64XX_IISMOD_CDCLKCON   (1 << 12)
#define	S3C2412_IISPSR_PSREN   (1 << 15)
#define	S3C64XX_IISFIC_TX2COUNT(x)   (((x) >> 24) & 0xf)
#define	S3C64XX_IISFIC_TX1COUNT(x)   (((x) >> 16) & 0xf)
#define	S3C2412_IISFIC_TXFLUSH   (1 << 15)
#define	S3C2412_IISFIC_RXFLUSH   (1 << 7)
#define	S3C2412_IISFIC_TXCOUNT(x)   (((x) >> 8) & 0xf)
#define	S3C2412_IISFIC_RXCOUNT(x)   (((x) >> 0) & 0xf)
#define	S5PC1XX_IISFICS_TXFLUSH   (1 << 15)
#define	S5PC1XX_IISFICS_TXCOUNT(x)   (((x) >> 8) & 0x7f)

Macro Definition Documentation

#define S3C2412_IISCON   (0x00)

Definition at line 16 of file regs-i2s-v2.h.

#define S3C2412_IISCON_IIS_ACTIVE   (1 << 0)

Definition at line 52 of file regs-i2s-v2.h.

#define S3C2412_IISCON_LRINDEX   (1 << 11)

Definition at line 41 of file regs-i2s-v2.h.

#define S3C2412_IISCON_RXCH_PAUSE   (1 << 3)

Definition at line 49 of file regs-i2s-v2.h.

#define S3C2412_IISCON_RXDMA_ACTIVE   (1 << 1)

Definition at line 51 of file regs-i2s-v2.h.

#define S3C2412_IISCON_RXDMA_PAUSE   (1 << 5)

Definition at line 47 of file regs-i2s-v2.h.

#define S3C2412_IISCON_RXFIFO_EMPTY   (1 << 9)

Definition at line 43 of file regs-i2s-v2.h.

#define S3C2412_IISCON_RXFIFO_FULL   (1 << 7)

Definition at line 45 of file regs-i2s-v2.h.

#define S3C2412_IISCON_TXCH_PAUSE   (1 << 4)

Definition at line 48 of file regs-i2s-v2.h.

#define S3C2412_IISCON_TXDMA_ACTIVE   (1 << 2)

Definition at line 50 of file regs-i2s-v2.h.

#define S3C2412_IISCON_TXDMA_PAUSE   (1 << 6)

Definition at line 46 of file regs-i2s-v2.h.

#define S3C2412_IISCON_TXFIFO_EMPTY   (1 << 10)

Definition at line 42 of file regs-i2s-v2.h.

#define S3C2412_IISCON_TXFIFO_FULL   (1 << 8)

Definition at line 44 of file regs-i2s-v2.h.

#define S3C2412_IISFIC   (0x08)

Definition at line 18 of file regs-i2s-v2.h.

#define S3C2412_IISFIC_RXCOUNT

(

x

)

(((x) >> 0) & 0xf)

Definition at line 110 of file regs-i2s-v2.h.

#define S3C2412_IISFIC_RXFLUSH   (1 << 7)

Definition at line 108 of file regs-i2s-v2.h.

#define S3C2412_IISFIC_TXCOUNT

(

x

)

(((x) >> 8) & 0xf)

Definition at line 109 of file regs-i2s-v2.h.

#define S3C2412_IISFIC_TXFLUSH   (1 << 15)

Definition at line 107 of file regs-i2s-v2.h.

#define S3C2412_IISMOD   (0x04)

Definition at line 17 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_8BIT   (1 << 0)

Definition at line 98 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_BCLK_16FS   (2 << 1)

Definition at line 95 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_BCLK_24FS   (3 << 1)

Definition at line 96 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_BCLK_32FS   (0 << 1)

Definition at line 93 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_BCLK_48FS   (1 << 1)

Definition at line 94 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_BCLK_MASK   (3 << 1)

Definition at line 97 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_IMS_SYSMUX   (1 << 10)

Definition at line 76 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_LR_LLOW   (0 << 7)

Definition at line 82 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_LR_RLOW   (1 << 7)

Definition at line 83 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_MODE_MASK   (3 << 8)

Definition at line 81 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_MODE_RXONLY   (1 << 8)

Definition at line 79 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_MODE_TXONLY   (0 << 8)

Definition at line 78 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_MODE_TXRX   (2 << 8)

Definition at line 80 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_RCLK_256FS   (0 << 3)

Definition at line 88 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_RCLK_384FS   (2 << 3)

Definition at line 90 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_RCLK_512FS   (1 << 3)

Definition at line 89 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_RCLK_768FS   (3 << 3)

Definition at line 91 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_RCLK_MASK   (3 << 3)

Definition at line 92 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_SDF_IIS   (0 << 5)

Definition at line 84 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_SDF_LSB   (2 << 5)

Definition at line 86 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_SDF_MASK   (3 << 5)

Definition at line 87 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_SDF_MSB   (1 << 5)

Definition at line 85 of file regs-i2s-v2.h.

#define S3C2412_IISMOD_SLAVE   (1 << 11)

Definition at line 77 of file regs-i2s-v2.h.

#define S3C2412_IISPSR   (0x0C)

Definition at line 19 of file regs-i2s-v2.h.

#define S3C2412_IISPSR_PSREN   (1 << 15)

Definition at line 102 of file regs-i2s-v2.h.

#define S3C2412_IISRXD   (0x14)

Definition at line 21 of file regs-i2s-v2.h.

#define S3C2412_IISTXD   (0x10)

Definition at line 20 of file regs-i2s-v2.h.

#define S3C64XX_IISCON_FTXURINTEN   (1 << 16)

Definition at line 35 of file regs-i2s-v2.h.

#define S3C64XX_IISCON_FTXURSTATUS   (1 << 17)

Definition at line 34 of file regs-i2s-v2.h.

#define S3C64XX_IISCON_TXFIFO1_EMPTY   (1 << 14)

Definition at line 37 of file regs-i2s-v2.h.

#define S3C64XX_IISCON_TXFIFO1_FULL   (1 << 12)

Definition at line 39 of file regs-i2s-v2.h.

#define S3C64XX_IISCON_TXFIFO2_EMPTY   (1 << 15)

Definition at line 36 of file regs-i2s-v2.h.

#define S3C64XX_IISCON_TXFIFO2_FULL   (1 << 13)

Definition at line 38 of file regs-i2s-v2.h.

#define S3C64XX_IISFIC_TX1COUNT

(

x

)

(((x) >> 16) & 0xf)

Definition at line 105 of file regs-i2s-v2.h.

#define S3C64XX_IISFIC_TX2COUNT

(

x

)

(((x) >> 24) & 0xf)

Definition at line 104 of file regs-i2s-v2.h.

#define S3C64XX_IISMOD_BLC_16BIT   (0 << 13)

Definition at line 71 of file regs-i2s-v2.h.

#define S3C64XX_IISMOD_BLC_24BIT   (2 << 13)

Definition at line 73 of file regs-i2s-v2.h.

#define S3C64XX_IISMOD_BLC_8BIT   (1 << 13)

Definition at line 72 of file regs-i2s-v2.h.

#define S3C64XX_IISMOD_BLC_MASK   (3 << 13)

Definition at line 74 of file regs-i2s-v2.h.

#define S3C64XX_IISMOD_C1DD_HHALF   (1 << 19)

Definition at line 67 of file regs-i2s-v2.h.

#define S3C64XX_IISMOD_C1DD_LHALF   (1 << 18)

Definition at line 68 of file regs-i2s-v2.h.

#define S3C64XX_IISMOD_C2DD_HHALF   (1 << 21) /* Discard Higher-half */

Definition at line 65 of file regs-i2s-v2.h.

#define S3C64XX_IISMOD_C2DD_LHALF   (1 << 20) /* Discard Lower-half */

Definition at line 66 of file regs-i2s-v2.h.

#define S3C64XX_IISMOD_CDCLKCON   (1 << 12)

Definition at line 100 of file regs-i2s-v2.h.

#define S3C64XX_IISMOD_DC1_EN   (1 << 16)

Definition at line 70 of file regs-i2s-v2.h.

#define S3C64XX_IISMOD_DC2_EN   (1 << 17)

Definition at line 69 of file regs-i2s-v2.h.

#define S5PC1XX_IISCON_FRXOFSTATUS   (1 << 26)

Definition at line 27 of file regs-i2s-v2.h.

#define S5PC1XX_IISCON_FRXORINTEN   (1 << 25)

Definition at line 28 of file regs-i2s-v2.h.

#define S5PC1XX_IISCON_FTXSURINTEN   (1 << 23)

Definition at line 30 of file regs-i2s-v2.h.

#define S5PC1XX_IISCON_FTXSURSTAT   (1 << 24)

Definition at line 29 of file regs-i2s-v2.h.

#define S5PC1XX_IISCON_SW_RST   (1 << 31)

Definition at line 26 of file regs-i2s-v2.h.

#define S5PC1XX_IISCON_TXSDMACTIVE   (1 << 18)

Definition at line 32 of file regs-i2s-v2.h.

#define S5PC1XX_IISCON_TXSDMAPAUSE   (1 << 20)

Definition at line 31 of file regs-i2s-v2.h.

#define S5PC1XX_IISFICS   0x18

Definition at line 23 of file regs-i2s-v2.h.

#define S5PC1XX_IISFICS_TXCOUNT

(

x

)

(((x) >> 8) & 0x7f)

Definition at line 113 of file regs-i2s-v2.h.

#define S5PC1XX_IISFICS_TXFLUSH   (1 << 15)

Definition at line 112 of file regs-i2s-v2.h.

#define S5PC1XX_IISMOD_BLCP_MASK   0x3

Definition at line 62 of file regs-i2s-v2.h.

#define S5PC1XX_IISMOD_BLCP_SHIFT   24

Definition at line 63 of file regs-i2s-v2.h.

#define S5PC1XX_IISMOD_BLCS_MASK   0x3

Definition at line 60 of file regs-i2s-v2.h.

#define S5PC1XX_IISMOD_BLCS_SHIFT   26

Definition at line 61 of file regs-i2s-v2.h.

#define S5PC1XX_IISMOD_OPCLK_BCLK_OUT   (2 << 30)

Definition at line 56 of file regs-i2s-v2.h.

#define S5PC1XX_IISMOD_OPCLK_CDCLK_IN   (1 << 30)

Definition at line 55 of file regs-i2s-v2.h.

#define S5PC1XX_IISMOD_OPCLK_CDCLK_OUT   (0 << 30)

Definition at line 54 of file regs-i2s-v2.h.

#define S5PC1XX_IISMOD_OPCLK_MASK   (3 << 30)

Definition at line 58 of file regs-i2s-v2.h.

#define S5PC1XX_IISMOD_OPCLK_PCLK   (3 << 30)

Definition at line 57 of file regs-i2s-v2.h.

#define S5PC1XX_IISMOD_TXS_IDMA   (1 << 28) /* Sec_TXFIFO use I-DMA */

Definition at line 59 of file regs-i2s-v2.h.

#define S5PC1XX_IISTXDS   0x1C

Definition at line 24 of file regs-i2s-v2.h.