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Macros
regs-mfc.h File Reference
#include <linux/kernel.h>
#include <linux/sizes.h>

Go to the source code of this file.

Macros

#define S5P_FIMV_REG_SIZE   (S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR)
 
#define S5P_FIMV_REG_COUNT   ((S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) / 4)
 
#define S5P_FIMV_START_ADDR   0x0000
 
#define S5P_FIMV_END_ADDR   0xe008
 
#define S5P_FIMV_SW_RESET   0x0000
 
#define S5P_FIMV_RISC_HOST_INT   0x0008
 
#define S5P_FIMV_HOST2RISC_CMD   0x0030
 
#define S5P_FIMV_HOST2RISC_ARG1   0x0034
 
#define S5P_FIMV_HOST2RISC_ARG2   0x0038
 
#define S5P_FIMV_HOST2RISC_ARG3   0x003c
 
#define S5P_FIMV_HOST2RISC_ARG4   0x0040
 
#define S5P_FIMV_RISC2HOST_CMD   0x0044
 
#define S5P_FIMV_RISC2HOST_CMD_MASK   0x1FFFF
 
#define S5P_FIMV_RISC2HOST_ARG1   0x0048
 
#define S5P_FIMV_RISC2HOST_ARG2   0x004c
 
#define S5P_FIMV_RISC2HOST_ARG3   0x0050
 
#define S5P_FIMV_RISC2HOST_ARG4   0x0054
 
#define S5P_FIMV_FW_VERSION   0x0058
 
#define S5P_FIMV_SYS_MEM_SZ   0x005c
 
#define S5P_FIMV_FW_STATUS   0x0080
 
#define S5P_FIMV_MC_DRAMBASE_ADR_A   0x0508
 
#define S5P_FIMV_MC_DRAMBASE_ADR_B   0x050c
 
#define S5P_FIMV_MC_STATUS   0x0510
 
#define S5P_FIMV_COMMON_BASE_A   0x0600
 
#define S5P_FIMV_COMMON_BASE_B   0x0700
 
#define S5P_FIMV_DEC_CHROMA_ADR   (S5P_FIMV_COMMON_BASE_A)
 
#define S5P_FIMV_DEC_LUMA_ADR   (S5P_FIMV_COMMON_BASE_B)
 
#define S5P_FIMV_H264_VERT_NB_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x8c)
 
#define S5P_FIMV_H264_NB_IP_ADR   (S5P_FIMV_COMMON_BASE_A + 0x90)
 
#define S5P_FIMV_H264_MV_ADR   (S5P_FIMV_COMMON_BASE_B + 0x80)
 
#define S5P_FIMV_MPEG4_NB_DCAC_ADR   (S5P_FIMV_COMMON_BASE_A + 0x8c)
 
#define S5P_FIMV_MPEG4_UP_NB_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x90)
 
#define S5P_FIMV_MPEG4_SA_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x94)
 
#define S5P_FIMV_MPEG4_OT_LINE_ADR   (S5P_FIMV_COMMON_BASE_A + 0x98)
 
#define S5P_FIMV_MPEG4_SP_ADR   (S5P_FIMV_COMMON_BASE_A + 0xa8)
 
#define S5P_FIMV_H263_NB_DCAC_ADR   (S5P_FIMV_COMMON_BASE_A + 0x8c)
 
#define S5P_FIMV_H263_UP_NB_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x90)
 
#define S5P_FIMV_H263_SA_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x94)
 
#define S5P_FIMV_H263_OT_LINE_ADR   (S5P_FIMV_COMMON_BASE_A + 0x98)
 
#define S5P_FIMV_VC1_NB_DCAC_ADR   (S5P_FIMV_COMMON_BASE_A + 0x8c)
 
#define S5P_FIMV_VC1_UP_NB_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x90)
 
#define S5P_FIMV_VC1_SA_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x94)
 
#define S5P_FIMV_VC1_OT_LINE_ADR   (S5P_FIMV_COMMON_BASE_A + 0x98)
 
#define S5P_FIMV_VC1_BITPLANE3_ADR   (S5P_FIMV_COMMON_BASE_A + 0x9c)
 
#define S5P_FIMV_VC1_BITPLANE2_ADR   (S5P_FIMV_COMMON_BASE_A + 0xa0)
 
#define S5P_FIMV_VC1_BITPLANE1_ADR   (S5P_FIMV_COMMON_BASE_A + 0xa4)
 
#define S5P_FIMV_ENC_REF0_LUMA_ADR   (S5P_FIMV_COMMON_BASE_A + 0x1c)
 
#define S5P_FIMV_ENC_REF1_LUMA_ADR   (S5P_FIMV_COMMON_BASE_A + 0x20)
 
#define S5P_FIMV_ENC_REF0_CHROMA_ADR   (S5P_FIMV_COMMON_BASE_B)
 
#define S5P_FIMV_ENC_REF1_CHROMA_ADR   (S5P_FIMV_COMMON_BASE_B + 0x04)
 
#define S5P_FIMV_ENC_REF2_LUMA_ADR   (S5P_FIMV_COMMON_BASE_B + 0x10)
 
#define S5P_FIMV_ENC_REF2_CHROMA_ADR   (S5P_FIMV_COMMON_BASE_B + 0x08)
 
#define S5P_FIMV_ENC_REF3_LUMA_ADR   (S5P_FIMV_COMMON_BASE_B + 0x14)
 
#define S5P_FIMV_ENC_REF3_CHROMA_ADR   (S5P_FIMV_COMMON_BASE_B + 0x0c)
 
#define S5P_FIMV_H264_UP_MV_ADR   (S5P_FIMV_COMMON_BASE_A)
 
#define S5P_FIMV_H264_NBOR_INFO_ADR   (S5P_FIMV_COMMON_BASE_A + 0x04)
 
#define S5P_FIMV_H264_UP_INTRA_MD_ADR   (S5P_FIMV_COMMON_BASE_A + 0x08)
 
#define S5P_FIMV_H264_COZERO_FLAG_ADR   (S5P_FIMV_COMMON_BASE_A + 0x10)
 
#define S5P_FIMV_H264_UP_INTRA_PRED_ADR   (S5P_FIMV_COMMON_BASE_B + 0x40)
 
#define S5P_FIMV_H263_UP_MV_ADR   (S5P_FIMV_COMMON_BASE_A)
 
#define S5P_FIMV_H263_ACDC_COEF_ADR   (S5P_FIMV_COMMON_BASE_A + 0x04)
 
#define S5P_FIMV_MPEG4_UP_MV_ADR   (S5P_FIMV_COMMON_BASE_A)
 
#define S5P_FIMV_MPEG4_ACDC_COEF_ADR   (S5P_FIMV_COMMON_BASE_A + 0x04)
 
#define S5P_FIMV_MPEG4_COZERO_FLAG_ADR   (S5P_FIMV_COMMON_BASE_A + 0x10)
 
#define S5P_FIMV_ENC_REF_B_LUMA_ADR   0x062c /* ref B Luma addr */
 
#define S5P_FIMV_ENC_REF_B_CHROMA_ADR   0x0630 /* ref B Chroma addr */
 
#define S5P_FIMV_ENC_CUR_LUMA_ADR   0x0718 /* current Luma addr */
 
#define S5P_FIMV_ENC_CUR_CHROMA_ADR   0x071C /* current Chroma addr */
 
#define S5P_FIMV_ENC_HSIZE_PX   0x0818 /* frame width at encoder */
 
#define S5P_FIMV_ENC_VSIZE_PX   0x081c /* frame height at encoder */
 
#define S5P_FIMV_ENC_PROFILE   0x0830 /* profile register */
 
#define S5P_FIMV_ENC_PROFILE_H264_MAIN   0
 
#define S5P_FIMV_ENC_PROFILE_H264_HIGH   1
 
#define S5P_FIMV_ENC_PROFILE_H264_BASELINE   2
 
#define S5P_FIMV_ENC_PROFILE_H264_CONSTRAINED_BASELINE   3
 
#define S5P_FIMV_ENC_PROFILE_MPEG4_SIMPLE   0
 
#define S5P_FIMV_ENC_PROFILE_MPEG4_ADVANCED_SIMPLE   1
 
#define S5P_FIMV_ENC_PIC_STRUCT   0x083c /* picture field/frame flag */
 
#define S5P_FIMV_ENC_LF_CTRL   0x0848 /* loop filter control */
 
#define S5P_FIMV_ENC_ALPHA_OFF   0x084c /* loop filter alpha offset */
 
#define S5P_FIMV_ENC_BETA_OFF   0x0850 /* loop filter beta offset */
 
#define S5P_FIMV_MR_BUSIF_CTRL   0x0854 /* hidden, bus interface ctrl */
 
#define S5P_FIMV_ENC_PXL_CACHE_CTRL   0x0a00 /* pixel cache control */
 
#define S5P_FIMV_SI_RTN_CHID   0x2000 /* Return CH inst ID register */
 
#define S5P_FIMV_SI_CH0_INST_ID   0x2040 /* codec instance ID */
 
#define S5P_FIMV_SI_CH1_INST_ID   0x2080 /* codec instance ID */
 
#define S5P_FIMV_SI_VRESOL   0x2004 /* vertical res of decoder */
 
#define S5P_FIMV_SI_HRESOL   0x2008 /* horizontal res of decoder */
 
#define S5P_FIMV_SI_BUF_NUMBER
 
#define S5P_FIMV_SI_DISPLAY_Y_ADR   0x2010 /* luma addr of displayed pic */
 
#define S5P_FIMV_SI_DISPLAY_C_ADR   0x2014 /* chroma addrof displayed pic */
 
#define S5P_FIMV_SI_CONSUMED_BYTES
 
#define S5P_FIMV_SI_DISPLAY_STATUS   0x201c /* status of decoded picture */
 
#define S5P_FIMV_SI_DECODE_Y_ADR   0x2024 /* luma addr of decoded pic */
 
#define S5P_FIMV_SI_DECODE_C_ADR   0x2028 /* chroma addrof decoded pic */
 
#define S5P_FIMV_SI_DECODE_STATUS   0x202c /* status of decoded picture */
 
#define S5P_FIMV_SI_CH0_SB_ST_ADR   0x2044 /* start addr of stream buf */
 
#define S5P_FIMV_SI_CH0_SB_FRM_SIZE   0x2048 /* size of stream buf */
 
#define S5P_FIMV_SI_CH0_DESC_ADR   0x204c /* addr of descriptor buf */
 
#define S5P_FIMV_SI_CH0_CPB_SIZE   0x2058 /* max size of coded pic. buf */
 
#define S5P_FIMV_SI_CH0_DESC_SIZE   0x205c /* max size of descriptor buf */
 
#define S5P_FIMV_SI_CH1_SB_ST_ADR   0x2084 /* start addr of stream buf */
 
#define S5P_FIMV_SI_CH1_SB_FRM_SIZE   0x2088 /* size of stream buf */
 
#define S5P_FIMV_SI_CH1_DESC_ADR   0x208c /* addr of descriptor buf */
 
#define S5P_FIMV_SI_CH1_CPB_SIZE   0x2098 /* max size of coded pic. buf */
 
#define S5P_FIMV_SI_CH1_DESC_SIZE   0x209c /* max size of descriptor buf */
 
#define S5P_FIMV_CRC_LUMA0
 
#define S5P_FIMV_CRC_CHROMA0
 
#define S5P_FIMV_CRC_LUMA1
 
#define S5P_FIMV_CRC_CHROMA1
 
#define S5P_FIMV_DEC_STATUS_DECODING_ONLY   0
 
#define S5P_FIMV_DEC_STATUS_DECODING_DISPLAY   1
 
#define S5P_FIMV_DEC_STATUS_DISPLAY_ONLY   2
 
#define S5P_FIMV_DEC_STATUS_DECODING_EMPTY   3
 
#define S5P_FIMV_DEC_STATUS_DECODING_STATUS_MASK   7
 
#define S5P_FIMV_DEC_STATUS_PROGRESSIVE   (0<<3)
 
#define S5P_FIMV_DEC_STATUS_INTERLACE   (1<<3)
 
#define S5P_FIMV_DEC_STATUS_INTERLACE_MASK   (1<<3)
 
#define S5P_FIMV_DEC_STATUS_CRC_NUMBER_TWO   (0<<4)
 
#define S5P_FIMV_DEC_STATUS_CRC_NUMBER_FOUR   (1<<4)
 
#define S5P_FIMV_DEC_STATUS_CRC_NUMBER_MASK   (1<<4)
 
#define S5P_FIMV_DEC_STATUS_CRC_GENERATED   (1<<5)
 
#define S5P_FIMV_DEC_STATUS_CRC_NOT_GENERATED   (0<<5)
 
#define S5P_FIMV_DEC_STATUS_CRC_MASK   (1<<5)
 
#define S5P_FIMV_DEC_STATUS_RESOLUTION_MASK   (3<<4)
 
#define S5P_FIMV_DEC_STATUS_RESOLUTION_INC   (1<<4)
 
#define S5P_FIMV_DEC_STATUS_RESOLUTION_DEC   (2<<4)
 
#define S5P_FIMV_DEC_STATUS_RESOLUTION_SHIFT   4
 
#define S5P_FIMV_DECODE_Y_ADR   0x2024
 
#define S5P_FIMV_DECODE_C_ADR   0x2028
 
#define S5P_FIMV_DECODE_FRAME_TYPE   0x2020
 
#define S5P_FIMV_DECODE_FRAME_MASK   7
 
#define S5P_FIMV_DECODE_FRAME_SKIPPED   0
 
#define S5P_FIMV_DECODE_FRAME_I_FRAME   1
 
#define S5P_FIMV_DECODE_FRAME_P_FRAME   2
 
#define S5P_FIMV_DECODE_FRAME_B_FRAME   3
 
#define S5P_FIMV_DECODE_FRAME_OTHER_FRAME   4
 
#define S5P_FIMV_DEC_NB_IP_SIZE   (32 * 1024)
 
#define S5P_FIMV_DEC_VERT_NB_MV_SIZE   (16 * 1024)
 
#define S5P_FIMV_DEC_NB_DCAC_SIZE   (16 * 1024)
 
#define S5P_FIMV_DEC_UPNB_MV_SIZE   (68 * 1024)
 
#define S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE   (136 * 1024)
 
#define S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE   (32 * 1024)
 
#define S5P_FIMV_DEC_VC1_BITPLANE_SIZE   (2 * 1024)
 
#define S5P_FIMV_DEC_STX_PARSER_SIZE   (68 * 1024)
 
#define S5P_FIMV_DEC_BUF_ALIGN   (8 * 1024)
 
#define S5P_FIMV_ENC_BUF_ALIGN   (8 * 1024)
 
#define S5P_FIMV_NV12M_HALIGN   16
 
#define S5P_FIMV_NV12M_LVALIGN   16
 
#define S5P_FIMV_NV12M_CVALIGN   8
 
#define S5P_FIMV_NV12MT_HALIGN   128
 
#define S5P_FIMV_NV12MT_VALIGN   32
 
#define S5P_FIMV_NV12M_SALIGN   2048
 
#define S5P_FIMV_NV12MT_SALIGN   8192
 
#define S5P_FIMV_ENC_UPMV_SIZE   0x10000
 
#define S5P_FIMV_ENC_COLFLG_SIZE   0x10000
 
#define S5P_FIMV_ENC_INTRAMD_SIZE   0x10000
 
#define S5P_FIMV_ENC_INTRAPRED_SIZE   0x4000
 
#define S5P_FIMV_ENC_NBORINFO_SIZE   0x10000
 
#define S5P_FIMV_ENC_ACDCCOEF_SIZE   0x10000
 
#define S5P_FIMV_ENC_SI_STRM_SIZE   0x2004 /* stream size */
 
#define S5P_FIMV_ENC_SI_PIC_CNT   0x2008 /* picture count */
 
#define S5P_FIMV_ENC_SI_WRITE_PTR   0x200c /* write pointer */
 
#define S5P_FIMV_ENC_SI_SLICE_TYPE   0x2010 /* slice type(I/P/B/IDR) */
 
#define S5P_FIMV_ENC_SI_SLICE_TYPE_NON_CODED   0
 
#define S5P_FIMV_ENC_SI_SLICE_TYPE_I   1
 
#define S5P_FIMV_ENC_SI_SLICE_TYPE_P   2
 
#define S5P_FIMV_ENC_SI_SLICE_TYPE_B   3
 
#define S5P_FIMV_ENC_SI_SLICE_TYPE_SKIPPED   4
 
#define S5P_FIMV_ENC_SI_SLICE_TYPE_OTHERS   5
 
#define S5P_FIMV_ENCODED_Y_ADDR
 
#define S5P_FIMV_ENCODED_C_ADDR
 
#define S5P_FIMV_ENC_SI_CH0_SB_ADR   0x2044 /* addr of stream buf */
 
#define S5P_FIMV_ENC_SI_CH0_SB_SIZE   0x204c /* size of stream buf */
 
#define S5P_FIMV_ENC_SI_CH0_CUR_Y_ADR   0x2050 /* current Luma addr */
 
#define S5P_FIMV_ENC_SI_CH0_CUR_C_ADR   0x2054 /* current Chroma addr */
 
#define S5P_FIMV_ENC_SI_CH0_FRAME_INS   0x2058 /* frame insertion */
 
#define S5P_FIMV_ENC_SI_CH1_SB_ADR   0x2084 /* addr of stream buf */
 
#define S5P_FIMV_ENC_SI_CH1_SB_SIZE   0x208c /* size of stream buf */
 
#define S5P_FIMV_ENC_SI_CH1_CUR_Y_ADR   0x2090 /* current Luma addr */
 
#define S5P_FIMV_ENC_SI_CH1_CUR_C_ADR   0x2094 /* current Chroma addr */
 
#define S5P_FIMV_ENC_SI_CH1_FRAME_INS   0x2098 /* frame insertion */
 
#define S5P_FIMV_ENC_PIC_TYPE_CTRL   0xc504 /* pic type level control */
 
#define S5P_FIMV_ENC_B_RECON_WRITE_ON   0xc508 /* B frame recon write ctrl */
 
#define S5P_FIMV_ENC_MSLICE_CTRL   0xc50c /* multi slice control */
 
#define S5P_FIMV_ENC_MSLICE_MB   0xc510 /* MB number in the one slice */
 
#define S5P_FIMV_ENC_MSLICE_BIT   0xc514 /* bit count for one slice */
 
#define S5P_FIMV_ENC_CIR_CTRL   0xc518 /* number of intra refresh MB */
 
#define S5P_FIMV_ENC_MAP_FOR_CUR   0xc51c /* linear or tiled mode */
 
#define S5P_FIMV_ENC_PADDING_CTRL   0xc520 /* padding control */
 
#define S5P_FIMV_ENC_RC_CONFIG   0xc5a0 /* RC config */
 
#define S5P_FIMV_ENC_RC_BIT_RATE   0xc5a8 /* bit rate */
 
#define S5P_FIMV_ENC_RC_QBOUND   0xc5ac /* max/min QP */
 
#define S5P_FIMV_ENC_RC_RPARA   0xc5b0 /* rate control reaction coeff */
 
#define S5P_FIMV_ENC_RC_MB_CTRL   0xc5b4 /* MB adaptive scaling */
 
#define S5P_FIMV_ENC_H264_ENTROPY_MODE   0xd004 /* CAVLC or CABAC */
 
#define S5P_FIMV_ENC_H264_ALPHA_OFF   0xd008 /* loop filter alpha offset */
 
#define S5P_FIMV_ENC_H264_BETA_OFF   0xd00c /* loop filter beta offset */
 
#define S5P_FIMV_ENC_H264_NUM_OF_REF   0xd010 /* number of reference for P/B */
 
#define S5P_FIMV_ENC_H264_TRANS_FLAG
 
#define S5P_FIMV_ENC_RC_FRAME_RATE   0xd0d0 /* frame rate */
 
#define S5P_FIMV_ENC_MPEG4_QUART_PXL   0xe008 /* qpel interpolation ctrl */
 
#define S5P_FIMV_SI_CH0_DPB_CONF_CTRL   0x2068 /* DPB Config Control Register */
 
#define S5P_FIMV_SLICE_INT_MASK   1
 
#define S5P_FIMV_SLICE_INT_SHIFT   31
 
#define S5P_FIMV_DDELAY_ENA_SHIFT   30
 
#define S5P_FIMV_DDELAY_VAL_MASK   0xff
 
#define S5P_FIMV_DDELAY_VAL_SHIFT   16
 
#define S5P_FIMV_DPB_COUNT_MASK   0xffff
 
#define S5P_FIMV_DPB_FLUSH_MASK   1
 
#define S5P_FIMV_DPB_FLUSH_SHIFT   14
 
#define S5P_FIMV_SI_CH0_RELEASE_BUF   0x2060 /* DPB release buffer register */
 
#define S5P_FIMV_SI_CH0_HOST_WR_ADR   0x2064 /* address of shared memory */
 
#define S5P_FIMV_CODEC_NONE   -1
 
#define S5P_FIMV_CODEC_H264_DEC   0
 
#define S5P_FIMV_CODEC_VC1_DEC   1
 
#define S5P_FIMV_CODEC_MPEG4_DEC   2
 
#define S5P_FIMV_CODEC_MPEG2_DEC   3
 
#define S5P_FIMV_CODEC_H263_DEC   4
 
#define S5P_FIMV_CODEC_VC1RCV_DEC   5
 
#define S5P_FIMV_CODEC_H264_ENC   16
 
#define S5P_FIMV_CODEC_MPEG4_ENC   17
 
#define S5P_FIMV_CODEC_H263_ENC   18
 
#define S5P_FIMV_CH_SEQ_HEADER   1
 
#define S5P_FIMV_CH_FRAME_START   2
 
#define S5P_FIMV_CH_LAST_FRAME   3
 
#define S5P_FIMV_CH_INIT_BUFS   4
 
#define S5P_FIMV_CH_FRAME_START_REALLOC   5
 
#define S5P_FIMV_CH_MASK   7
 
#define S5P_FIMV_CH_SHIFT   16
 
#define S5P_FIMV_H2R_CMD_EMPTY   0
 
#define S5P_FIMV_H2R_CMD_OPEN_INSTANCE   1
 
#define S5P_FIMV_H2R_CMD_CLOSE_INSTANCE   2
 
#define S5P_FIMV_H2R_CMD_SYS_INIT   3
 
#define S5P_FIMV_H2R_CMD_FLUSH   4
 
#define S5P_FIMV_H2R_CMD_SLEEP   5
 
#define S5P_FIMV_H2R_CMD_WAKEUP   6
 
#define S5P_FIMV_R2H_CMD_EMPTY   0
 
#define S5P_FIMV_R2H_CMD_OPEN_INSTANCE_RET   1
 
#define S5P_FIMV_R2H_CMD_CLOSE_INSTANCE_RET   2
 
#define S5P_FIMV_R2H_CMD_RSV_RET   3
 
#define S5P_FIMV_R2H_CMD_SEQ_DONE_RET   4
 
#define S5P_FIMV_R2H_CMD_FRAME_DONE_RET   5
 
#define S5P_FIMV_R2H_CMD_SLICE_DONE_RET   6
 
#define S5P_FIMV_R2H_CMD_ENC_COMPLETE_RET   7
 
#define S5P_FIMV_R2H_CMD_SYS_INIT_RET   8
 
#define S5P_FIMV_R2H_CMD_FW_STATUS_RET   9
 
#define S5P_FIMV_R2H_CMD_SLEEP_RET   10
 
#define S5P_FIMV_R2H_CMD_WAKEUP_RET   11
 
#define S5P_FIMV_R2H_CMD_FLUSH_RET   12
 
#define S5P_FIMV_R2H_CMD_INIT_BUFFERS_RET   15
 
#define S5P_FIMV_R2H_CMD_EDFU_INIT_RET   16
 
#define S5P_FIMV_R2H_CMD_ERR_RET   32
 
#define S5P_FIMV_CODEC_H264_MVC_DEC   -1
 
#define S5P_FIMV_R2H_CMD_FIELD_DONE_RET   -1
 
#define S5P_FIMV_MFC_RESET   -1
 
#define S5P_FIMV_RISC_ON   -1
 
#define S5P_FIMV_RISC_BASE_ADDRESS   -1
 
#define S5P_FIMV_CODEC_VP8_DEC   -1
 
#define S5P_FIMV_REG_CLEAR_BEGIN   0
 
#define S5P_FIMV_REG_CLEAR_COUNT   0
 
#define S5P_FIMV_ERR_WARNINGS_START   145
 
#define S5P_FIMV_ERR_DEC_MASK   0xFFFF
 
#define S5P_FIMV_ERR_DEC_SHIFT   0
 
#define S5P_FIMV_ERR_DSPL_MASK   0xFFFF0000
 
#define S5P_FIMV_ERR_DSPL_SHIFT   16
 
#define S5P_FIMV_SHARED_CROP_INFO_H   0x0020
 
#define S5P_FIMV_SHARED_CROP_LEFT_MASK   0xFFFF
 
#define S5P_FIMV_SHARED_CROP_LEFT_SHIFT   0
 
#define S5P_FIMV_SHARED_CROP_RIGHT_MASK   0xFFFF0000
 
#define S5P_FIMV_SHARED_CROP_RIGHT_SHIFT   16
 
#define S5P_FIMV_SHARED_CROP_INFO_V   0x0024
 
#define S5P_FIMV_SHARED_CROP_TOP_MASK   0xFFFF
 
#define S5P_FIMV_SHARED_CROP_TOP_SHIFT   0
 
#define S5P_FIMV_SHARED_CROP_BOTTOM_MASK   0xFFFF0000
 
#define S5P_FIMV_SHARED_CROP_BOTTOM_SHIFT   16
 
#define S5P_FIMV_SHARED_SET_FRAME_TAG   0x0004
 
#define S5P_FIMV_SHARED_GET_FRAME_TAG_TOP   0x0008
 
#define S5P_FIMV_SHARED_GET_FRAME_TAG_BOT   0x000C
 
#define S5P_FIMV_SHARED_START_BYTE_NUM   0x0018
 
#define S5P_FIMV_SHARED_RC_VOP_TIMING   0x0030
 
#define S5P_FIMV_SHARED_LUMA_DPB_SIZE   0x0064
 
#define S5P_FIMV_SHARED_CHROMA_DPB_SIZE   0x0068
 
#define S5P_FIMV_SHARED_MV_SIZE   0x006C
 
#define S5P_FIMV_SHARED_PIC_TIME_TOP   0x0010
 
#define S5P_FIMV_SHARED_PIC_TIME_BOTTOM   0x0014
 
#define S5P_FIMV_SHARED_EXT_ENC_CONTROL   0x0028
 
#define S5P_FIMV_SHARED_P_B_FRAME_QP   0x0070
 
#define S5P_FIMV_SHARED_ASPECT_RATIO_IDC   0x0074
 
#define S5P_FIMV_SHARED_EXTENDED_SAR   0x0078
 
#define S5P_FIMV_SHARED_H264_I_PERIOD   0x009C
 
#define S5P_FIMV_SHARED_RC_CONTROL_CONFIG   0x00A0
 
#define S5P_FIMV_SHARED_DISP_FRAME_TYPE_SHIFT   2
 
#define MFC_OFFSET_SHIFT   11
 
#define FIRMWARE_ALIGN   (128 * SZ_1K) /* 128KB */
 
#define MFC_H264_CTX_BUF_SIZE   (600 * SZ_1K) /* 600KB per H264 instance */
 
#define MFC_CTX_BUF_SIZE   (10 * SZ_1K) /* 10KB per instance */
 
#define DESC_BUF_SIZE   (128 * SZ_1K) /* 128KB for DESC buffer */
 
#define SHARED_BUF_SIZE   (8 * SZ_1K) /* 8KB for shared buffer */
 
#define DEF_CPB_SIZE   (256 * SZ_1K) /* 256KB */
 
#define MAX_CPB_SIZE   (4 * SZ_1M) /* 4MB */
 
#define MAX_FW_SIZE   (384 * SZ_1K)
 
#define MFC_VERSION   0x51
 
#define MFC_NUM_PORTS   2
 
#define S5P_FIMV_SHARED_FRAME_PACK_SEI_AVAIL   0x16C
 
#define S5P_FIMV_SHARED_FRAME_PACK_ARRGMENT_ID   0x170
 
#define S5P_FIMV_SHARED_FRAME_PACK_SEI_INFO   0x174
 
#define S5P_FIMV_SHARED_FRAME_PACK_GRID_POS   0x178
 
#define S5P_FIMV_RES_INCREASE   1
 
#define S5P_FIMV_RES_DECREASE   2
 

Macro Definition Documentation

#define DEF_CPB_SIZE   (256 * SZ_1K) /* 256KB */

Definition at line 434 of file regs-mfc.h.

#define DESC_BUF_SIZE   (128 * SZ_1K) /* 128KB for DESC buffer */

Definition at line 431 of file regs-mfc.h.

#define FIRMWARE_ALIGN   (128 * SZ_1K) /* 128KB */

Definition at line 428 of file regs-mfc.h.

#define MAX_CPB_SIZE   (4 * SZ_1M) /* 4MB */

Definition at line 435 of file regs-mfc.h.

#define MAX_FW_SIZE   (384 * SZ_1K)

Definition at line 436 of file regs-mfc.h.

#define MFC_CTX_BUF_SIZE   (10 * SZ_1K) /* 10KB per instance */

Definition at line 430 of file regs-mfc.h.

#define MFC_H264_CTX_BUF_SIZE   (600 * SZ_1K) /* 600KB per H264 instance */

Definition at line 429 of file regs-mfc.h.

#define MFC_NUM_PORTS   2

Definition at line 439 of file regs-mfc.h.

#define MFC_OFFSET_SHIFT   11

Definition at line 426 of file regs-mfc.h.

#define MFC_VERSION   0x51

Definition at line 438 of file regs-mfc.h.

#define S5P_FIMV_CH_FRAME_START   2

Definition at line 342 of file regs-mfc.h.

#define S5P_FIMV_CH_FRAME_START_REALLOC   5

Definition at line 345 of file regs-mfc.h.

#define S5P_FIMV_CH_INIT_BUFS   4

Definition at line 344 of file regs-mfc.h.

#define S5P_FIMV_CH_LAST_FRAME   3

Definition at line 343 of file regs-mfc.h.

#define S5P_FIMV_CH_MASK   7

Definition at line 346 of file regs-mfc.h.

#define S5P_FIMV_CH_SEQ_HEADER   1

Definition at line 341 of file regs-mfc.h.

#define S5P_FIMV_CH_SHIFT   16

Definition at line 347 of file regs-mfc.h.

#define S5P_FIMV_CODEC_H263_DEC   4

Definition at line 333 of file regs-mfc.h.

#define S5P_FIMV_CODEC_H263_ENC   18

Definition at line 338 of file regs-mfc.h.

#define S5P_FIMV_CODEC_H264_DEC   0

Definition at line 329 of file regs-mfc.h.

#define S5P_FIMV_CODEC_H264_ENC   16

Definition at line 336 of file regs-mfc.h.

#define S5P_FIMV_CODEC_H264_MVC_DEC   -1

Definition at line 377 of file regs-mfc.h.

#define S5P_FIMV_CODEC_MPEG2_DEC   3

Definition at line 332 of file regs-mfc.h.

#define S5P_FIMV_CODEC_MPEG4_DEC   2

Definition at line 331 of file regs-mfc.h.

#define S5P_FIMV_CODEC_MPEG4_ENC   17

Definition at line 337 of file regs-mfc.h.

#define S5P_FIMV_CODEC_NONE   -1

Definition at line 327 of file regs-mfc.h.

#define S5P_FIMV_CODEC_VC1_DEC   1

Definition at line 330 of file regs-mfc.h.

#define S5P_FIMV_CODEC_VC1RCV_DEC   5

Definition at line 334 of file regs-mfc.h.

#define S5P_FIMV_CODEC_VP8_DEC   -1

Definition at line 382 of file regs-mfc.h.

#define S5P_FIMV_COMMON_BASE_A   0x0600

Definition at line 54 of file regs-mfc.h.

#define S5P_FIMV_COMMON_BASE_B   0x0700

Definition at line 55 of file regs-mfc.h.

#define S5P_FIMV_CRC_CHROMA0
Value:
0x2034 /* chroma crc data per frame
(top field) */

Definition at line 191 of file regs-mfc.h.

#define S5P_FIMV_CRC_CHROMA1
Value:
0x203c /* chroma crc data per bottom
field */

Definition at line 193 of file regs-mfc.h.

#define S5P_FIMV_CRC_LUMA0
Value:
0x2030 /* luma crc data per frame
(top field) */

Definition at line 190 of file regs-mfc.h.

#define S5P_FIMV_CRC_LUMA1
Value:
0x2038 /* luma crc data per bottom
field */

Definition at line 192 of file regs-mfc.h.

#define S5P_FIMV_DDELAY_ENA_SHIFT   30

Definition at line 315 of file regs-mfc.h.

#define S5P_FIMV_DDELAY_VAL_MASK   0xff

Definition at line 316 of file regs-mfc.h.

#define S5P_FIMV_DDELAY_VAL_SHIFT   16

Definition at line 317 of file regs-mfc.h.

#define S5P_FIMV_DEC_BUF_ALIGN   (8 * 1024)

Definition at line 240 of file regs-mfc.h.

#define S5P_FIMV_DEC_CHROMA_ADR   (S5P_FIMV_COMMON_BASE_A)

Definition at line 58 of file regs-mfc.h.

#define S5P_FIMV_DEC_LUMA_ADR   (S5P_FIMV_COMMON_BASE_B)

Definition at line 59 of file regs-mfc.h.

#define S5P_FIMV_DEC_NB_DCAC_SIZE   (16 * 1024)

Definition at line 233 of file regs-mfc.h.

#define S5P_FIMV_DEC_NB_IP_SIZE   (32 * 1024)

Definition at line 231 of file regs-mfc.h.

#define S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE   (32 * 1024)

Definition at line 236 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_CRC_GENERATED   (1<<5)

Definition at line 207 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_CRC_MASK   (1<<5)

Definition at line 209 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_CRC_NOT_GENERATED   (0<<5)

Definition at line 208 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_CRC_NUMBER_FOUR   (1<<4)

Definition at line 205 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_CRC_NUMBER_MASK   (1<<4)

Definition at line 206 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_CRC_NUMBER_TWO   (0<<4)

Definition at line 204 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_DECODING_DISPLAY   1

Definition at line 197 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_DECODING_EMPTY   3

Definition at line 199 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_DECODING_ONLY   0

Definition at line 196 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_DECODING_STATUS_MASK   7

Definition at line 200 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_DISPLAY_ONLY   2

Definition at line 198 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_INTERLACE   (1<<3)

Definition at line 202 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_INTERLACE_MASK   (1<<3)

Definition at line 203 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_PROGRESSIVE   (0<<3)

Definition at line 201 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_RESOLUTION_DEC   (2<<4)

Definition at line 213 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_RESOLUTION_INC   (1<<4)

Definition at line 212 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_RESOLUTION_MASK   (3<<4)

Definition at line 211 of file regs-mfc.h.

#define S5P_FIMV_DEC_STATUS_RESOLUTION_SHIFT   4

Definition at line 214 of file regs-mfc.h.

#define S5P_FIMV_DEC_STX_PARSER_SIZE   (68 * 1024)

Definition at line 238 of file regs-mfc.h.

#define S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE   (136 * 1024)

Definition at line 235 of file regs-mfc.h.

#define S5P_FIMV_DEC_UPNB_MV_SIZE   (68 * 1024)

Definition at line 234 of file regs-mfc.h.

#define S5P_FIMV_DEC_VC1_BITPLANE_SIZE   (2 * 1024)

Definition at line 237 of file regs-mfc.h.

#define S5P_FIMV_DEC_VERT_NB_MV_SIZE   (16 * 1024)

Definition at line 232 of file regs-mfc.h.

#define S5P_FIMV_DECODE_C_ADR   0x2028

Definition at line 218 of file regs-mfc.h.

#define S5P_FIMV_DECODE_FRAME_B_FRAME   3

Definition at line 227 of file regs-mfc.h.

#define S5P_FIMV_DECODE_FRAME_I_FRAME   1

Definition at line 225 of file regs-mfc.h.

#define S5P_FIMV_DECODE_FRAME_MASK   7

Definition at line 222 of file regs-mfc.h.

#define S5P_FIMV_DECODE_FRAME_OTHER_FRAME   4

Definition at line 228 of file regs-mfc.h.

#define S5P_FIMV_DECODE_FRAME_P_FRAME   2

Definition at line 226 of file regs-mfc.h.

#define S5P_FIMV_DECODE_FRAME_SKIPPED   0

Definition at line 224 of file regs-mfc.h.

#define S5P_FIMV_DECODE_FRAME_TYPE   0x2020

Definition at line 221 of file regs-mfc.h.

#define S5P_FIMV_DECODE_Y_ADR   0x2024

Definition at line 217 of file regs-mfc.h.

#define S5P_FIMV_DPB_COUNT_MASK   0xffff

Definition at line 318 of file regs-mfc.h.

#define S5P_FIMV_DPB_FLUSH_MASK   1

Definition at line 319 of file regs-mfc.h.

#define S5P_FIMV_DPB_FLUSH_SHIFT   14

Definition at line 320 of file regs-mfc.h.

#define S5P_FIMV_ENC_ACDCCOEF_SIZE   0x10000

Definition at line 256 of file regs-mfc.h.

#define S5P_FIMV_ENC_ALPHA_OFF   0x084c /* loop filter alpha offset */

Definition at line 155 of file regs-mfc.h.

#define S5P_FIMV_ENC_B_RECON_WRITE_ON   0xc508 /* B frame recon write ctrl */

Definition at line 285 of file regs-mfc.h.

#define S5P_FIMV_ENC_BETA_OFF   0x0850 /* loop filter beta offset */

Definition at line 156 of file regs-mfc.h.

#define S5P_FIMV_ENC_BUF_ALIGN   (8 * 1024)

Definition at line 241 of file regs-mfc.h.

#define S5P_FIMV_ENC_CIR_CTRL   0xc518 /* number of intra refresh MB */

Definition at line 289 of file regs-mfc.h.

#define S5P_FIMV_ENC_COLFLG_SIZE   0x10000

Definition at line 252 of file regs-mfc.h.

#define S5P_FIMV_ENC_CUR_CHROMA_ADR   0x071C /* current Chroma addr */

Definition at line 141 of file regs-mfc.h.

#define S5P_FIMV_ENC_CUR_LUMA_ADR   0x0718 /* current Luma addr */

Definition at line 140 of file regs-mfc.h.

#define S5P_FIMV_ENC_H264_ALPHA_OFF   0xd008 /* loop filter alpha offset */

Definition at line 301 of file regs-mfc.h.

#define S5P_FIMV_ENC_H264_BETA_OFF   0xd00c /* loop filter beta offset */

Definition at line 302 of file regs-mfc.h.

#define S5P_FIMV_ENC_H264_ENTROPY_MODE   0xd004 /* CAVLC or CABAC */

Definition at line 300 of file regs-mfc.h.

#define S5P_FIMV_ENC_H264_NUM_OF_REF   0xd010 /* number of reference for P/B */

Definition at line 303 of file regs-mfc.h.

#define S5P_FIMV_ENC_H264_TRANS_FLAG
Value:
0xd034 /* 8x8 transform flag in PPS &
high profile */

Definition at line 304 of file regs-mfc.h.

#define S5P_FIMV_ENC_HSIZE_PX   0x0818 /* frame width at encoder */

Definition at line 144 of file regs-mfc.h.

#define S5P_FIMV_ENC_INTRAMD_SIZE   0x10000

Definition at line 253 of file regs-mfc.h.

#define S5P_FIMV_ENC_INTRAPRED_SIZE   0x4000

Definition at line 254 of file regs-mfc.h.

#define S5P_FIMV_ENC_LF_CTRL   0x0848 /* loop filter control */

Definition at line 154 of file regs-mfc.h.

#define S5P_FIMV_ENC_MAP_FOR_CUR   0xc51c /* linear or tiled mode */

Definition at line 290 of file regs-mfc.h.

#define S5P_FIMV_ENC_MPEG4_QUART_PXL   0xe008 /* qpel interpolation ctrl */

Definition at line 309 of file regs-mfc.h.

#define S5P_FIMV_ENC_MSLICE_BIT   0xc514 /* bit count for one slice */

Definition at line 288 of file regs-mfc.h.

#define S5P_FIMV_ENC_MSLICE_CTRL   0xc50c /* multi slice control */

Definition at line 286 of file regs-mfc.h.

#define S5P_FIMV_ENC_MSLICE_MB   0xc510 /* MB number in the one slice */

Definition at line 287 of file regs-mfc.h.

#define S5P_FIMV_ENC_NBORINFO_SIZE   0x10000

Definition at line 255 of file regs-mfc.h.

#define S5P_FIMV_ENC_PADDING_CTRL   0xc520 /* padding control */

Definition at line 291 of file regs-mfc.h.

#define S5P_FIMV_ENC_PIC_STRUCT   0x083c /* picture field/frame flag */

Definition at line 153 of file regs-mfc.h.

#define S5P_FIMV_ENC_PIC_TYPE_CTRL   0xc504 /* pic type level control */

Definition at line 284 of file regs-mfc.h.

#define S5P_FIMV_ENC_PROFILE   0x0830 /* profile register */

Definition at line 146 of file regs-mfc.h.

#define S5P_FIMV_ENC_PROFILE_H264_BASELINE   2

Definition at line 149 of file regs-mfc.h.

#define S5P_FIMV_ENC_PROFILE_H264_CONSTRAINED_BASELINE   3

Definition at line 150 of file regs-mfc.h.

#define S5P_FIMV_ENC_PROFILE_H264_HIGH   1

Definition at line 148 of file regs-mfc.h.

#define S5P_FIMV_ENC_PROFILE_H264_MAIN   0

Definition at line 147 of file regs-mfc.h.

#define S5P_FIMV_ENC_PROFILE_MPEG4_ADVANCED_SIMPLE   1

Definition at line 152 of file regs-mfc.h.

#define S5P_FIMV_ENC_PROFILE_MPEG4_SIMPLE   0

Definition at line 151 of file regs-mfc.h.

#define S5P_FIMV_ENC_PXL_CACHE_CTRL   0x0a00 /* pixel cache control */

Definition at line 158 of file regs-mfc.h.

#define S5P_FIMV_ENC_RC_BIT_RATE   0xc5a8 /* bit rate */

Definition at line 294 of file regs-mfc.h.

#define S5P_FIMV_ENC_RC_CONFIG   0xc5a0 /* RC config */

Definition at line 293 of file regs-mfc.h.

#define S5P_FIMV_ENC_RC_FRAME_RATE   0xd0d0 /* frame rate */

Definition at line 306 of file regs-mfc.h.

#define S5P_FIMV_ENC_RC_MB_CTRL   0xc5b4 /* MB adaptive scaling */

Definition at line 297 of file regs-mfc.h.

#define S5P_FIMV_ENC_RC_QBOUND   0xc5ac /* max/min QP */

Definition at line 295 of file regs-mfc.h.

#define S5P_FIMV_ENC_RC_RPARA   0xc5b0 /* rate control reaction coeff */

Definition at line 296 of file regs-mfc.h.

#define S5P_FIMV_ENC_REF0_CHROMA_ADR   (S5P_FIMV_COMMON_BASE_B)

Definition at line 103 of file regs-mfc.h.

#define S5P_FIMV_ENC_REF0_LUMA_ADR   (S5P_FIMV_COMMON_BASE_A + 0x1c)

Definition at line 100 of file regs-mfc.h.

#define S5P_FIMV_ENC_REF1_CHROMA_ADR   (S5P_FIMV_COMMON_BASE_B + 0x04)

Definition at line 104 of file regs-mfc.h.

#define S5P_FIMV_ENC_REF1_LUMA_ADR   (S5P_FIMV_COMMON_BASE_A + 0x20)

Definition at line 101 of file regs-mfc.h.

#define S5P_FIMV_ENC_REF2_CHROMA_ADR   (S5P_FIMV_COMMON_BASE_B + 0x08)

Definition at line 107 of file regs-mfc.h.

#define S5P_FIMV_ENC_REF2_LUMA_ADR   (S5P_FIMV_COMMON_BASE_B + 0x10)

Definition at line 106 of file regs-mfc.h.

#define S5P_FIMV_ENC_REF3_CHROMA_ADR   (S5P_FIMV_COMMON_BASE_B + 0x0c)

Definition at line 109 of file regs-mfc.h.

#define S5P_FIMV_ENC_REF3_LUMA_ADR   (S5P_FIMV_COMMON_BASE_B + 0x14)

Definition at line 108 of file regs-mfc.h.

#define S5P_FIMV_ENC_REF_B_CHROMA_ADR   0x0630 /* ref B Chroma addr */

Definition at line 138 of file regs-mfc.h.

#define S5P_FIMV_ENC_REF_B_LUMA_ADR   0x062c /* ref B Luma addr */

Definition at line 137 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_CH0_CUR_C_ADR   0x2054 /* current Chroma addr */

Definition at line 275 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_CH0_CUR_Y_ADR   0x2050 /* current Luma addr */

Definition at line 274 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_CH0_FRAME_INS   0x2058 /* frame insertion */

Definition at line 276 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_CH0_SB_ADR   0x2044 /* addr of stream buf */

Definition at line 272 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_CH0_SB_SIZE   0x204c /* size of stream buf */

Definition at line 273 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_CH1_CUR_C_ADR   0x2094 /* current Chroma addr */

Definition at line 281 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_CH1_CUR_Y_ADR   0x2090 /* current Luma addr */

Definition at line 280 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_CH1_FRAME_INS   0x2098 /* frame insertion */

Definition at line 282 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_CH1_SB_ADR   0x2084 /* addr of stream buf */

Definition at line 278 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_CH1_SB_SIZE   0x208c /* size of stream buf */

Definition at line 279 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_PIC_CNT   0x2008 /* picture count */

Definition at line 260 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_SLICE_TYPE   0x2010 /* slice type(I/P/B/IDR) */

Definition at line 262 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_SLICE_TYPE_B   3

Definition at line 266 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_SLICE_TYPE_I   1

Definition at line 264 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_SLICE_TYPE_NON_CODED   0

Definition at line 263 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_SLICE_TYPE_OTHERS   5

Definition at line 268 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_SLICE_TYPE_P   2

Definition at line 265 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_SLICE_TYPE_SKIPPED   4

Definition at line 267 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_STRM_SIZE   0x2004 /* stream size */

Definition at line 259 of file regs-mfc.h.

#define S5P_FIMV_ENC_SI_WRITE_PTR   0x200c /* write pointer */

Definition at line 261 of file regs-mfc.h.

#define S5P_FIMV_ENC_UPMV_SIZE   0x10000

Definition at line 251 of file regs-mfc.h.

#define S5P_FIMV_ENC_VSIZE_PX   0x081c /* frame height at encoder */

Definition at line 145 of file regs-mfc.h.

#define S5P_FIMV_ENCODED_C_ADDR
Value:
0x2018 /* the addr of the encoded
chroma pic */

Definition at line 270 of file regs-mfc.h.

#define S5P_FIMV_ENCODED_Y_ADDR
Value:
0x2014 /* the addr of the encoded
luma pic */

Definition at line 269 of file regs-mfc.h.

#define S5P_FIMV_END_ADDR   0xe008

Definition at line 24 of file regs-mfc.h.

#define S5P_FIMV_ERR_DEC_MASK   0xFFFF

Definition at line 388 of file regs-mfc.h.

#define S5P_FIMV_ERR_DEC_SHIFT   0

Definition at line 389 of file regs-mfc.h.

#define S5P_FIMV_ERR_DSPL_MASK   0xFFFF0000

Definition at line 390 of file regs-mfc.h.

#define S5P_FIMV_ERR_DSPL_SHIFT   16

Definition at line 391 of file regs-mfc.h.

#define S5P_FIMV_ERR_WARNINGS_START   145

Definition at line 387 of file regs-mfc.h.

#define S5P_FIMV_FW_STATUS   0x0080

Definition at line 46 of file regs-mfc.h.

#define S5P_FIMV_FW_VERSION   0x0058

Definition at line 44 of file regs-mfc.h.

#define S5P_FIMV_H263_ACDC_COEF_ADR   (S5P_FIMV_COMMON_BASE_A + 0x04)

Definition at line 126 of file regs-mfc.h.

#define S5P_FIMV_H263_NB_DCAC_ADR   (S5P_FIMV_COMMON_BASE_A + 0x8c)

Definition at line 82 of file regs-mfc.h.

#define S5P_FIMV_H263_OT_LINE_ADR   (S5P_FIMV_COMMON_BASE_A + 0x98)

Definition at line 85 of file regs-mfc.h.

#define S5P_FIMV_H263_SA_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x94)

Definition at line 84 of file regs-mfc.h.

#define S5P_FIMV_H263_UP_MV_ADR   (S5P_FIMV_COMMON_BASE_A)

Definition at line 124 of file regs-mfc.h.

#define S5P_FIMV_H263_UP_NB_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x90)

Definition at line 83 of file regs-mfc.h.

#define S5P_FIMV_H264_COZERO_FLAG_ADR   (S5P_FIMV_COMMON_BASE_A + 0x10)

Definition at line 118 of file regs-mfc.h.

#define S5P_FIMV_H264_MV_ADR   (S5P_FIMV_COMMON_BASE_B + 0x80)

Definition at line 66 of file regs-mfc.h.

#define S5P_FIMV_H264_NB_IP_ADR   (S5P_FIMV_COMMON_BASE_A + 0x90)

Definition at line 64 of file regs-mfc.h.

#define S5P_FIMV_H264_NBOR_INFO_ADR   (S5P_FIMV_COMMON_BASE_A + 0x04)

Definition at line 114 of file regs-mfc.h.

#define S5P_FIMV_H264_UP_INTRA_MD_ADR   (S5P_FIMV_COMMON_BASE_A + 0x08)

Definition at line 116 of file regs-mfc.h.

#define S5P_FIMV_H264_UP_INTRA_PRED_ADR   (S5P_FIMV_COMMON_BASE_B + 0x40)

Definition at line 120 of file regs-mfc.h.

#define S5P_FIMV_H264_UP_MV_ADR   (S5P_FIMV_COMMON_BASE_A)

Definition at line 112 of file regs-mfc.h.

#define S5P_FIMV_H264_VERT_NB_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x8c)

Definition at line 62 of file regs-mfc.h.

#define S5P_FIMV_H2R_CMD_CLOSE_INSTANCE   2

Definition at line 353 of file regs-mfc.h.

#define S5P_FIMV_H2R_CMD_EMPTY   0

Definition at line 351 of file regs-mfc.h.

#define S5P_FIMV_H2R_CMD_FLUSH   4

Definition at line 355 of file regs-mfc.h.

#define S5P_FIMV_H2R_CMD_OPEN_INSTANCE   1

Definition at line 352 of file regs-mfc.h.

#define S5P_FIMV_H2R_CMD_SLEEP   5

Definition at line 356 of file regs-mfc.h.

#define S5P_FIMV_H2R_CMD_SYS_INIT   3

Definition at line 354 of file regs-mfc.h.

#define S5P_FIMV_H2R_CMD_WAKEUP   6

Definition at line 357 of file regs-mfc.h.

#define S5P_FIMV_HOST2RISC_ARG1   0x0034

Definition at line 31 of file regs-mfc.h.

#define S5P_FIMV_HOST2RISC_ARG2   0x0038

Definition at line 32 of file regs-mfc.h.

#define S5P_FIMV_HOST2RISC_ARG3   0x003c

Definition at line 33 of file regs-mfc.h.

#define S5P_FIMV_HOST2RISC_ARG4   0x0040

Definition at line 34 of file regs-mfc.h.

#define S5P_FIMV_HOST2RISC_CMD   0x0030

Definition at line 30 of file regs-mfc.h.

#define S5P_FIMV_MC_DRAMBASE_ADR_A   0x0508

Definition at line 49 of file regs-mfc.h.

#define S5P_FIMV_MC_DRAMBASE_ADR_B   0x050c

Definition at line 50 of file regs-mfc.h.

#define S5P_FIMV_MC_STATUS   0x0510

Definition at line 51 of file regs-mfc.h.

#define S5P_FIMV_MFC_RESET   -1

Definition at line 379 of file regs-mfc.h.

#define S5P_FIMV_MPEG4_ACDC_COEF_ADR   (S5P_FIMV_COMMON_BASE_A + 0x04)

Definition at line 132 of file regs-mfc.h.

#define S5P_FIMV_MPEG4_COZERO_FLAG_ADR   (S5P_FIMV_COMMON_BASE_A + 0x10)

Definition at line 134 of file regs-mfc.h.

#define S5P_FIMV_MPEG4_NB_DCAC_ADR   (S5P_FIMV_COMMON_BASE_A + 0x8c)

Definition at line 70 of file regs-mfc.h.

#define S5P_FIMV_MPEG4_OT_LINE_ADR   (S5P_FIMV_COMMON_BASE_A + 0x98)

Definition at line 76 of file regs-mfc.h.

#define S5P_FIMV_MPEG4_SA_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x94)

Definition at line 74 of file regs-mfc.h.

#define S5P_FIMV_MPEG4_SP_ADR   (S5P_FIMV_COMMON_BASE_A + 0xa8)

Definition at line 78 of file regs-mfc.h.

#define S5P_FIMV_MPEG4_UP_MV_ADR   (S5P_FIMV_COMMON_BASE_A)

Definition at line 130 of file regs-mfc.h.

#define S5P_FIMV_MPEG4_UP_NB_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x90)

Definition at line 72 of file regs-mfc.h.

#define S5P_FIMV_MR_BUSIF_CTRL   0x0854 /* hidden, bus interface ctrl */

Definition at line 157 of file regs-mfc.h.

#define S5P_FIMV_NV12M_CVALIGN   8

Definition at line 244 of file regs-mfc.h.

#define S5P_FIMV_NV12M_HALIGN   16

Definition at line 242 of file regs-mfc.h.

#define S5P_FIMV_NV12M_LVALIGN   16

Definition at line 243 of file regs-mfc.h.

#define S5P_FIMV_NV12M_SALIGN   2048

Definition at line 247 of file regs-mfc.h.

#define S5P_FIMV_NV12MT_HALIGN   128

Definition at line 245 of file regs-mfc.h.

#define S5P_FIMV_NV12MT_SALIGN   8192

Definition at line 248 of file regs-mfc.h.

#define S5P_FIMV_NV12MT_VALIGN   32

Definition at line 246 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_CLOSE_INSTANCE_RET   2

Definition at line 361 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_EDFU_INIT_RET   16

Definition at line 373 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_EMPTY   0

Definition at line 359 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_ENC_COMPLETE_RET   7

Definition at line 366 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_ERR_RET   32

Definition at line 374 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_FIELD_DONE_RET   -1

Definition at line 378 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_FLUSH_RET   12

Definition at line 371 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_FRAME_DONE_RET   5

Definition at line 364 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_FW_STATUS_RET   9

Definition at line 368 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_INIT_BUFFERS_RET   15

Definition at line 372 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_OPEN_INSTANCE_RET   1

Definition at line 360 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_RSV_RET   3

Definition at line 362 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_SEQ_DONE_RET   4

Definition at line 363 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_SLEEP_RET   10

Definition at line 369 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_SLICE_DONE_RET   6

Definition at line 365 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_SYS_INIT_RET   8

Definition at line 367 of file regs-mfc.h.

#define S5P_FIMV_R2H_CMD_WAKEUP_RET   11

Definition at line 370 of file regs-mfc.h.

#define S5P_FIMV_REG_CLEAR_BEGIN   0

Definition at line 383 of file regs-mfc.h.

#define S5P_FIMV_REG_CLEAR_COUNT   0

Definition at line 384 of file regs-mfc.h.

#define S5P_FIMV_REG_COUNT   ((S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) / 4)

Definition at line 19 of file regs-mfc.h.

#define S5P_FIMV_REG_SIZE   (S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR)

Definition at line 18 of file regs-mfc.h.

#define S5P_FIMV_RES_DECREASE   2

Definition at line 448 of file regs-mfc.h.

#define S5P_FIMV_RES_INCREASE   1

Definition at line 447 of file regs-mfc.h.

#define S5P_FIMV_RISC2HOST_ARG1   0x0048

Definition at line 39 of file regs-mfc.h.

#define S5P_FIMV_RISC2HOST_ARG2   0x004c

Definition at line 40 of file regs-mfc.h.

#define S5P_FIMV_RISC2HOST_ARG3   0x0050

Definition at line 41 of file regs-mfc.h.

#define S5P_FIMV_RISC2HOST_ARG4   0x0054

Definition at line 42 of file regs-mfc.h.

#define S5P_FIMV_RISC2HOST_CMD   0x0044

Definition at line 37 of file regs-mfc.h.

#define S5P_FIMV_RISC2HOST_CMD_MASK   0x1FFFF

Definition at line 38 of file regs-mfc.h.

#define S5P_FIMV_RISC_BASE_ADDRESS   -1

Definition at line 381 of file regs-mfc.h.

#define S5P_FIMV_RISC_HOST_INT   0x0008

Definition at line 27 of file regs-mfc.h.

#define S5P_FIMV_RISC_ON   -1

Definition at line 380 of file regs-mfc.h.

#define S5P_FIMV_SHARED_ASPECT_RATIO_IDC   0x0074

Definition at line 419 of file regs-mfc.h.

#define S5P_FIMV_SHARED_CHROMA_DPB_SIZE   0x0068

Definition at line 413 of file regs-mfc.h.

#define S5P_FIMV_SHARED_CROP_BOTTOM_MASK   0xFFFF0000

Definition at line 405 of file regs-mfc.h.

#define S5P_FIMV_SHARED_CROP_BOTTOM_SHIFT   16

Definition at line 406 of file regs-mfc.h.

#define S5P_FIMV_SHARED_CROP_INFO_H   0x0020

Definition at line 397 of file regs-mfc.h.

#define S5P_FIMV_SHARED_CROP_INFO_V   0x0024

Definition at line 402 of file regs-mfc.h.

#define S5P_FIMV_SHARED_CROP_LEFT_MASK   0xFFFF

Definition at line 398 of file regs-mfc.h.

#define S5P_FIMV_SHARED_CROP_LEFT_SHIFT   0

Definition at line 399 of file regs-mfc.h.

#define S5P_FIMV_SHARED_CROP_RIGHT_MASK   0xFFFF0000

Definition at line 400 of file regs-mfc.h.

#define S5P_FIMV_SHARED_CROP_RIGHT_SHIFT   16

Definition at line 401 of file regs-mfc.h.

#define S5P_FIMV_SHARED_CROP_TOP_MASK   0xFFFF

Definition at line 403 of file regs-mfc.h.

#define S5P_FIMV_SHARED_CROP_TOP_SHIFT   0

Definition at line 404 of file regs-mfc.h.

#define S5P_FIMV_SHARED_DISP_FRAME_TYPE_SHIFT   2

Definition at line 423 of file regs-mfc.h.

#define S5P_FIMV_SHARED_EXT_ENC_CONTROL   0x0028

Definition at line 417 of file regs-mfc.h.

#define S5P_FIMV_SHARED_EXTENDED_SAR   0x0078

Definition at line 420 of file regs-mfc.h.

#define S5P_FIMV_SHARED_FRAME_PACK_ARRGMENT_ID   0x170

Definition at line 442 of file regs-mfc.h.

#define S5P_FIMV_SHARED_FRAME_PACK_GRID_POS   0x178

Definition at line 444 of file regs-mfc.h.

#define S5P_FIMV_SHARED_FRAME_PACK_SEI_AVAIL   0x16C

Definition at line 441 of file regs-mfc.h.

#define S5P_FIMV_SHARED_FRAME_PACK_SEI_INFO   0x174

Definition at line 443 of file regs-mfc.h.

#define S5P_FIMV_SHARED_GET_FRAME_TAG_BOT   0x000C

Definition at line 409 of file regs-mfc.h.

#define S5P_FIMV_SHARED_GET_FRAME_TAG_TOP   0x0008

Definition at line 408 of file regs-mfc.h.

#define S5P_FIMV_SHARED_H264_I_PERIOD   0x009C

Definition at line 421 of file regs-mfc.h.

#define S5P_FIMV_SHARED_LUMA_DPB_SIZE   0x0064

Definition at line 412 of file regs-mfc.h.

#define S5P_FIMV_SHARED_MV_SIZE   0x006C

Definition at line 414 of file regs-mfc.h.

#define S5P_FIMV_SHARED_P_B_FRAME_QP   0x0070

Definition at line 418 of file regs-mfc.h.

#define S5P_FIMV_SHARED_PIC_TIME_BOTTOM   0x0014

Definition at line 416 of file regs-mfc.h.

#define S5P_FIMV_SHARED_PIC_TIME_TOP   0x0010

Definition at line 415 of file regs-mfc.h.

#define S5P_FIMV_SHARED_RC_CONTROL_CONFIG   0x00A0

Definition at line 422 of file regs-mfc.h.

#define S5P_FIMV_SHARED_RC_VOP_TIMING   0x0030

Definition at line 411 of file regs-mfc.h.

#define S5P_FIMV_SHARED_SET_FRAME_TAG   0x0004

Definition at line 407 of file regs-mfc.h.

#define S5P_FIMV_SHARED_START_BYTE_NUM   0x0018

Definition at line 410 of file regs-mfc.h.

#define S5P_FIMV_SI_BUF_NUMBER
Value:
0x200c /* number of frames in the
decoded pic */

Definition at line 167 of file regs-mfc.h.

#define S5P_FIMV_SI_CH0_CPB_SIZE   0x2058 /* max size of coded pic. buf */

Definition at line 181 of file regs-mfc.h.

#define S5P_FIMV_SI_CH0_DESC_ADR   0x204c /* addr of descriptor buf */

Definition at line 180 of file regs-mfc.h.

#define S5P_FIMV_SI_CH0_DESC_SIZE   0x205c /* max size of descriptor buf */

Definition at line 182 of file regs-mfc.h.

#define S5P_FIMV_SI_CH0_DPB_CONF_CTRL   0x2068 /* DPB Config Control Register */

Definition at line 312 of file regs-mfc.h.

#define S5P_FIMV_SI_CH0_HOST_WR_ADR   0x2064 /* address of shared memory */

Definition at line 324 of file regs-mfc.h.

#define S5P_FIMV_SI_CH0_INST_ID   0x2040 /* codec instance ID */

Definition at line 162 of file regs-mfc.h.

#define S5P_FIMV_SI_CH0_RELEASE_BUF   0x2060 /* DPB release buffer register */

Definition at line 323 of file regs-mfc.h.

#define S5P_FIMV_SI_CH0_SB_FRM_SIZE   0x2048 /* size of stream buf */

Definition at line 179 of file regs-mfc.h.

#define S5P_FIMV_SI_CH0_SB_ST_ADR   0x2044 /* start addr of stream buf */

Definition at line 178 of file regs-mfc.h.

#define S5P_FIMV_SI_CH1_CPB_SIZE   0x2098 /* max size of coded pic. buf */

Definition at line 187 of file regs-mfc.h.

#define S5P_FIMV_SI_CH1_DESC_ADR   0x208c /* addr of descriptor buf */

Definition at line 186 of file regs-mfc.h.

#define S5P_FIMV_SI_CH1_DESC_SIZE   0x209c /* max size of descriptor buf */

Definition at line 188 of file regs-mfc.h.

#define S5P_FIMV_SI_CH1_INST_ID   0x2080 /* codec instance ID */

Definition at line 163 of file regs-mfc.h.

#define S5P_FIMV_SI_CH1_SB_FRM_SIZE   0x2088 /* size of stream buf */

Definition at line 185 of file regs-mfc.h.

#define S5P_FIMV_SI_CH1_SB_ST_ADR   0x2084 /* start addr of stream buf */

Definition at line 184 of file regs-mfc.h.

#define S5P_FIMV_SI_CONSUMED_BYTES
Value:
0x2018 /* Consumed number of bytes to
decode a frame */

Definition at line 171 of file regs-mfc.h.

#define S5P_FIMV_SI_DECODE_C_ADR   0x2028 /* chroma addrof decoded pic */

Definition at line 175 of file regs-mfc.h.

#define S5P_FIMV_SI_DECODE_STATUS   0x202c /* status of decoded picture */

Definition at line 176 of file regs-mfc.h.

#define S5P_FIMV_SI_DECODE_Y_ADR   0x2024 /* luma addr of decoded pic */

Definition at line 174 of file regs-mfc.h.

#define S5P_FIMV_SI_DISPLAY_C_ADR   0x2014 /* chroma addrof displayed pic */

Definition at line 169 of file regs-mfc.h.

#define S5P_FIMV_SI_DISPLAY_STATUS   0x201c /* status of decoded picture */

Definition at line 172 of file regs-mfc.h.

#define S5P_FIMV_SI_DISPLAY_Y_ADR   0x2010 /* luma addr of displayed pic */

Definition at line 168 of file regs-mfc.h.

#define S5P_FIMV_SI_HRESOL   0x2008 /* horizontal res of decoder */

Definition at line 166 of file regs-mfc.h.

#define S5P_FIMV_SI_RTN_CHID   0x2000 /* Return CH inst ID register */

Definition at line 161 of file regs-mfc.h.

#define S5P_FIMV_SI_VRESOL   0x2004 /* vertical res of decoder */

Definition at line 165 of file regs-mfc.h.

#define S5P_FIMV_SLICE_INT_MASK   1

Definition at line 313 of file regs-mfc.h.

#define S5P_FIMV_SLICE_INT_SHIFT   31

Definition at line 314 of file regs-mfc.h.

#define S5P_FIMV_START_ADDR   0x0000

Definition at line 23 of file regs-mfc.h.

#define S5P_FIMV_SW_RESET   0x0000

Definition at line 26 of file regs-mfc.h.

#define S5P_FIMV_SYS_MEM_SZ   0x005c

Definition at line 45 of file regs-mfc.h.

#define S5P_FIMV_VC1_BITPLANE1_ADR   (S5P_FIMV_COMMON_BASE_A + 0xa4)

Definition at line 96 of file regs-mfc.h.

#define S5P_FIMV_VC1_BITPLANE2_ADR   (S5P_FIMV_COMMON_BASE_A + 0xa0)

Definition at line 94 of file regs-mfc.h.

#define S5P_FIMV_VC1_BITPLANE3_ADR   (S5P_FIMV_COMMON_BASE_A + 0x9c)

Definition at line 92 of file regs-mfc.h.

#define S5P_FIMV_VC1_NB_DCAC_ADR   (S5P_FIMV_COMMON_BASE_A + 0x8c)

Definition at line 88 of file regs-mfc.h.

#define S5P_FIMV_VC1_OT_LINE_ADR   (S5P_FIMV_COMMON_BASE_A + 0x98)

Definition at line 91 of file regs-mfc.h.

#define S5P_FIMV_VC1_SA_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x94)

Definition at line 90 of file regs-mfc.h.

#define S5P_FIMV_VC1_UP_NB_MV_ADR   (S5P_FIMV_COMMON_BASE_A + 0x90)

Definition at line 89 of file regs-mfc.h.

#define SHARED_BUF_SIZE   (8 * SZ_1K) /* 8KB for shared buffer */

Definition at line 432 of file regs-mfc.h.