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Linux Kernel
3.7.1
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All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
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Linux Kernel
3.7.1
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#include <mach/map.h>Go to the source code of this file.
| #define __ASM_ARCH_REGS_PMU_H __FILE__ |
Definition at line 13 of file regs-pmu.h.
| #define EXYNOS5_APLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1140) |
Definition at line 262 of file regs-pmu.h.
| #define EXYNOS5_ARM_COMMON_OPTION S5P_PMUREG(0x2408) |
Definition at line 344 of file regs-pmu.h.
| #define EXYNOS5_ARM_COMMON_SYS_PWR_REG S5P_PMUREG(0x1080) |
Definition at line 251 of file regs-pmu.h.
| #define EXYNOS5_ARM_CORE0_OPTION S5P_PMUREG(0x2008) |
Definition at line 340 of file regs-pmu.h.
| #define EXYNOS5_ARM_CORE0_SYS_PWR_REG S5P_PMUREG(0x1000) |
Definition at line 240 of file regs-pmu.h.
| #define EXYNOS5_ARM_CORE1_OPTION S5P_PMUREG(0x2088) |
Definition at line 341 of file regs-pmu.h.
| #define EXYNOS5_ARM_CORE1_SYS_PWR_REG S5P_PMUREG(0x1010) |
Definition at line 243 of file regs-pmu.h.
| #define EXYNOS5_ARM_L2_SYS_PWR_REG S5P_PMUREG(0x10C0) |
Definition at line 252 of file regs-pmu.h.
| #define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408) |
Definition at line 235 of file regs-pmu.h.
| #define EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1150) |
Definition at line 266 of file regs-pmu.h.
| #define EXYNOS5_BPLLUSER_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1170) |
Definition at line 269 of file regs-pmu.h.
| #define EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG S5P_PMUREG(0x1100) |
Definition at line 253 of file regs-pmu.h.
| #define EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1120) |
Definition at line 256 of file regs-pmu.h.
| #define EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG S5P_PMUREG(0x1494) |
Definition at line 325 of file regs-pmu.h.
| #define EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG S5P_PMUREG(0x148C) |
Definition at line 324 of file regs-pmu.h.
| #define EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG S5P_PMUREG(0x1480) |
Definition at line 321 of file regs-pmu.h.
| #define EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG S5P_PMUREG(0x1484) |
Definition at line 322 of file regs-pmu.h.
| #define EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG S5P_PMUREG(0x1498) |
Definition at line 326 of file regs-pmu.h.
| #define EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG S5P_PMUREG(0x1488) |
Definition at line 323 of file regs-pmu.h.
| #define EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG S5P_PMUREG(0x1594) |
Definition at line 337 of file regs-pmu.h.
| #define EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG S5P_PMUREG(0x158C) |
Definition at line 336 of file regs-pmu.h.
| #define EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG S5P_PMUREG(0x1580) |
Definition at line 333 of file regs-pmu.h.
| #define EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG S5P_PMUREG(0x1584) |
Definition at line 334 of file regs-pmu.h.
| #define EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG S5P_PMUREG(0x1598) |
Definition at line 338 of file regs-pmu.h.
| #define EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG S5P_PMUREG(0x1588) |
Definition at line 335 of file regs-pmu.h.
| #define EXYNOS5_CMU_RESET_SYS_PWR_REG S5P_PMUREG(0x110C) |
Definition at line 255 of file regs-pmu.h.
| #define EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x112C) |
Definition at line 258 of file regs-pmu.h.
| #define EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG S5P_PMUREG(0x1104) |
Definition at line 254 of file regs-pmu.h.
| #define EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1124) |
Definition at line 257 of file regs-pmu.h.
| #define EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG S5P_PMUREG(0x14D4) |
Definition at line 331 of file regs-pmu.h.
| #define EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG S5P_PMUREG(0x14CC) |
Definition at line 330 of file regs-pmu.h.
| #define EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG S5P_PMUREG(0x14C0) |
Definition at line 327 of file regs-pmu.h.
| #define EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG S5P_PMUREG(0x14C4) |
Definition at line 328 of file regs-pmu.h.
| #define EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG S5P_PMUREG(0x14D8) |
Definition at line 332 of file regs-pmu.h.
| #define EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG S5P_PMUREG(0x14C8) |
Definition at line 329 of file regs-pmu.h.
| #define EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1154) |
Definition at line 267 of file regs-pmu.h.
| #define EXYNOS5_CSSYS_MEM_SYS_PWR_REG S5P_PMUREG(0x11D4) |
Definition at line 284 of file regs-pmu.h.
| #define EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG S5P_PMUREG(0x1138) |
Definition at line 261 of file regs-pmu.h.
| #define EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG S5P_PMUREG(0x1134) |
Definition at line 260 of file regs-pmu.h.
| #define EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1008) |
Definition at line 242 of file regs-pmu.h.
| #define EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1004) |
Definition at line 241 of file regs-pmu.h.
| #define EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1018) |
Definition at line 245 of file regs-pmu.h.
| #define EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1014) |
Definition at line 244 of file regs-pmu.h.
| #define EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1048) |
Definition at line 247 of file regs-pmu.h.
| #define EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1058) |
Definition at line 250 of file regs-pmu.h.
| #define EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1054) |
Definition at line 249 of file regs-pmu.h.
| #define EXYNOS5_DISP1_OPTION S5P_PMUREG(0x40A8) |
Definition at line 356 of file regs-pmu.h.
| #define EXYNOS5_DISP1_SYS_PWR_REG S5P_PMUREG(0x1414) |
Definition at line 319 of file regs-pmu.h.
| #define EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG S5P_PMUREG(0x1130) |
Definition at line 259 of file regs-pmu.h.
| #define EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x114C) |
Definition at line 265 of file regs-pmu.h.
| #define EXYNOS5_EXT_REGULATOR_SYS_PWR_REG S5P_PMUREG(0x12C0) |
Definition at line 309 of file regs-pmu.h.
| #define EXYNOS5_FSYS_ARM_OPTION S5P_PMUREG(0x2208) |
Definition at line 342 of file regs-pmu.h.
| #define EXYNOS5_FSYS_ARM_SYS_PWR_REG S5P_PMUREG(0x1040) |
Definition at line 246 of file regs-pmu.h.
| #define EXYNOS5_G2D_MEM_SYS_PWR_REG S5P_PMUREG(0x11C8) |
Definition at line 281 of file regs-pmu.h.
| #define EXYNOS5_G3D_CONFIGURATION S5P_PMUREG(0x4060) |
Definition at line 353 of file regs-pmu.h.
| #define EXYNOS5_G3D_OPTION S5P_PMUREG(0x4068) |
Definition at line 355 of file regs-pmu.h.
| #define EXYNOS5_G3D_STATUS S5P_PMUREG(0x4064) |
Definition at line 354 of file regs-pmu.h.
| #define EXYNOS5_G3D_SYS_PWR_REG S5P_PMUREG(0x140C) |
Definition at line 318 of file regs-pmu.h.
| #define EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG S5P_PMUREG(0x1340) |
Definition at line 312 of file regs-pmu.h.
| #define EXYNOS5_GPIO_MODE_SYS_PWR_REG S5P_PMUREG(0x1300) |
Definition at line 310 of file regs-pmu.h.
| #define EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1320) |
Definition at line 311 of file regs-pmu.h.
| #define EXYNOS5_GSCL_OPTION S5P_PMUREG(0x4008) |
Definition at line 350 of file regs-pmu.h.
| #define EXYNOS5_GSCL_STATUS S5P_PMUREG(0x4004) |
Definition at line 348 of file regs-pmu.h.
| #define EXYNOS5_GSCL_SYS_PWR_REG S5P_PMUREG(0x1400) |
Definition at line 315 of file regs-pmu.h.
| #define EXYNOS5_HSI_MEM_SYS_PWR_REG S5P_PMUREG(0x11EC) |
Definition at line 290 of file regs-pmu.h.
| #define EXYNOS5_INTRAM_MEM_SYS_PWR_REG S5P_PMUREG(0x11E0) |
Definition at line 287 of file regs-pmu.h.
| #define EXYNOS5_INTROM_MEM_SYS_PWR_REG S5P_PMUREG(0x11E4) |
Definition at line 288 of file regs-pmu.h.
| #define EXYNOS5_ISP_ARM_OPTION S5P_PMUREG(0x2288) |
Definition at line 343 of file regs-pmu.h.
| #define EXYNOS5_ISP_ARM_SYS_PWR_REG S5P_PMUREG(0x1050) |
Definition at line 248 of file regs-pmu.h.
| #define EXYNOS5_ISP_OPTION S5P_PMUREG(0x4028) |
Definition at line 351 of file regs-pmu.h.
| #define EXYNOS5_ISP_STATUS S5P_PMUREG(0x4024) |
Definition at line 349 of file regs-pmu.h.
| #define EXYNOS5_ISP_SYS_PWR_REG S5P_PMUREG(0x1404) |
Definition at line 316 of file regs-pmu.h.
| #define EXYNOS5_JPEG_MEM_OPTION S5P_PMUREG(0x2F48) |
Definition at line 347 of file regs-pmu.h.
| #define EXYNOS5_JPEG_MEM_SYS_PWR_REG S5P_PMUREG(0x11E8) |
Definition at line 289 of file regs-pmu.h.
| #define EXYNOS5_LOGIC_RESET_SYS_PWR_REG S5P_PMUREG(0x11A0) |
Definition at line 276 of file regs-pmu.h.
| #define EXYNOS5_LOGIC_RESET_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x11B0) |
Definition at line 278 of file regs-pmu.h.
| #define EXYNOS5_MANUAL_L2RSTDISABLE_CONTROL (1 << 2) |
Definition at line 362 of file regs-pmu.h.
| #define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C) |
Definition at line 236 of file regs-pmu.h.
| #define EXYNOS5_MAU_OPTION S5P_PMUREG(0x40C8) |
Definition at line 357 of file regs-pmu.h.
| #define EXYNOS5_MAU_SYS_PWR_REG S5P_PMUREG(0x1418) |
Definition at line 320 of file regs-pmu.h.
| #define EXYNOS5_MCUIOP_MEM_SYS_PWR_REG S5P_PMUREG(0x11F4) |
Definition at line 291 of file regs-pmu.h.
| #define EXYNOS5_MFC_OPTION S5P_PMUREG(0x4048) |
Definition at line 352 of file regs-pmu.h.
| #define EXYNOS5_MFC_SYS_PWR_REG S5P_PMUREG(0x1408) |
Definition at line 317 of file regs-pmu.h.
| #define EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1144) |
Definition at line 263 of file regs-pmu.h.
| #define EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1164) |
Definition at line 268 of file regs-pmu.h.
| #define EXYNOS5_OPTION_USE_RETENTION (1 << 4) |
Definition at line 368 of file regs-pmu.h.
| #define EXYNOS5_OPTION_USE_STANDBYWFE (1 << 24) |
Definition at line 365 of file regs-pmu.h.
| #define EXYNOS5_OPTION_USE_STANDBYWFI (1 << 16) |
Definition at line 366 of file regs-pmu.h.
| #define EXYNOS5_OSCCLK_GATE_SYS_PWR_REG S5P_PMUREG(0x11A4) |
Definition at line 277 of file regs-pmu.h.
| #define EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x11B4) |
Definition at line 279 of file regs-pmu.h.
| #define EXYNOS5_PAD_ALV_SEL_SYS_PWR_REG S5P_PMUREG(0x1260) |
Definition at line 306 of file regs-pmu.h.
| #define EXYNOS5_PAD_ISOLATION_SYS_PWR_REG S5P_PMUREG(0x1240) |
Definition at line 304 of file regs-pmu.h.
| #define EXYNOS5_PAD_ISOLATION_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1250) |
Definition at line 305 of file regs-pmu.h.
| #define EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG S5P_PMUREG(0x1200) |
Definition at line 293 of file regs-pmu.h.
| #define EXYNOS5_PAD_RETENTION_EBIA_SYS_PWR_REG S5P_PMUREG(0x1230) |
Definition at line 300 of file regs-pmu.h.
| #define EXYNOS5_PAD_RETENTION_EBIB_SYS_PWR_REG S5P_PMUREG(0x1234) |
Definition at line 301 of file regs-pmu.h.
| #define EXYNOS5_PAD_RETENTION_EFNAND_SYS_PWR_REG S5P_PMUREG(0x1208) |
Definition at line 295 of file regs-pmu.h.
| #define EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG S5P_PMUREG(0x1220) |
Definition at line 296 of file regs-pmu.h.
| #define EXYNOS5_PAD_RETENTION_GPIO_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x123C) |
Definition at line 303 of file regs-pmu.h.
| #define EXYNOS5_PAD_RETENTION_MAU_SYS_PWR_REG S5P_PMUREG(0x1204) |
Definition at line 294 of file regs-pmu.h.
| #define EXYNOS5_PAD_RETENTION_MMCA_SYS_PWR_REG S5P_PMUREG(0x1228) |
Definition at line 298 of file regs-pmu.h.
| #define EXYNOS5_PAD_RETENTION_MMCB_SYS_PWR_REG S5P_PMUREG(0x122C) |
Definition at line 299 of file regs-pmu.h.
| #define EXYNOS5_PAD_RETENTION_SPI_SYS_PWR_REG S5P_PMUREG(0x1238) |
Definition at line 302 of file regs-pmu.h.
| #define EXYNOS5_PAD_RETENTION_UART_SYS_PWR_REG S5P_PMUREG(0x1224) |
Definition at line 297 of file regs-pmu.h.
| #define EXYNOS5_ROTATOR_MEM_SYS_PWR_REG S5P_PMUREG(0x11DC) |
Definition at line 286 of file regs-pmu.h.
| #define EXYNOS5_SATA_MEM_SYS_PWR_REG S5P_PMUREG(0x11FC) |
Definition at line 292 of file regs-pmu.h.
| #define EXYNOS5_SDMMC_MEM_SYS_PWR_REG S5P_PMUREG(0x11D0) |
Definition at line 283 of file regs-pmu.h.
| #define EXYNOS5_SECSS_MEM_SYS_PWR_REG S5P_PMUREG(0x11D8) |
Definition at line 285 of file regs-pmu.h.
| #define EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN (1 << 7) |
Definition at line 363 of file regs-pmu.h.
| #define EXYNOS5_SYS_WDTRESET (1 << 20) |
Definition at line 238 of file regs-pmu.h.
| #define EXYNOS5_TOP_ASB_ISOLATION_SYS_PWR_REG S5P_PMUREG(0x1348) |
Definition at line 314 of file regs-pmu.h.
| #define EXYNOS5_TOP_ASB_RESET_SYS_PWR_REG S5P_PMUREG(0x1344) |
Definition at line 313 of file regs-pmu.h.
| #define EXYNOS5_TOP_BUS_SYS_PWR_REG S5P_PMUREG(0x1180) |
Definition at line 270 of file regs-pmu.h.
| #define EXYNOS5_TOP_BUS_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1190) |
Definition at line 273 of file regs-pmu.h.
| #define EXYNOS5_TOP_PWR_OPTION S5P_PMUREG(0x2C48) |
Definition at line 345 of file regs-pmu.h.
| #define EXYNOS5_TOP_PWR_SYS_PWR_REG S5P_PMUREG(0x1188) |
Definition at line 272 of file regs-pmu.h.
| #define EXYNOS5_TOP_PWR_SYSMEM_OPTION S5P_PMUREG(0x2CC8) |
Definition at line 346 of file regs-pmu.h.
| #define EXYNOS5_TOP_PWR_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1198) |
Definition at line 275 of file regs-pmu.h.
| #define EXYNOS5_TOP_RETENTION_SYS_PWR_REG S5P_PMUREG(0x1184) |
Definition at line 271 of file regs-pmu.h.
| #define EXYNOS5_TOP_RETENTION_SYSMEM_SYS_PWR_REG S5P_PMUREG(0x1194) |
Definition at line 274 of file regs-pmu.h.
| #define EXYNOS5_USB_CFG S5P_PMUREG(0x0230) |
Definition at line 233 of file regs-pmu.h.
| #define EXYNOS5_USBDRD_MEM_SYS_PWR_REG S5P_PMUREG(0x11CC) |
Definition at line 282 of file regs-pmu.h.
| #define EXYNOS5_USBOTG_MEM_SYS_PWR_REG S5P_PMUREG(0x11C0) |
Definition at line 280 of file regs-pmu.h.
| #define EXYNOS5_USE_SC_COUNTER (1 << 0) |
Definition at line 360 of file regs-pmu.h.
| #define EXYNOS5_USE_SC_FEEDBACK (1 << 1) |
Definition at line 359 of file regs-pmu.h.
| #define EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG S5P_PMUREG(0x1148) |
Definition at line 264 of file regs-pmu.h.
| #define EXYNOS5_XUSBXTI_SYS_PWR_REG S5P_PMUREG(0x1280) |
Definition at line 307 of file regs-pmu.h.
| #define EXYNOS5_XXTI_SYS_PWR_REG S5P_PMUREG(0x1284) |
Definition at line 308 of file regs-pmu.h.
| #define EXYNOS_SWRESET S5P_PMUREG(0x0400) |
Definition at line 33 of file regs-pmu.h.
| #define S5P_APLL_SYSCLK_LOWPWR S5P_PMUREG(0x1120) |
Definition at line 71 of file regs-pmu.h.
| #define S5P_ARM_COMMON_LOWPWR S5P_PMUREG(0x1080) |
Definition at line 65 of file regs-pmu.h.
| #define S5P_ARM_COMMON_OPTION S5P_PMUREG(0x2408) |
Definition at line 131 of file regs-pmu.h.
| #define S5P_ARM_CORE0_CONFIGURATION S5P_PMUREG(0x2000) |
Definition at line 125 of file regs-pmu.h.
| #define S5P_ARM_CORE0_LOWPWR S5P_PMUREG(0x1000) |
Definition at line 59 of file regs-pmu.h.
| #define S5P_ARM_CORE0_OPTION S5P_PMUREG(0x2008) |
Definition at line 126 of file regs-pmu.h.
| #define S5P_ARM_CORE1_CONFIGURATION S5P_PMUREG(0x2080) |
Definition at line 127 of file regs-pmu.h.
| #define S5P_ARM_CORE1_LOWPWR S5P_PMUREG(0x1010) |
Definition at line 62 of file regs-pmu.h.
| #define S5P_ARM_CORE1_OPTION S5P_PMUREG(0x2088) |
Definition at line 129 of file regs-pmu.h.
| #define S5P_ARM_CORE1_STATUS S5P_PMUREG(0x2084) |
Definition at line 128 of file regs-pmu.h.
| #define S5P_ARM_CORE2_LOWPWR S5P_PMUREG(0x1020) |
Definition at line 224 of file regs-pmu.h.
| #define S5P_ARM_CORE3_LOWPWR S5P_PMUREG(0x1030) |
Definition at line 227 of file regs-pmu.h.
| #define S5P_ARM_L2_0_OPTION S5P_PMUREG(0x2608) |
Definition at line 212 of file regs-pmu.h.
| #define S5P_ARM_L2_1_OPTION S5P_PMUREG(0x2628) |
Definition at line 213 of file regs-pmu.h.
| #define S5P_CAM_LOWPWR S5P_PMUREG(0x1380) |
Definition at line 116 of file regs-pmu.h.
| #define S5P_CAM_OPTION S5P_PMUREG(0x3C08) |
Definition at line 133 of file regs-pmu.h.
| #define S5P_CENTRAL_LOWPWR_CFG (1 << 16) |
Definition at line 21 of file regs-pmu.h.
| #define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200) |
Definition at line 19 of file regs-pmu.h.
| #define S5P_CENTRAL_SEQ_OPTION S5P_PMUREG(0x0208) |
Definition at line 23 of file regs-pmu.h.
| #define S5P_CHECK_SLEEP 0x00000BAD |
Definition at line 162 of file regs-pmu.h.
| #define S5P_CMU_ACLKSTOP_COREBLK_LOWPWR S5P_PMUREG(0x1110) |
Definition at line 186 of file regs-pmu.h.
| #define S5P_CMU_ACLKSTOP_LOWPWR S5P_PMUREG(0x1100) |
Definition at line 68 of file regs-pmu.h.
| #define S5P_CMU_CLKSTOP_CAM_LOWPWR S5P_PMUREG(0x1140) |
Definition at line 77 of file regs-pmu.h.
| #define S5P_CMU_CLKSTOP_G3D_LOWPWR S5P_PMUREG(0x114C) |
Definition at line 80 of file regs-pmu.h.
| #define S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR S5P_PMUREG(0x1138) |
Definition at line 75 of file regs-pmu.h.
| #define S5P_CMU_CLKSTOP_GPS_LOWPWR S5P_PMUREG(0x115C) |
Definition at line 83 of file regs-pmu.h.
| #define S5P_CMU_CLKSTOP_ISP_LOWPWR S5P_PMUREG(0x1154) |
Definition at line 190 of file regs-pmu.h.
| #define S5P_CMU_CLKSTOP_LCD0_LOWPWR S5P_PMUREG(0x1150) |
Definition at line 81 of file regs-pmu.h.
| #define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154) |
Definition at line 173 of file regs-pmu.h.
| #define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR S5P_PMUREG(0x1158) |
Definition at line 82 of file regs-pmu.h.
| #define S5P_CMU_CLKSTOP_MFC_LOWPWR S5P_PMUREG(0x1148) |
Definition at line 79 of file regs-pmu.h.
| #define S5P_CMU_CLKSTOP_TV_LOWPWR S5P_PMUREG(0x1144) |
Definition at line 78 of file regs-pmu.h.
| #define S5P_CMU_RESET_CAM_LOWPWR S5P_PMUREG(0x1160) |
Definition at line 84 of file regs-pmu.h.
| #define S5P_CMU_RESET_COREBLK_LOWPWR S5P_PMUREG(0x111C) |
Definition at line 188 of file regs-pmu.h.
| #define S5P_CMU_RESET_G3D_LOWPWR S5P_PMUREG(0x116C) |
Definition at line 87 of file regs-pmu.h.
| #define S5P_CMU_RESET_GPS_LOWPWR S5P_PMUREG(0x117C) |
Definition at line 90 of file regs-pmu.h.
| #define S5P_CMU_RESET_GPSALIVE_LOWPWR S5P_PMUREG(0x113C) |
Definition at line 76 of file regs-pmu.h.
| #define S5P_CMU_RESET_ISP_LOWPWR S5P_PMUREG(0x1174) |
Definition at line 191 of file regs-pmu.h.
| #define S5P_CMU_RESET_LCD0_LOWPWR S5P_PMUREG(0x1170) |
Definition at line 88 of file regs-pmu.h.
| #define S5P_CMU_RESET_LCD1_LOWPWR S5P_PMUREG(0x1174) |
Definition at line 174 of file regs-pmu.h.
| #define S5P_CMU_RESET_LOWPWR S5P_PMUREG(0x110C) |
Definition at line 70 of file regs-pmu.h.
| #define S5P_CMU_RESET_MAUDIO_LOWPWR S5P_PMUREG(0x1178) |
Definition at line 89 of file regs-pmu.h.
| #define S5P_CMU_RESET_MFC_LOWPWR S5P_PMUREG(0x1168) |
Definition at line 86 of file regs-pmu.h.
| #define S5P_CMU_RESET_TV_LOWPWR S5P_PMUREG(0x1164) |
Definition at line 85 of file regs-pmu.h.
| #define S5P_CMU_SCLKSTOP_COREBLK_LOWPWR S5P_PMUREG(0x1114) |
Definition at line 187 of file regs-pmu.h.
| #define S5P_CMU_SCLKSTOP_LOWPWR S5P_PMUREG(0x1104) |
Definition at line 69 of file regs-pmu.h.
| #define S5P_CMU_SYSCLK_GPS_LOWPWR S5P_PMUREG(0x13BC) |
Definition at line 209 of file regs-pmu.h.
| #define S5P_CMU_SYSCLK_ISP_LOWPWR S5P_PMUREG(0x13B8) |
Definition at line 208 of file regs-pmu.h.
| #define S5P_CORE_LOCAL_PWR_EN 0x3 |
Definition at line 159 of file regs-pmu.h.
| #define S5P_CSSYS_MEM_LOWPWR S5P_PMUREG(0x11D4) |
Definition at line 99 of file regs-pmu.h.
| #define S5P_CSSYS_MEM_OPTION S5P_PMUREG(0x2EA8) |
Definition at line 219 of file regs-pmu.h.
| #define S5P_DAC_PHY_CONTROL S5P_PMUREG(0x070C) |
Definition at line 42 of file regs-pmu.h.
| #define S5P_DAC_PHY_ENABLE (1 << 0) |
Definition at line 43 of file regs-pmu.h.
| #define S5P_DDRPHY_DLLOFF_LOWPWR S5P_PMUREG(0x13B4) |
Definition at line 207 of file regs-pmu.h.
| #define S5P_DIS_IRQ_CENTRAL0 S5P_PMUREG(0x1008) |
Definition at line 61 of file regs-pmu.h.
| #define S5P_DIS_IRQ_CENTRAL1 S5P_PMUREG(0x1018) |
Definition at line 64 of file regs-pmu.h.
| #define S5P_DIS_IRQ_CENTRAL2 S5P_PMUREG(0x1028) |
Definition at line 226 of file regs-pmu.h.
| #define S5P_DIS_IRQ_CENTRAL3 S5P_PMUREG(0x1038) |
Definition at line 229 of file regs-pmu.h.
| #define S5P_DIS_IRQ_CORE0 S5P_PMUREG(0x1004) |
Definition at line 60 of file regs-pmu.h.
| #define S5P_DIS_IRQ_CORE1 S5P_PMUREG(0x1014) |
Definition at line 63 of file regs-pmu.h.
| #define S5P_DIS_IRQ_CORE2 S5P_PMUREG(0x1024) |
Definition at line 225 of file regs-pmu.h.
| #define S5P_DIS_IRQ_CORE3 S5P_PMUREG(0x1034) |
Definition at line 228 of file regs-pmu.h.
| #define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR S5P_PMUREG(0x1058) |
Definition at line 185 of file regs-pmu.h.
| #define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR S5P_PMUREG(0x1054) |
Definition at line 184 of file regs-pmu.h.
| #define S5P_DRAM_FREQ_DOWN_LOWPWR S5P_PMUREG(0x13B0) |
Definition at line 206 of file regs-pmu.h.
| #define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604) |
Definition at line 36 of file regs-pmu.h.
| #define S5P_EPLL_SYSCLK_LOWPWR S5P_PMUREG(0x112C) |
Definition at line 74 of file regs-pmu.h.
| #define S5P_EXT_REGULATOR_LOWPWR S5P_PMUREG(0x12C0) |
Definition at line 113 of file regs-pmu.h.
| #define S5P_G2D_ACP_MEM_LOWPWR S5P_PMUREG(0x11C8) |
Definition at line 96 of file regs-pmu.h.
| #define S5P_G2D_ACP_MEM_OPTION S5P_PMUREG(0x2E48) |
Definition at line 216 of file regs-pmu.h.
| #define S5P_G3D_LOWPWR S5P_PMUREG(0x138C) |
Definition at line 119 of file regs-pmu.h.
| #define S5P_G3D_OPTION S5P_PMUREG(0x3C68) |
Definition at line 136 of file regs-pmu.h.
| #define S5P_GPIO_MODE_COREBLK_LOWPWR S5P_PMUREG(0x1320) |
Definition at line 202 of file regs-pmu.h.
| #define S5P_GPIO_MODE_LOWPWR S5P_PMUREG(0x1300) |
Definition at line 114 of file regs-pmu.h.
| #define S5P_GPIO_MODE_MAUDIO_LOWPWR S5P_PMUREG(0x1340) |
Definition at line 115 of file regs-pmu.h.
| #define S5P_GPS_ALIVE_LOWPWR S5P_PMUREG(0x13A0) |
Definition at line 123 of file regs-pmu.h.
| #define S5P_GPS_ALIVE_OPTION S5P_PMUREG(0x3D08) |
Definition at line 141 of file regs-pmu.h.
| #define S5P_GPS_LOWPWR S5P_PMUREG(0x139C) |
Definition at line 122 of file regs-pmu.h.
| #define S5P_GPS_OPTION S5P_PMUREG(0x3CE8) |
Definition at line 140 of file regs-pmu.h.
| #define S5P_HDMI_PHY_CONTROL S5P_PMUREG(0x0700) |
Definition at line 39 of file regs-pmu.h.
| #define S5P_HDMI_PHY_ENABLE (1 << 0) |
Definition at line 40 of file regs-pmu.h.
| #define S5P_HSI_MEM_LOWPWR S5P_PMUREG(0x11C4) |
Definition at line 198 of file regs-pmu.h.
| #define S5P_HSI_MEM_OPTION S5P_PMUREG(0x2E28) |
Definition at line 215 of file regs-pmu.h.
| #define S5P_HSMMC_MEM_LOWPWR S5P_PMUREG(0x11D0) |
Definition at line 98 of file regs-pmu.h.
| #define S5P_HSMMC_MEM_OPTION S5P_PMUREG(0x2E88) |
Definition at line 218 of file regs-pmu.h.
| #define S5P_INFORM0 S5P_PMUREG(0x0800) |
Definition at line 50 of file regs-pmu.h.
| #define S5P_INFORM1 S5P_PMUREG(0x0804) |
Definition at line 51 of file regs-pmu.h.
| #define S5P_INFORM2 S5P_PMUREG(0x0808) |
Definition at line 52 of file regs-pmu.h.
| #define S5P_INFORM3 S5P_PMUREG(0x080C) |
Definition at line 53 of file regs-pmu.h.
| #define S5P_INFORM4 S5P_PMUREG(0x0810) |
Definition at line 54 of file regs-pmu.h.
| #define S5P_INFORM5 S5P_PMUREG(0x0814) |
Definition at line 55 of file regs-pmu.h.
| #define S5P_INFORM6 S5P_PMUREG(0x0818) |
Definition at line 56 of file regs-pmu.h.
| #define S5P_INFORM7 S5P_PMUREG(0x081C) |
Definition at line 57 of file regs-pmu.h.
| #define S5P_INT_LOCAL_PWR_EN 0x7 |
Definition at line 160 of file regs-pmu.h.
| #define S5P_ISP_ARM_LOWPWR S5P_PMUREG(0x1050) |
Definition at line 183 of file regs-pmu.h.
| #define S5P_ISP_LOWPWR S5P_PMUREG(0x1394) |
Definition at line 205 of file regs-pmu.h.
| #define S5P_L2_0_LOWPWR S5P_PMUREG(0x10C0) |
Definition at line 66 of file regs-pmu.h.
| #define S5P_L2_1_LOWPWR S5P_PMUREG(0x10C4) |
Definition at line 67 of file regs-pmu.h.
| #define S5P_LCD0_LOWPWR S5P_PMUREG(0x1390) |
Definition at line 120 of file regs-pmu.h.
| #define S5P_LCD0_OPTION S5P_PMUREG(0x3C88) |
Definition at line 137 of file regs-pmu.h.
| #define S5P_LCD1_LOWPWR S5P_PMUREG(0x1394) |
Definition at line 178 of file regs-pmu.h.
| #define S5P_LCD1_OPTION S5P_PMUREG(0x3CA8) |
Definition at line 138 of file regs-pmu.h.
| #define S5P_LOGIC_RESET_COREBLK_LOWPWR S5P_PMUREG(0x11B0) |
Definition at line 196 of file regs-pmu.h.
| #define S5P_LOGIC_RESET_LOWPWR S5P_PMUREG(0x11A0) |
Definition at line 94 of file regs-pmu.h.
| #define S5P_LPDDR_PHY_DLL_LOCK_LOWPWR S5P_PMUREG(0x13C0) |
Definition at line 210 of file regs-pmu.h.
| #define S5P_MAUDIO_LOWPWR S5P_PMUREG(0x1398) |
Definition at line 121 of file regs-pmu.h.
| #define S5P_MAUDIO_OPTION S5P_PMUREG(0x3CC8) |
Definition at line 139 of file regs-pmu.h.
| #define S5P_MFC_LOWPWR S5P_PMUREG(0x1388) |
Definition at line 118 of file regs-pmu.h.
| #define S5P_MFC_OPTION S5P_PMUREG(0x3C48) |
Definition at line 135 of file regs-pmu.h.
| #define S5P_MIPI_DPHY_CONTROL | ( | n | ) | S5P_PMUREG(0x0710 + (n) * 4) |
Definition at line 45 of file regs-pmu.h.
| #define S5P_MIPI_DPHY_ENABLE (1 << 0) |
Definition at line 46 of file regs-pmu.h.
| #define S5P_MIPI_DPHY_MRESETN (1 << 2) |
Definition at line 48 of file regs-pmu.h.
| #define S5P_MIPI_DPHY_SRESETN (1 << 1) |
Definition at line 47 of file regs-pmu.h.
| #define S5P_MODIMIF_MEM_LOWPWR S5P_PMUREG(0x11C4) |
Definition at line 175 of file regs-pmu.h.
| #define S5P_MPLL_SYSCLK_LOWPWR S5P_PMUREG(0x1124) |
Definition at line 72 of file regs-pmu.h.
| #define S5P_MPLLUSER_SYSCLK_LOWPWR S5P_PMUREG(0x1130) |
Definition at line 189 of file regs-pmu.h.
| #define S5P_ONENAND_MEM_LOWPWR S5P_PMUREG(0x11C0) |
Definition at line 95 of file regs-pmu.h.
| #define S5P_ONENAND_MEM_OPTION S5P_PMUREG(0x2E08) |
Definition at line 214 of file regs-pmu.h.
| #define S5P_OSCCLK_GATE_COREBLK_LOWPWR S5P_PMUREG(0x11B4) |
Definition at line 197 of file regs-pmu.h.
| #define S5P_OSCCLK_GATE_LOWPWR S5P_PMUREG(0x11A4) |
Definition at line 195 of file regs-pmu.h.
| #define S5P_PAD_ISOLATION_COREBLK_LOWPWR S5P_PMUREG(0x1250) |
Definition at line 201 of file regs-pmu.h.
| #define S5P_PAD_RET_EBIA_OPTION S5P_PMUREG(0x3188) |
Definition at line 148 of file regs-pmu.h.
| #define S5P_PAD_RET_EBIB_OPTION S5P_PMUREG(0x31A8) |
Definition at line 149 of file regs-pmu.h.
| #define S5P_PAD_RET_GPIO_OPTION S5P_PMUREG(0x3108) |
Definition at line 144 of file regs-pmu.h.
| #define S5P_PAD_RET_MAUDIO_OPTION S5P_PMUREG(0x3028) |
Definition at line 143 of file regs-pmu.h.
| #define S5P_PAD_RET_MMCA_OPTION S5P_PMUREG(0x3148) |
Definition at line 146 of file regs-pmu.h.
| #define S5P_PAD_RET_MMCB_OPTION S5P_PMUREG(0x3168) |
Definition at line 147 of file regs-pmu.h.
| #define S5P_PAD_RET_UART_OPTION S5P_PMUREG(0x3128) |
Definition at line 145 of file regs-pmu.h.
| #define S5P_PAD_RETENTION_ALV_SEL_LOWPWR S5P_PMUREG(0x1260) |
Definition at line 110 of file regs-pmu.h.
| #define S5P_PAD_RETENTION_DRAM_LOWPWR S5P_PMUREG(0x1200) |
Definition at line 101 of file regs-pmu.h.
| #define S5P_PAD_RETENTION_EBIA_LOWPWR S5P_PMUREG(0x1230) |
Definition at line 107 of file regs-pmu.h.
| #define S5P_PAD_RETENTION_EBIB_LOWPWR S5P_PMUREG(0x1234) |
Definition at line 108 of file regs-pmu.h.
| #define S5P_PAD_RETENTION_GPIO_COREBLK_LOWPWR S5P_PMUREG(0x123C) |
Definition at line 200 of file regs-pmu.h.
| #define S5P_PAD_RETENTION_GPIO_LOWPWR S5P_PMUREG(0x1220) |
Definition at line 103 of file regs-pmu.h.
| #define S5P_PAD_RETENTION_ISOLATION_LOWPWR S5P_PMUREG(0x1240) |
Definition at line 109 of file regs-pmu.h.
| #define S5P_PAD_RETENTION_MAUDIO_LOWPWR S5P_PMUREG(0x1204) |
Definition at line 102 of file regs-pmu.h.
| #define S5P_PAD_RETENTION_MMCA_LOWPWR S5P_PMUREG(0x1228) |
Definition at line 105 of file regs-pmu.h.
| #define S5P_PAD_RETENTION_MMCB_LOWPWR S5P_PMUREG(0x122C) |
Definition at line 106 of file regs-pmu.h.
| #define S5P_PAD_RETENTION_UART_LOWPWR S5P_PMUREG(0x1224) |
Definition at line 104 of file regs-pmu.h.
| #define S5P_PCIE_MEM_LOWPWR S5P_PMUREG(0x11E0) |
Definition at line 176 of file regs-pmu.h.
| #define S5P_PMU_CAM_CONF S5P_PMUREG(0x3C00) |
Definition at line 151 of file regs-pmu.h.
| #define S5P_PMU_G3D_CONF S5P_PMUREG(0x3C60) |
Definition at line 154 of file regs-pmu.h.
| #define S5P_PMU_GPS_CONF S5P_PMUREG(0x3CE0) |
Definition at line 156 of file regs-pmu.h.
| #define S5P_PMU_LCD0_CONF S5P_PMUREG(0x3C80) |
Definition at line 155 of file regs-pmu.h.
| #define S5P_PMU_LCD1_CONF S5P_PMUREG(0x3CA0) |
Definition at line 180 of file regs-pmu.h.
| #define S5P_PMU_MFC_CONF S5P_PMUREG(0x3C40) |
Definition at line 153 of file regs-pmu.h.
| #define S5P_PMU_SATA_PHY_CONTROL S5P_PMUREG(0x0720) |
Definition at line 171 of file regs-pmu.h.
| #define S5P_PMU_SATA_PHY_CONTROL_EN 0x1 |
Definition at line 158 of file regs-pmu.h.
| #define S5P_PMU_TV_CONF S5P_PMUREG(0x3C20) |
Definition at line 152 of file regs-pmu.h.
| #define S5P_PMUREG | ( | x | ) | (S5P_VA_PMU + (x)) |
Definition at line 17 of file regs-pmu.h.
| #define S5P_ROTATOR_MEM_LOWPWR S5P_PMUREG(0x11DC) |
Definition at line 199 of file regs-pmu.h.
| #define S5P_ROTATOR_MEM_OPTION S5P_PMUREG(0x2F48) |
Definition at line 221 of file regs-pmu.h.
| #define S5P_SATA_MEM_LOWPWR S5P_PMUREG(0x11E4) |
Definition at line 177 of file regs-pmu.h.
| #define S5P_SECSS_MEM_LOWPWR S5P_PMUREG(0x11D8) |
Definition at line 100 of file regs-pmu.h.
| #define S5P_SECSS_MEM_OPTION S5P_PMUREG(0x2EC8) |
Definition at line 220 of file regs-pmu.h.
| #define S5P_SWRESET S5P_PMUREG(0x0400) |
Definition at line 32 of file regs-pmu.h.
| #define S5P_TOP_ASB_ISOLATION_LOWPWR S5P_PMUREG(0x1348) |
Definition at line 204 of file regs-pmu.h.
| #define S5P_TOP_ASB_RESET_LOWPWR S5P_PMUREG(0x1344) |
Definition at line 203 of file regs-pmu.h.
| #define S5P_TOP_BUS_COREBLK_LOWPWR S5P_PMUREG(0x1190) |
Definition at line 192 of file regs-pmu.h.
| #define S5P_TOP_BUS_LOWPWR S5P_PMUREG(0x1180) |
Definition at line 91 of file regs-pmu.h.
| #define S5P_TOP_PWR_COREBLK_LOWPWR S5P_PMUREG(0x1198) |
Definition at line 194 of file regs-pmu.h.
| #define S5P_TOP_PWR_LOWPWR S5P_PMUREG(0x1188) |
Definition at line 93 of file regs-pmu.h.
| #define S5P_TOP_PWR_OPTION S5P_PMUREG(0x2C48) |
Definition at line 132 of file regs-pmu.h.
| #define S5P_TOP_RETENTION_COREBLK_LOWPWR S5P_PMUREG(0x1194) |
Definition at line 193 of file regs-pmu.h.
| #define S5P_TOP_RETENTION_LOWPWR S5P_PMUREG(0x1184) |
Definition at line 92 of file regs-pmu.h.
| #define S5P_TV_LOWPWR S5P_PMUREG(0x1384) |
Definition at line 117 of file regs-pmu.h.
| #define S5P_TV_OPTION S5P_PMUREG(0x3C28) |
Definition at line 134 of file regs-pmu.h.
| #define S5P_USBDEVICE_PHY_CONTROL S5P_PMUREG(0x0704) |
Definition at line 165 of file regs-pmu.h.
| #define S5P_USBDEVICE_PHY_ENABLE (1 << 0) |
Definition at line 166 of file regs-pmu.h.
| #define S5P_USBHOST_PHY_CONTROL S5P_PMUREG(0x0708) |
Definition at line 168 of file regs-pmu.h.
| #define S5P_USBHOST_PHY_ENABLE (1 << 0) |
Definition at line 169 of file regs-pmu.h.
| #define S5P_USBOTG_MEM_LOWPWR S5P_PMUREG(0x11CC) |
Definition at line 97 of file regs-pmu.h.
| #define S5P_USBOTG_MEM_OPTION S5P_PMUREG(0x2E68) |
Definition at line 217 of file regs-pmu.h.
| #define S5P_USE_STANDBY_WFE0 (1 << 24) |
Definition at line 28 of file regs-pmu.h.
| #define S5P_USE_STANDBY_WFE1 (1 << 25) |
Definition at line 29 of file regs-pmu.h.
| #define S5P_USE_STANDBY_WFI0 (1 << 16) |
Definition at line 25 of file regs-pmu.h.
| #define S5P_USE_STANDBY_WFI1 (1 << 17) |
Definition at line 26 of file regs-pmu.h.
| #define S5P_USE_STANDBYWFE_ISP_ARM (1 << 26) |
Definition at line 30 of file regs-pmu.h.
| #define S5P_USE_STANDBYWFI_ISP_ARM (1 << 18) |
Definition at line 27 of file regs-pmu.h.
| #define S5P_VPLL_SYSCLK_LOWPWR S5P_PMUREG(0x1128) |
Definition at line 73 of file regs-pmu.h.
| #define S5P_WAKEUP_MASK S5P_PMUREG(0x0608) |
Definition at line 37 of file regs-pmu.h.
| #define S5P_WAKEUP_STAT S5P_PMUREG(0x0600) |
Definition at line 35 of file regs-pmu.h.
| #define S5P_XUSBXTI_LOWPWR S5P_PMUREG(0x1280) |
Definition at line 111 of file regs-pmu.h.
| #define S5P_XXTI_LOWPWR S5P_PMUREG(0x1284) |
Definition at line 112 of file regs-pmu.h.
1.8.2