Macros
#define	__PLAT_S3C_SDHCI_REGS_H __FILE__

#define	S3C_SDHCI_CONTROL2 (0x80)

#define	S3C_SDHCI_CONTROL3 (0x84)

#define	S3C64XX_SDHCI_CONTROL4 (0x8C)

#define	S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR (1 << 31)

#define	S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK (1 << 30)

#define	S3C_SDHCI_CTRL2_CDINVRXD3 (1 << 29)

#define	S3C_SDHCI_CTRL2_SLCARDOUT (1 << 28)

#define	S3C_SDHCI_CTRL2_FLTCLKSEL_MASK (0xf << 24)

#define	S3C_SDHCI_CTRL2_FLTCLKSEL_SHIFT (24)

#define	S3C_SDHCI_CTRL2_FLTCLKSEL(_x) ((_x) << 24)

#define	S3C_SDHCI_CTRL2_LVLDAT_MASK (0xff << 16)

#define	S3C_SDHCI_CTRL2_LVLDAT_SHIFT (16)

#define	S3C_SDHCI_CTRL2_LVLDAT(_x) ((_x) << 16)

#define	S3C_SDHCI_CTRL2_ENFBCLKTX (1 << 15)

#define	S3C_SDHCI_CTRL2_ENFBCLKRX (1 << 14)

#define	S3C_SDHCI_CTRL2_SDCDSEL (1 << 13)

#define	S3C_SDHCI_CTRL2_SDSIGPC (1 << 12)

#define	S3C_SDHCI_CTRL2_ENBUSYCHKTXSTART (1 << 11)

#define	S3C_SDHCI_CTRL2_DFCNT_MASK (0x3 << 9)

#define	S3C_SDHCI_CTRL2_DFCNT_SHIFT (9)

#define	S3C_SDHCI_CTRL2_DFCNT_NONE (0x0 << 9)

#define	S3C_SDHCI_CTRL2_DFCNT_4SDCLK (0x1 << 9)

#define	S3C_SDHCI_CTRL2_DFCNT_16SDCLK (0x2 << 9)

#define	S3C_SDHCI_CTRL2_DFCNT_64SDCLK (0x3 << 9)

#define	S3C_SDHCI_CTRL2_ENCLKOUTHOLD (1 << 8)

#define	S3C_SDHCI_CTRL2_RWAITMODE (1 << 7)

#define	S3C_SDHCI_CTRL2_DISBUFRD (1 << 6)

#define	S3C_SDHCI_CTRL2_SELBASECLK_MASK (0x3 << 4)

#define	S3C_SDHCI_CTRL2_SELBASECLK_SHIFT (4)

#define	S3C_SDHCI_CTRL2_PWRSYNC (1 << 3)

#define	S3C_SDHCI_CTRL2_ENCLKOUTMSKCON (1 << 1)

#define	S3C_SDHCI_CTRL2_HWINITFIN (1 << 0)

#define	S3C_SDHCI_CTRL3_FCSEL3 (1 << 31)

#define	S3C_SDHCI_CTRL3_FCSEL2 (1 << 23)

#define	S3C_SDHCI_CTRL3_FCSEL1 (1 << 15)

#define	S3C_SDHCI_CTRL3_FCSEL0 (1 << 7)

#define	S3C_SDHCI_CTRL3_FIA3_MASK (0x7f << 24)

#define	S3C_SDHCI_CTRL3_FIA3_SHIFT (24)

#define	S3C_SDHCI_CTRL3_FIA3(_x) ((_x) << 24)

#define	S3C_SDHCI_CTRL3_FIA2_MASK (0x7f << 16)

#define	S3C_SDHCI_CTRL3_FIA2_SHIFT (16)

#define	S3C_SDHCI_CTRL3_FIA2(_x) ((_x) << 16)

#define	S3C_SDHCI_CTRL3_FIA1_MASK (0x7f << 8)

#define	S3C_SDHCI_CTRL3_FIA1_SHIFT (8)

#define	S3C_SDHCI_CTRL3_FIA1(_x) ((_x) << 8)

#define	S3C_SDHCI_CTRL3_FIA0_MASK (0x7f << 0)

#define	S3C_SDHCI_CTRL3_FIA0_SHIFT (0)

#define	S3C_SDHCI_CTRL3_FIA0(_x) ((_x) << 0)

#define	S3C64XX_SDHCI_CONTROL4_DRIVE_MASK (0x3 << 16)

#define	S3C64XX_SDHCI_CONTROL4_DRIVE_SHIFT (16)

#define	S3C64XX_SDHCI_CONTROL4_DRIVE_2mA (0x0 << 16)

#define	S3C64XX_SDHCI_CONTROL4_DRIVE_4mA (0x1 << 16)

#define	S3C64XX_SDHCI_CONTROL4_DRIVE_7mA (0x2 << 16)

#define	S3C64XX_SDHCI_CONTROL4_DRIVE_9mA (0x3 << 16)

#define	S3C64XX_SDHCI_CONTROL4_BUSY (1)

Macro Definition Documentation

#define __PLAT_S3C_SDHCI_REGS_H __FILE__

Definition at line 16 of file regs-sdhci.h.

#define S3C64XX_SDHCI_CONTROL4 (0x8C)

Definition at line 20 of file regs-sdhci.h.

#define S3C64XX_SDHCI_CONTROL4_BUSY (1)

Definition at line 85 of file regs-sdhci.h.

#define S3C64XX_SDHCI_CONTROL4_DRIVE_2mA (0x0 << 16)

Definition at line 80 of file regs-sdhci.h.

#define S3C64XX_SDHCI_CONTROL4_DRIVE_4mA (0x1 << 16)

Definition at line 81 of file regs-sdhci.h.

#define S3C64XX_SDHCI_CONTROL4_DRIVE_7mA (0x2 << 16)

Definition at line 82 of file regs-sdhci.h.

#define S3C64XX_SDHCI_CONTROL4_DRIVE_9mA (0x3 << 16)

Definition at line 83 of file regs-sdhci.h.

#define S3C64XX_SDHCI_CONTROL4_DRIVE_MASK (0x3 << 16)

Definition at line 78 of file regs-sdhci.h.

#define S3C64XX_SDHCI_CONTROL4_DRIVE_SHIFT (16)

Definition at line 79 of file regs-sdhci.h.

#define S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK (1 << 30)

Definition at line 23 of file regs-sdhci.h.

#define S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR (1 << 31)

Definition at line 22 of file regs-sdhci.h.

#define S3C_SDHCI_CONTROL2 (0x80)

Definition at line 18 of file regs-sdhci.h.

#define S3C_SDHCI_CONTROL3 (0x84)

Definition at line 19 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_CDINVRXD3 (1 << 29)

Definition at line 24 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_DFCNT_16SDCLK (0x2 << 9)

Definition at line 45 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_DFCNT_4SDCLK (0x1 << 9)

Definition at line 44 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_DFCNT_64SDCLK (0x3 << 9)

Definition at line 46 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_DFCNT_MASK (0x3 << 9)

Definition at line 41 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_DFCNT_NONE (0x0 << 9)

Definition at line 43 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_DFCNT_SHIFT (9)

Definition at line 42 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_DISBUFRD (1 << 6)

Definition at line 50 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_ENBUSYCHKTXSTART (1 << 11)

Definition at line 39 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_ENCLKOUTHOLD (1 << 8)

Definition at line 48 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_ENCLKOUTMSKCON (1 << 1)

Definition at line 54 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_ENFBCLKRX (1 << 14)

Definition at line 36 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_ENFBCLKTX (1 << 15)

Definition at line 35 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_FLTCLKSEL ( _x ) ((_x) << 24)

Definition at line 29 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_FLTCLKSEL_MASK (0xf << 24)

Definition at line 27 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_FLTCLKSEL_SHIFT (24)

Definition at line 28 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_HWINITFIN (1 << 0)

Definition at line 55 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_LVLDAT ( _x ) ((_x) << 16)

Definition at line 33 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_LVLDAT_MASK (0xff << 16)

Definition at line 31 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_LVLDAT_SHIFT (16)

Definition at line 32 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_PWRSYNC (1 << 3)

Definition at line 53 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_RWAITMODE (1 << 7)

Definition at line 49 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_SDCDSEL (1 << 13)

Definition at line 37 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_SDSIGPC (1 << 12)

Definition at line 38 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_SELBASECLK_MASK (0x3 << 4)

Definition at line 51 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_SELBASECLK_SHIFT (4)

Definition at line 52 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL2_SLCARDOUT (1 << 28)

Definition at line 25 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FCSEL0 (1 << 7)

Definition at line 60 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FCSEL1 (1 << 15)

Definition at line 59 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FCSEL2 (1 << 23)

Definition at line 58 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FCSEL3 (1 << 31)

Definition at line 57 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FIA0 ( _x ) ((_x) << 0)

Definition at line 76 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FIA0_MASK (0x7f << 0)

Definition at line 74 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FIA0_SHIFT (0)

Definition at line 75 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FIA1 ( _x ) ((_x) << 8)

Definition at line 72 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FIA1_MASK (0x7f << 8)

Definition at line 70 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FIA1_SHIFT (8)

Definition at line 71 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FIA2 ( _x ) ((_x) << 16)

Definition at line 68 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FIA2_MASK (0x7f << 16)

Definition at line 66 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FIA2_SHIFT (16)

Definition at line 67 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FIA3 ( _x ) ((_x) << 24)

Definition at line 64 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FIA3_MASK (0x7f << 24)

Definition at line 62 of file regs-sdhci.h.

#define S3C_SDHCI_CTRL3_FIA3_SHIFT (24)

Definition at line 63 of file regs-sdhci.h.

Macros

Macro Definition Documentation