Linux Kernel
3.7.1
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Macros | |
#define | KS8695_SWITCH_OFFSET (0xF0000 + 0xe800) |
#define | KS8695_SWITCH_VA (KS8695_IO_VA + KS8695_SWITCH_OFFSET) |
#define | KS8695_SWITCH_PA (KS8695_IO_PA + KS8695_SWITCH_OFFSET) |
#define | KS8695_SEC0 (0x00) /* Switch Engine Control 0 */ |
#define | KS8695_SEC1 (0x04) /* Switch Engine Control 1 */ |
#define | KS8695_SEC2 (0x08) /* Switch Engine Control 2 */ |
#define | KS8695_SEPXCZ(x, z) (0x0c + (((x)-1)*3 + ((z)-1))*4) /* Port Configuration Registers */ |
#define | KS8695_SEP12AN (0x48) /* Port 1 & 2 Auto-Negotiation */ |
#define | KS8695_SEP34AN (0x4c) /* Port 3 & 4 Auto-Negotiation */ |
#define | KS8695_SEIAC (0x50) /* Indirect Access Control */ |
#define | KS8695_SEIADH2 (0x54) /* Indirect Access Data High 2 */ |
#define | KS8695_SEIADH1 (0x58) /* Indirect Access Data High 1 */ |
#define | KS8695_SEIADL (0x5c) /* Indirect Access Data Low */ |
#define | KS8695_SEAFC (0x60) /* Advance Feature Control */ |
#define | KS8695_SEDSCPH (0x64) /* TOS Priority High */ |
#define | KS8695_SEDSCPL (0x68) /* TOS Priority Low */ |
#define | KS8695_SEMAH (0x6c) /* Switch Engine MAC Address High */ |
#define | KS8695_SEMAL (0x70) /* Switch Engine MAC Address Low */ |
#define | KS8695_LPPM12 (0x74) /* Port 1 & 2 PHY Power Management */ |
#define | KS8695_LPPM34 (0x78) /* Port 3 & 4 PHY Power Management */ |
#define | SEC0_LLED1S (7 << 25) /* LED1 Select */ |
#define | LLED1S_SPEED (0 << 25) |
#define | LLED1S_LINK (1 << 25) |
#define | LLED1S_DUPLEX (2 << 25) |
#define | LLED1S_COLLISION (3 << 25) |
#define | LLED1S_ACTIVITY (4 << 25) |
#define | LLED1S_FDX_COLLISION (5 << 25) |
#define | LLED1S_LINK_ACTIVITY (6 << 25) |
#define | SEC0_LLED0S (7 << 22) /* LED0 Select */ |
#define | LLED0S_SPEED (0 << 22) |
#define | LLED0S_LINK (1 << 22) |
#define | LLED0S_DUPLEX (2 << 22) |
#define | LLED0S_COLLISION (3 << 22) |
#define | LLED0S_ACTIVITY (4 << 22) |
#define | LLED0S_FDX_COLLISION (5 << 22) |
#define | LLED0S_LINK_ACTIVITY (6 << 22) |
#define | SEC0_ENABLE (1 << 0) /* Enable Switch */ |
#define KS8695_LPPM12 (0x74) /* Port 1 & 2 PHY Power Management */ |
Definition at line 41 of file regs-switch.h.
#define KS8695_LPPM34 (0x78) /* Port 3 & 4 PHY Power Management */ |
Definition at line 42 of file regs-switch.h.
#define KS8695_SEAFC (0x60) /* Advance Feature Control */ |
Definition at line 36 of file regs-switch.h.
#define KS8695_SEC0 (0x00) /* Switch Engine Control 0 */ |
Definition at line 24 of file regs-switch.h.
#define KS8695_SEC1 (0x04) /* Switch Engine Control 1 */ |
Definition at line 25 of file regs-switch.h.
#define KS8695_SEC2 (0x08) /* Switch Engine Control 2 */ |
Definition at line 26 of file regs-switch.h.
#define KS8695_SEDSCPH (0x64) /* TOS Priority High */ |
Definition at line 37 of file regs-switch.h.
#define KS8695_SEDSCPL (0x68) /* TOS Priority Low */ |
Definition at line 38 of file regs-switch.h.
#define KS8695_SEIAC (0x50) /* Indirect Access Control */ |
Definition at line 32 of file regs-switch.h.
#define KS8695_SEIADH1 (0x58) /* Indirect Access Data High 1 */ |
Definition at line 34 of file regs-switch.h.
#define KS8695_SEIADH2 (0x54) /* Indirect Access Data High 2 */ |
Definition at line 33 of file regs-switch.h.
#define KS8695_SEIADL (0x5c) /* Indirect Access Data Low */ |
Definition at line 35 of file regs-switch.h.
#define KS8695_SEMAH (0x6c) /* Switch Engine MAC Address High */ |
Definition at line 39 of file regs-switch.h.
#define KS8695_SEMAL (0x70) /* Switch Engine MAC Address Low */ |
Definition at line 40 of file regs-switch.h.
#define KS8695_SEP12AN (0x48) /* Port 1 & 2 Auto-Negotiation */ |
Definition at line 30 of file regs-switch.h.
#define KS8695_SEP34AN (0x4c) /* Port 3 & 4 Auto-Negotiation */ |
Definition at line 31 of file regs-switch.h.
#define KS8695_SEPXCZ | ( | x, | |
z | |||
) | (0x0c + (((x)-1)*3 + ((z)-1))*4) /* Port Configuration Registers */ |
Definition at line 28 of file regs-switch.h.
#define KS8695_SWITCH_OFFSET (0xF0000 + 0xe800) |
Definition at line 16 of file regs-switch.h.
#define KS8695_SWITCH_PA (KS8695_IO_PA + KS8695_SWITCH_OFFSET) |
Definition at line 18 of file regs-switch.h.
#define KS8695_SWITCH_VA (KS8695_IO_VA + KS8695_SWITCH_OFFSET) |
Definition at line 17 of file regs-switch.h.
#define LLED0S_ACTIVITY (4 << 22) |
Definition at line 59 of file regs-switch.h.
#define LLED0S_COLLISION (3 << 22) |
Definition at line 58 of file regs-switch.h.
#define LLED0S_DUPLEX (2 << 22) |
Definition at line 57 of file regs-switch.h.
#define LLED0S_FDX_COLLISION (5 << 22) |
Definition at line 60 of file regs-switch.h.
#define LLED0S_LINK (1 << 22) |
Definition at line 56 of file regs-switch.h.
#define LLED0S_LINK_ACTIVITY (6 << 22) |
Definition at line 61 of file regs-switch.h.
#define LLED0S_SPEED (0 << 22) |
Definition at line 55 of file regs-switch.h.
#define LLED1S_ACTIVITY (4 << 25) |
Definition at line 51 of file regs-switch.h.
#define LLED1S_COLLISION (3 << 25) |
Definition at line 50 of file regs-switch.h.
#define LLED1S_DUPLEX (2 << 25) |
Definition at line 49 of file regs-switch.h.
#define LLED1S_FDX_COLLISION (5 << 25) |
Definition at line 52 of file regs-switch.h.
#define LLED1S_LINK (1 << 25) |
Definition at line 48 of file regs-switch.h.
#define LLED1S_LINK_ACTIVITY (6 << 25) |
Definition at line 53 of file regs-switch.h.
#define LLED1S_SPEED (0 << 25) |
Definition at line 47 of file regs-switch.h.
#define SEC0_ENABLE (1 << 0) /* Enable Switch */ |
Definition at line 62 of file regs-switch.h.
#define SEC0_LLED0S (7 << 22) /* LED0 Select */ |
Definition at line 54 of file regs-switch.h.
#define SEC0_LLED1S (7 << 25) /* LED1 Select */ |
Definition at line 46 of file regs-switch.h.