3 #include <linux/wait.h>
4 #include <linux/ptrace.h>
9 #include <asm/unistd.h>
29 ctx->
csa.class_0_pending = spu->class_0_pending;
30 ctx->
csa.class_0_dar = spu->class_0_dar;
33 ctx->
csa.class_1_dsisr = spu->class_1_dsisr;
34 ctx->
csa.class_1_dar = spu->class_1_dar;
53 stopped = SPU_STATUS_INVALID_INSTR | SPU_STATUS_SINGLE_STEP |
54 SPU_STATUS_STOPPED_BY_HALT | SPU_STATUS_STOPPED_BY_STOP;
57 *stat = ctx->
ops->status_read(ctx);
58 if (*stat & stopped) {
63 if (*stat & SPU_STATUS_RUNNING)
71 dsisr = ctx->
csa.class_1_dsisr;
72 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
75 if (ctx->
csa.class_0_pending)
88 const u32 status_loading = SPU_STATUS_RUNNING
89 | SPU_STATUS_ISOLATED_STATE | SPU_STATUS_ISOLATED_LOAD_STATUS;
103 mfc_cntl = &ctx->
spu->priv2->mfc_control_RW;
108 out_be64(mfc_cntl, MFC_CNTL_PURGE_DMA_REQUEST);
109 while ((in_be64(mfc_cntl) & MFC_CNTL_PURGE_DMA_STATUS_MASK)
110 != MFC_CNTL_PURGE_DMA_COMPLETE) {
121 out_be64(mfc_cntl, 0);
124 sr1 = spu_mfc_sr1_get(ctx->
spu);
125 sr1 &= ~MFC_STATE1_PROBLEM_STATE_MASK;
126 spu_mfc_sr1_set(ctx->
spu, sr1);
130 ctx->
ops->signal2_write(ctx,
133 ctx->
ops->runcntl_write(ctx,
134 SPU_RUNCNTL_RUNNABLE | SPU_RUNCNTL_ISOLATE);
138 while (((status = ctx->
ops->status_read(ctx)) & status_loading) ==
149 if (!(status & SPU_STATUS_RUNNING)) {
152 pr_debug(
"%s: isolated LOAD failed\n", __func__);
153 ctx->
ops->runcntl_write(ctx, SPU_RUNCNTL_RUNNABLE);
158 if (!(status & SPU_STATUS_ISOLATED_STATE)) {
160 pr_debug(
"%s: SPU fell out of isolated mode?\n", __func__);
161 ctx->
ops->runcntl_write(ctx, SPU_RUNCNTL_STOP);
168 sr1 |= MFC_STATE1_PROBLEM_STATE_MASK;
169 spu_mfc_sr1_set(ctx->
spu, sr1);
177 unsigned long runcntl = SPU_RUNCNTL_RUNNABLE;
186 if (ctx->
flags & SPU_CREATE_NOSCHED) {
197 if (ctx->
flags & SPU_CREATE_ISOLATE) {
198 if (!(ctx->
ops->status_read(ctx) & SPU_STATUS_ISOLATED_STATE)) {
199 ret = spu_setup_isolated(ctx);
208 runcntl = ctx->
ops->runcntl_read(ctx) &
209 (SPU_RUNCNTL_RUNNABLE | SPU_RUNCNTL_ISOLATE);
211 runcntl = SPU_RUNCNTL_RUNNABLE;
213 unsigned long privcntl;
216 privcntl = SPU_PRIVCNTL_MODE_SINGLE_STEP;
218 privcntl = SPU_PRIVCNTL_MODE_NORMAL;
220 ctx->
ops->privcntl_write(ctx, privcntl);
221 ctx->
ops->npc_write(ctx, *npc);
224 ctx->
ops->runcntl_write(ctx, runcntl);
226 if (ctx->
flags & SPU_CREATE_NOSCHED) {
250 *status = ctx->
ops->status_read(ctx);
251 *npc = ctx->
ops->npc_read(ctx);
272 static int spu_handle_restartsys(
struct spu_context *ctx,
long *spu_ret,
308 static int spu_process_callback(
struct spu_context *ctx)
310 struct spu_syscall_block
s;
317 npc = ctx->
ops->npc_read(ctx) & ~3;
319 ls_pointer =
in_be32(ls + npc);
320 if (ls_pointer > (
LS_SIZE -
sizeof(
s)))
334 ret = spu_handle_restartsys(ctx, &spu_ret, &npc);
346 memcpy_toio(ls + ls_pointer, &spu_ret,
sizeof(spu_ret));
347 ctx->
ops->npc_write(ctx, npc);
348 ctx->
ops->runcntl_write(ctx, SPU_RUNCNTL_RUNNABLE);
363 ret = spu_acquire(ctx);
371 ret = spu_run_init(ctx, npc);
391 if (!(status & SPU_STATUS_STOPPED_BY_STOP)) {
399 if ((status & SPU_STATUS_STOPPED_BY_STOP) &&
400 (status >> SPU_STOP_STATUS_SHIFT == 0x2104)) {
401 ret = spu_process_callback(ctx);
404 status &= ~SPU_STATUS_STOPPED_BY_STOP;
416 }
while (!ret && !(status & (SPU_STATUS_STOPPED_BY_STOP |
417 SPU_STATUS_STOPPED_BY_HALT |
418 SPU_STATUS_SINGLE_STEP)));
420 spu_disable_spu(ctx);
421 ret = spu_run_fini(ctx, npc, &status);
424 if ((status & SPU_STATUS_STOPPED_BY_STOP) &&
425 (((status >> SPU_STOP_STATUS_SHIFT) & 0x3f00) == 0x2100))
426 ctx->
stats.libassist++;
430 ((status & SPU_STATUS_STOPPED_BY_HALT) ||
431 (status & SPU_STATUS_SINGLE_STEP) ||
432 ((status & SPU_STATUS_STOPPED_BY_STOP) &&
433 (status >> SPU_STOP_STATUS_SHIFT != 0x2104)))))
440 if (
unlikely(status & SPU_STATUS_SINGLE_STEP))
443 else if (
unlikely((status & SPU_STATUS_STOPPED_BY_STOP)
444 && (status >> SPU_STOP_STATUS_SHIFT) == 0x3fff)) {