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arch
ia64
include
asm
sn
rw_mmr.h
Go to the documentation of this file.
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2002-2006 Silicon Graphics, Inc. All Rights Reserved.
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*/
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#ifndef _ASM_IA64_SN_RW_MMR_H
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#define _ASM_IA64_SN_RW_MMR_H
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/*
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* This file that access MMRs via uncached physical addresses.
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* pio_phys_read_mmr - read an MMR
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* pio_phys_write_mmr - write an MMR
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* pio_atomic_phys_write_mmrs - atomically write 1 or 2 MMRs with psr.ic=0
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* Second MMR will be skipped if address is NULL
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*
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* Addresses passed to these routines should be uncached physical addresses
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* ie., 0x80000....
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*/
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extern
long
pio_phys_read_mmr
(
volatile
long
*mmr);
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extern
void
pio_phys_write_mmr
(
volatile
long
*mmr,
long
val
);
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extern
void
pio_atomic_phys_write_mmrs
(
volatile
long
*mmr1,
long
val1,
volatile
long
*mmr2,
long
val2);
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#endif
/* _ASM_IA64_SN_RW_MMR_H */
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