33 #if !defined(_PCMCIA_SA1100_H)
34 # define _PCMCIA_SA1100_H
58 #define MECR_SOCKET_0_SHIFT (0)
59 #define MECR_SOCKET_1_SHIFT (16)
61 #define MECR_BS_MASK (0x1f)
62 #define MECR_FAST_MODE_MASK (0x01)
64 #define MECR_BSIO_SHIFT (0)
65 #define MECR_BSA_SHIFT (5)
66 #define MECR_BSM_SHIFT (10)
67 #define MECR_FAST_SHIFT (15)
69 #define MECR_SET(mecr, sock, shift, mask, bs) \
70 ((mecr)=((mecr)&~(((mask)<<(shift))<<\
71 ((sock)==0?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT)))|\
72 (((bs)<<(shift))<<((sock)==0?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT)))
74 #define MECR_GET(mecr, sock, shift, mask) \
75 ((((mecr)>>(((sock)==0)?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT))>>\
78 #define MECR_BSIO_SET(mecr, sock, bs) \
79 MECR_SET((mecr), (sock), MECR_BSIO_SHIFT, MECR_BS_MASK, (bs))
81 #define MECR_BSIO_GET(mecr, sock) \
82 MECR_GET((mecr), (sock), MECR_BSIO_SHIFT, MECR_BS_MASK)
84 #define MECR_BSA_SET(mecr, sock, bs) \
85 MECR_SET((mecr), (sock), MECR_BSA_SHIFT, MECR_BS_MASK, (bs))
87 #define MECR_BSA_GET(mecr, sock) \
88 MECR_GET((mecr), (sock), MECR_BSA_SHIFT, MECR_BS_MASK)
90 #define MECR_BSM_SET(mecr, sock, bs) \
91 MECR_SET((mecr), (sock), MECR_BSM_SHIFT, MECR_BS_MASK, (bs))
93 #define MECR_BSM_GET(mecr, sock) \
94 MECR_GET((mecr), (sock), MECR_BSM_SHIFT, MECR_BS_MASK)
96 #define MECR_FAST_SET(mecr, sock, fast) \
97 MECR_SET((mecr), (sock), MECR_FAST_SHIFT, MECR_FAST_MODE_MASK, (fast))
99 #define MECR_FAST_GET(mecr, sock) \
100 MECR_GET((mecr), (sock), MECR_FAST_SHIFT, MECR_FAST_MODE_MASK)
106 static inline unsigned int sa1100_pcmcia_mecr_bs(
unsigned int pcmcia_cycle_ns,
107 unsigned int cpu_clock_khz){
108 unsigned int t = ((pcmcia_cycle_ns * cpu_clock_khz) / 6) - 1000000;
109 return (t / 1000000) + (((t % 1000000) == 0) ? 0 : 1);
115 static inline unsigned int sa1100_pcmcia_cmd_time(
unsigned int cpu_clock_khz,
116 unsigned int pcmcia_mecr_bs){
117 return (((10000000 * 2) / cpu_clock_khz) * (3 * (pcmcia_mecr_bs + 1))) / 10;