scoreregs.h File Reference

#include <linux/linkage.h>

Go to the source code of this file.

Macros
#define	TIME0BASE   0x96080000
#define	P_TIMER0_CTRL   (TIME0BASE + 0x00)
#define	P_TIMER0_CPP_CTRL   (TIME0BASE + 0x04)
#define	P_TIMER0_PRELOAD   (TIME0BASE + 0x08)
#define	P_TIMER0_CPP_REG   (TIME0BASE + 0x0C)
#define	P_TIMER0_UPCNT   (TIME0BASE + 0x10)
#define	TMR_DISABLE   0x0000
#define	TMR_ENABLE   0x0001
#define	TMR_IE_DISABLE   0x0000
#define	TMR_IE_ENABLE   0x0002
#define	TMR_OE_DISABLE   0x0004
#define	TMR_OE_ENABLE   0x0000
#define	TMR_UD_DOWN   0x0000
#define	TMR_UD_UP   0x0010
#define	TMR_UDS_UD   0x0000
#define	TMR_UDS_EXTUD   0x0020
#define	TMR_OM_TOGGLE   0x0000
#define	TMR_OM_PILSE   0x0040
#define	TMR_ES_PE   0x0000
#define	TMR_ES_NE   0x0100
#define	TMR_ES_BOTH   0x0200
#define	TMR_M_FREE   0x0000 /* free running timer mode */
#define	TMR_M_PERIODIC   0x0400 /* periodic timer mode */
#define	TMR_M_FC   0x0800 /* free running counter mode */
#define	TMR_M_PC   0x0c00 /* periodic counter mode */
#define	SYSTEM_CLOCK   (27*1000000/4) /* 27 MHz */

Macro Definition Documentation

#define P_TIMER0_CPP_CTRL   (TIME0BASE + 0x04)

Definition at line 9 of file scoreregs.h.

#define P_TIMER0_CPP_REG   (TIME0BASE + 0x0C)

Definition at line 11 of file scoreregs.h.

#define P_TIMER0_CTRL   (TIME0BASE + 0x00)

Definition at line 8 of file scoreregs.h.

#define P_TIMER0_PRELOAD   (TIME0BASE + 0x08)

Definition at line 10 of file scoreregs.h.

#define P_TIMER0_UPCNT   (TIME0BASE + 0x10)

Definition at line 12 of file scoreregs.h.

#define SYSTEM_CLOCK   (27*1000000/4) /* 27 MHz */

Definition at line 50 of file scoreregs.h.

#define TIME0BASE   0x96080000

Definition at line 7 of file scoreregs.h.

#define TMR_DISABLE   0x0000

Definition at line 16 of file scoreregs.h.

#define TMR_ENABLE   0x0001

Definition at line 17 of file scoreregs.h.

#define TMR_ES_BOTH   0x0200

Definition at line 42 of file scoreregs.h.

#define TMR_ES_NE   0x0100

Definition at line 41 of file scoreregs.h.

#define TMR_ES_PE   0x0000

Definition at line 40 of file scoreregs.h.

#define TMR_IE_DISABLE   0x0000

Definition at line 20 of file scoreregs.h.

#define TMR_IE_ENABLE   0x0002

Definition at line 21 of file scoreregs.h.

#define TMR_M_FC   0x0800 /* free running counter mode */

Definition at line 47 of file scoreregs.h.

#define TMR_M_FREE   0x0000 /* free running timer mode */

Definition at line 45 of file scoreregs.h.

#define TMR_M_PC   0x0c00 /* periodic counter mode */

Definition at line 48 of file scoreregs.h.

#define TMR_M_PERIODIC   0x0400 /* periodic timer mode */

Definition at line 46 of file scoreregs.h.

#define TMR_OE_DISABLE   0x0004

Definition at line 24 of file scoreregs.h.

#define TMR_OE_ENABLE   0x0000

Definition at line 25 of file scoreregs.h.

#define TMR_OM_PILSE   0x0040

Definition at line 37 of file scoreregs.h.

#define TMR_OM_TOGGLE   0x0000

Definition at line 36 of file scoreregs.h.

#define TMR_UD_DOWN   0x0000

Definition at line 28 of file scoreregs.h.

#define TMR_UD_UP   0x0010

Definition at line 29 of file scoreregs.h.

#define TMR_UDS_EXTUD   0x0020

Definition at line 33 of file scoreregs.h.

#define TMR_UDS_UD   0x0000

Definition at line 32 of file scoreregs.h.