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Macros
sh2007.h File Reference

Go to the source code of this file.

Macros

#define CS5BCR   0xff802050
 
#define CS5WCR   0xff802058
 
#define CS5PCR   0xff802070
 
#define BUS_SZ8   1
 
#define BUS_SZ16   2
 
#define BUS_SZ32   3
 
#define PCMCIA_IODYN   1
 
#define PCMCIA_ATA   0
 
#define PCMCIA_IO8   2
 
#define PCMCIA_IO16   3
 
#define PCMCIA_COMM8   4
 
#define PCMCIA_COMM16   5
 
#define PCMCIA_ATTR8   6
 
#define PCMCIA_ATTR16   7
 
#define TYPE_SRAM   0
 
#define TYPE_PCMCIA   4
 
#define IWW5   0
 
#define IWW6   3
 
#define IWRWD5   2
 
#define IWRWD6   2
 
#define IWRWS5   2
 
#define IWRWS6   2
 
#define IWRRD5   2
 
#define IWRRD6   2
 
#define IWRRS5   0
 
#define IWRRS6   2
 
#define BST5   0
 
#define BST6   0
 
#define SZ5   BUS_SZ16
 
#define SZ6   BUS_SZ16
 
#define RDSPL5   0
 
#define RDSPL6   0
 
#define BW5   0
 
#define BW6   0
 
#define MPX5   0
 
#define MPX6   0
 
#define TYPE5   TYPE_PCMCIA
 
#define TYPE6   TYPE_PCMCIA
 
#define ADS5   0
 
#define ADS6   0
 
#define ADH5   0
 
#define ADH6   0
 
#define RDS5   0
 
#define RDS6   0
 
#define RDH5   0
 
#define RDH6   0
 
#define WTS5   0
 
#define WTS6   0
 
#define WTH5   0
 
#define WTH6   0
 
#define BSH5   0
 
#define BSH6   0
 
#define IW5   6 /* 60ns PIO mode 4 */
 
#define IW6   15 /* 250ns */
 
#define SAA5   PCMCIA_IODYN /* IDE area b4000000-b5ffffff */
 
#define SAB5   PCMCIA_IODYN /* CF area b6000000-b7ffffff */
 
#define PCWA5   0 /* additional wait A (0-3:0,15,30,50) */
 
#define PCWB5   0 /* additional wait B (0-3:0,15,30,50) */
 
#define PCIW5   12
 
#define TEDA5   2
 
#define TEDB5   4
 
#define TEHA5   2
 
#define TEHB5   3
 
#define CS5BCR_D
 
#define CS5WCR_D
 
#define CS5PCR_D
 
#define SMC0_BASE   0xb0800000 /* eth0 */
 
#define SMC1_BASE   0xb0900000 /* eth1 */
 
#define CF_BASE   0xb6100000 /* Compact Flash (I/O area) */
 
#define IDE_BASE   0xb4000000 /* IDE */
 
#define PC104_IO_BASE   0xb8000000
 
#define PC104_MEM_BASE   0xba000000
 
#define SMC_IO_SIZE   0x100
 
#define CF_OFFSET   0x1f0
 
#define IDE_OFFSET   0x170
 

Macro Definition Documentation

#define ADH5   0

Definition at line 61 of file sh2007.h.

#define ADH6   0

Definition at line 62 of file sh2007.h.

#define ADS5   0

Definition at line 58 of file sh2007.h.

#define ADS6   0

Definition at line 59 of file sh2007.h.

#define BSH5   0

Definition at line 76 of file sh2007.h.

#define BSH6   0

Definition at line 77 of file sh2007.h.

#define BST5   0

Definition at line 40 of file sh2007.h.

#define BST6   0

Definition at line 41 of file sh2007.h.

#define BUS_SZ16   2

Definition at line 9 of file sh2007.h.

#define BUS_SZ32   3

Definition at line 10 of file sh2007.h.

#define BUS_SZ8   1

Definition at line 8 of file sh2007.h.

#define BW5   0

Definition at line 49 of file sh2007.h.

#define BW6   0

Definition at line 50 of file sh2007.h.

#define CF_BASE   0xb6100000 /* Compact Flash (I/O area) */

Definition at line 108 of file sh2007.h.

#define CF_OFFSET   0x1f0

Definition at line 114 of file sh2007.h.

#define CS5BCR   0xff802050

Definition at line 4 of file sh2007.h.

#define CS5BCR_D
Value:
((IWW5<<28)|(IWRWD5<<24)|(IWRWS5<<20)| \
(IWRRD5<<16)|(IWRRS5<<12)|(BST5<<10)| \
(SZ5<<8)|(RDSPL5<<7)|(BW5<<4)|(MPX5<<3)|TYPE5)

Definition at line 97 of file sh2007.h.

#define CS5PCR   0xff802070

Definition at line 6 of file sh2007.h.

#define CS5PCR_D
Value:
((SAA5<<28)|(SAB5<<24)|(PCWA5<<22)| \
(PCWB5<<20)|(PCIW5<<16)|(TEDA5<<12)| \
(TEDB5<<8)|(TEHA5<<4)|TEHB5)

Definition at line 102 of file sh2007.h.

#define CS5WCR   0xff802058

Definition at line 5 of file sh2007.h.

#define CS5WCR_D
Value:
((ADS5<<28)|(ADH5<<24)|(RDS5<<20)| \
(RDH5<<16)|(WTS5<<12)|(WTH5<<8)|(BSH5<<4)|IW5)

Definition at line 100 of file sh2007.h.

#define IDE_BASE   0xb4000000 /* IDE */

Definition at line 109 of file sh2007.h.

#define IDE_OFFSET   0x170

Definition at line 115 of file sh2007.h.

#define IW5   6 /* 60ns PIO mode 4 */

Definition at line 79 of file sh2007.h.

#define IW6   15 /* 250ns */

Definition at line 80 of file sh2007.h.

#define IWRRD5   2

Definition at line 34 of file sh2007.h.

#define IWRRD6   2

Definition at line 35 of file sh2007.h.

#define IWRRS5   0

Definition at line 37 of file sh2007.h.

#define IWRRS6   2

Definition at line 38 of file sh2007.h.

#define IWRWD5   2

Definition at line 28 of file sh2007.h.

#define IWRWD6   2

Definition at line 29 of file sh2007.h.

#define IWRWS5   2

Definition at line 31 of file sh2007.h.

#define IWRWS6   2

Definition at line 32 of file sh2007.h.

#define IWW5   0

Definition at line 25 of file sh2007.h.

#define IWW6   3

Definition at line 26 of file sh2007.h.

#define MPX5   0

Definition at line 52 of file sh2007.h.

#define MPX6   0

Definition at line 53 of file sh2007.h.

#define PC104_IO_BASE   0xb8000000

Definition at line 110 of file sh2007.h.

#define PC104_MEM_BASE   0xba000000

Definition at line 111 of file sh2007.h.

#define PCIW5   12

Definition at line 87 of file sh2007.h.

#define PCMCIA_ATA   0

Definition at line 13 of file sh2007.h.

#define PCMCIA_ATTR16   7

Definition at line 19 of file sh2007.h.

#define PCMCIA_ATTR8   6

Definition at line 18 of file sh2007.h.

#define PCMCIA_COMM16   5

Definition at line 17 of file sh2007.h.

#define PCMCIA_COMM8   4

Definition at line 16 of file sh2007.h.

#define PCMCIA_IO16   3

Definition at line 15 of file sh2007.h.

#define PCMCIA_IO8   2

Definition at line 14 of file sh2007.h.

#define PCMCIA_IODYN   1

Definition at line 12 of file sh2007.h.

#define PCWA5   0 /* additional wait A (0-3:0,15,30,50) */

Definition at line 84 of file sh2007.h.

#define PCWB5   0 /* additional wait B (0-3:0,15,30,50) */

Definition at line 85 of file sh2007.h.

#define RDH5   0

Definition at line 67 of file sh2007.h.

#define RDH6   0

Definition at line 68 of file sh2007.h.

#define RDS5   0

Definition at line 64 of file sh2007.h.

#define RDS6   0

Definition at line 65 of file sh2007.h.

#define RDSPL5   0

Definition at line 46 of file sh2007.h.

#define RDSPL6   0

Definition at line 47 of file sh2007.h.

#define SAA5   PCMCIA_IODYN /* IDE area b4000000-b5ffffff */

Definition at line 82 of file sh2007.h.

#define SAB5   PCMCIA_IODYN /* CF area b6000000-b7ffffff */

Definition at line 83 of file sh2007.h.

#define SMC0_BASE   0xb0800000 /* eth0 */

Definition at line 106 of file sh2007.h.

#define SMC1_BASE   0xb0900000 /* eth1 */

Definition at line 107 of file sh2007.h.

#define SMC_IO_SIZE   0x100

Definition at line 112 of file sh2007.h.

#define SZ5   BUS_SZ16

Definition at line 43 of file sh2007.h.

#define SZ6   BUS_SZ16

Definition at line 44 of file sh2007.h.

#define TEDA5   2

Definition at line 89 of file sh2007.h.

#define TEDB5   4

Definition at line 91 of file sh2007.h.

#define TEHA5   2

Definition at line 93 of file sh2007.h.

#define TEHB5   3

Definition at line 95 of file sh2007.h.

#define TYPE5   TYPE_PCMCIA

Definition at line 55 of file sh2007.h.

#define TYPE6   TYPE_PCMCIA

Definition at line 56 of file sh2007.h.

#define TYPE_PCMCIA   4

Definition at line 22 of file sh2007.h.

#define TYPE_SRAM   0

Definition at line 21 of file sh2007.h.

#define WTH5   0

Definition at line 73 of file sh2007.h.

#define WTH6   0

Definition at line 74 of file sh2007.h.

#define WTS5   0

Definition at line 70 of file sh2007.h.

#define WTS6   0

Definition at line 71 of file sh2007.h.