|
Linux Kernel
3.7.1
|
Go to the source code of this file.
Macros | |
| #define | CS5BCR 0xff802050 |
| #define | CS5WCR 0xff802058 |
| #define | CS5PCR 0xff802070 |
| #define | BUS_SZ8 1 |
| #define | BUS_SZ16 2 |
| #define | BUS_SZ32 3 |
| #define | PCMCIA_IODYN 1 |
| #define | PCMCIA_ATA 0 |
| #define | PCMCIA_IO8 2 |
| #define | PCMCIA_IO16 3 |
| #define | PCMCIA_COMM8 4 |
| #define | PCMCIA_COMM16 5 |
| #define | PCMCIA_ATTR8 6 |
| #define | PCMCIA_ATTR16 7 |
| #define | TYPE_SRAM 0 |
| #define | TYPE_PCMCIA 4 |
| #define | IWW5 0 |
| #define | IWW6 3 |
| #define | IWRWD5 2 |
| #define | IWRWD6 2 |
| #define | IWRWS5 2 |
| #define | IWRWS6 2 |
| #define | IWRRD5 2 |
| #define | IWRRD6 2 |
| #define | IWRRS5 0 |
| #define | IWRRS6 2 |
| #define | BST5 0 |
| #define | BST6 0 |
| #define | SZ5 BUS_SZ16 |
| #define | SZ6 BUS_SZ16 |
| #define | RDSPL5 0 |
| #define | RDSPL6 0 |
| #define | BW5 0 |
| #define | BW6 0 |
| #define | MPX5 0 |
| #define | MPX6 0 |
| #define | TYPE5 TYPE_PCMCIA |
| #define | TYPE6 TYPE_PCMCIA |
| #define | ADS5 0 |
| #define | ADS6 0 |
| #define | ADH5 0 |
| #define | ADH6 0 |
| #define | RDS5 0 |
| #define | RDS6 0 |
| #define | RDH5 0 |
| #define | RDH6 0 |
| #define | WTS5 0 |
| #define | WTS6 0 |
| #define | WTH5 0 |
| #define | WTH6 0 |
| #define | BSH5 0 |
| #define | BSH6 0 |
| #define | IW5 6 /* 60ns PIO mode 4 */ |
| #define | IW6 15 /* 250ns */ |
| #define | SAA5 PCMCIA_IODYN /* IDE area b4000000-b5ffffff */ |
| #define | SAB5 PCMCIA_IODYN /* CF area b6000000-b7ffffff */ |
| #define | PCWA5 0 /* additional wait A (0-3:0,15,30,50) */ |
| #define | PCWB5 0 /* additional wait B (0-3:0,15,30,50) */ |
| #define | PCIW5 12 |
| #define | TEDA5 2 |
| #define | TEDB5 4 |
| #define | TEHA5 2 |
| #define | TEHB5 3 |
| #define | CS5BCR_D |
| #define | CS5WCR_D |
| #define | CS5PCR_D |
| #define | SMC0_BASE 0xb0800000 /* eth0 */ |
| #define | SMC1_BASE 0xb0900000 /* eth1 */ |
| #define | CF_BASE 0xb6100000 /* Compact Flash (I/O area) */ |
| #define | IDE_BASE 0xb4000000 /* IDE */ |
| #define | PC104_IO_BASE 0xb8000000 |
| #define | PC104_MEM_BASE 0xba000000 |
| #define | SMC_IO_SIZE 0x100 |
| #define | CF_OFFSET 0x1f0 |
| #define | IDE_OFFSET 0x170 |
| #define CS5BCR_D |
| #define CS5PCR_D |
| #define CS5WCR_D |
| #define SAA5 PCMCIA_IODYN /* IDE area b4000000-b5ffffff */ |
| #define SAB5 PCMCIA_IODYN /* CF area b6000000-b7ffffff */ |
| #define TYPE5 TYPE_PCMCIA |
| #define TYPE6 TYPE_PCMCIA |
1.8.2