cpu-features.h File Reference

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Macros
#define	CPU_HAS_FPU   0x0001 /* Hardware FPU support */
#define	CPU_HAS_P2_FLUSH_BUG   0x0002 /* Need to flush the cache in P2 area */
#define	CPU_HAS_MMU_PAGE_ASSOC   0x0004 /* SH3: TLB way selection bit support */
#define	CPU_HAS_DSP   0x0008 /* SH-DSP: DSP support */
#define	CPU_HAS_PERF_COUNTER   0x0010 /* Hardware performance counters */
#define	CPU_HAS_PTEA   0x0020 /* PTEA register */
#define	CPU_HAS_LLSC   0x0040 /* movli.l/movco.l */
#define	CPU_HAS_L2_CACHE   0x0080 /* Secondary cache / URAM */
#define	CPU_HAS_OP32   0x0100 /* 32-bit instruction support */
#define	CPU_HAS_PTEAEX   0x0200 /* PTE ASID Extension support */

Macro Definition Documentation

#define CPU_HAS_DSP   0x0008 /* SH-DSP: DSP support */

Definition at line 18 of file cpu-features.h.

#define CPU_HAS_FPU   0x0001 /* Hardware FPU support */

Definition at line 15 of file cpu-features.h.

#define CPU_HAS_L2_CACHE   0x0080 /* Secondary cache / URAM */

Definition at line 22 of file cpu-features.h.

#define CPU_HAS_LLSC   0x0040 /* movli.l/movco.l */

Definition at line 21 of file cpu-features.h.

#define CPU_HAS_MMU_PAGE_ASSOC   0x0004 /* SH3: TLB way selection bit support */

Definition at line 17 of file cpu-features.h.

#define CPU_HAS_OP32   0x0100 /* 32-bit instruction support */

Definition at line 23 of file cpu-features.h.

#define CPU_HAS_P2_FLUSH_BUG   0x0002 /* Need to flush the cache in P2 area */

Definition at line 16 of file cpu-features.h.

#define CPU_HAS_PERF_COUNTER   0x0010 /* Hardware performance counters */

Definition at line 19 of file cpu-features.h.

#define CPU_HAS_PTEA   0x0020 /* PTEA register */

Definition at line 20 of file cpu-features.h.

#define CPU_HAS_PTEAEX   0x0200 /* PTE ASID Extension support */

Definition at line 24 of file cpu-features.h.