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Data Structures | Macros
sh_mmcif.h File Reference
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/sh_dma.h>

Go to the source code of this file.

Data Structures

struct  sh_mmcif_plat_data
 

Macros

#define MMCIF_CE_CMD_SET   0x00000000
 
#define MMCIF_CE_ARG   0x00000008
 
#define MMCIF_CE_ARG_CMD12   0x0000000C
 
#define MMCIF_CE_CMD_CTRL   0x00000010
 
#define MMCIF_CE_BLOCK_SET   0x00000014
 
#define MMCIF_CE_CLK_CTRL   0x00000018
 
#define MMCIF_CE_BUF_ACC   0x0000001C
 
#define MMCIF_CE_RESP3   0x00000020
 
#define MMCIF_CE_RESP2   0x00000024
 
#define MMCIF_CE_RESP1   0x00000028
 
#define MMCIF_CE_RESP0   0x0000002C
 
#define MMCIF_CE_RESP_CMD12   0x00000030
 
#define MMCIF_CE_DATA   0x00000034
 
#define MMCIF_CE_INT   0x00000040
 
#define MMCIF_CE_INT_MASK   0x00000044
 
#define MMCIF_CE_HOST_STS1   0x00000048
 
#define MMCIF_CE_HOST_STS2   0x0000004C
 
#define MMCIF_CE_VERSION   0x0000007C
 
#define BUF_ACC_DMAWEN   (1 << 25)
 
#define BUF_ACC_DMAREN   (1 << 24)
 
#define BUF_ACC_BUSW_32   (0 << 17)
 
#define BUF_ACC_BUSW_16   (1 << 17)
 
#define BUF_ACC_ATYP   (1 << 16)
 
#define CLK_ENABLE   (1 << 24) /* 1: output mmc clock */
 
#define CLK_CLEAR   (0xf << 16)
 
#define CLK_SUP_PCLK   (0xf << 16)
 
#define CLKDIV_4
 
#define CLKDIV_256   (7 << 16) /* mmc clock frequency. (see above) */
 
#define SRSPTO_256   (2 << 12) /* resp timeout */
 
#define SRBSYTO_29   (0xf << 8) /* resp busy timeout */
 
#define SRWDTO_29   (0xf << 4) /* read/write timeout */
 
#define SCCSTO_29   (0xf << 0) /* ccs timeout */
 
#define SOFT_RST_ON   (1 << 31)
 
#define SOFT_RST_OFF   0
 
#define SH_MMCIF_BBS   512 /* boot block size */
 

Macro Definition Documentation

#define BUF_ACC_ATYP   (1 << 16)

Definition at line 72 of file sh_mmcif.h.

#define BUF_ACC_BUSW_16   (1 << 17)

Definition at line 71 of file sh_mmcif.h.

#define BUF_ACC_BUSW_32   (0 << 17)

Definition at line 70 of file sh_mmcif.h.

#define BUF_ACC_DMAREN   (1 << 24)

Definition at line 69 of file sh_mmcif.h.

#define BUF_ACC_DMAWEN   (1 << 25)

Definition at line 68 of file sh_mmcif.h.

#define CLK_CLEAR   (0xf << 16)

Definition at line 76 of file sh_mmcif.h.

#define CLK_ENABLE   (1 << 24) /* 1: output mmc clock */

Definition at line 75 of file sh_mmcif.h.

#define CLK_SUP_PCLK   (0xf << 16)

Definition at line 77 of file sh_mmcif.h.

#define CLKDIV_256   (7 << 16) /* mmc clock frequency. (see above) */

Definition at line 79 of file sh_mmcif.h.

#define CLKDIV_4
Value:
(1 << 16) /* mmc clock frequency.
* n: bus clock/(2^(n+1)) */

Definition at line 78 of file sh_mmcif.h.

#define MMCIF_CE_ARG   0x00000008

Definition at line 49 of file sh_mmcif.h.

#define MMCIF_CE_ARG_CMD12   0x0000000C

Definition at line 50 of file sh_mmcif.h.

#define MMCIF_CE_BLOCK_SET   0x00000014

Definition at line 52 of file sh_mmcif.h.

#define MMCIF_CE_BUF_ACC   0x0000001C

Definition at line 54 of file sh_mmcif.h.

#define MMCIF_CE_CLK_CTRL   0x00000018

Definition at line 53 of file sh_mmcif.h.

#define MMCIF_CE_CMD_CTRL   0x00000010

Definition at line 51 of file sh_mmcif.h.

#define MMCIF_CE_CMD_SET   0x00000000

Definition at line 48 of file sh_mmcif.h.

#define MMCIF_CE_DATA   0x00000034

Definition at line 60 of file sh_mmcif.h.

#define MMCIF_CE_HOST_STS1   0x00000048

Definition at line 63 of file sh_mmcif.h.

#define MMCIF_CE_HOST_STS2   0x0000004C

Definition at line 64 of file sh_mmcif.h.

#define MMCIF_CE_INT   0x00000040

Definition at line 61 of file sh_mmcif.h.

#define MMCIF_CE_INT_MASK   0x00000044

Definition at line 62 of file sh_mmcif.h.

#define MMCIF_CE_RESP0   0x0000002C

Definition at line 58 of file sh_mmcif.h.

#define MMCIF_CE_RESP1   0x00000028

Definition at line 57 of file sh_mmcif.h.

#define MMCIF_CE_RESP2   0x00000024

Definition at line 56 of file sh_mmcif.h.

#define MMCIF_CE_RESP3   0x00000020

Definition at line 55 of file sh_mmcif.h.

#define MMCIF_CE_RESP_CMD12   0x00000030

Definition at line 59 of file sh_mmcif.h.

#define MMCIF_CE_VERSION   0x0000007C

Definition at line 65 of file sh_mmcif.h.

#define SCCSTO_29   (0xf << 0) /* ccs timeout */

Definition at line 83 of file sh_mmcif.h.

#define SH_MMCIF_BBS   512 /* boot block size */

Definition at line 99 of file sh_mmcif.h.

#define SOFT_RST_OFF   0

Definition at line 87 of file sh_mmcif.h.

#define SOFT_RST_ON   (1 << 31)

Definition at line 86 of file sh_mmcif.h.

#define SRBSYTO_29   (0xf << 8) /* resp busy timeout */

Definition at line 81 of file sh_mmcif.h.

#define SRSPTO_256   (2 << 12) /* resp timeout */

Definition at line 80 of file sh_mmcif.h.

#define SRWDTO_29   (0xf << 4) /* read/write timeout */

Definition at line 82 of file sh_mmcif.h.