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smu.h
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1 #ifndef _SMU_H
2 #define _SMU_H
3 
4 /*
5  * Definitions for talking to the SMU chip in newer G5 PowerMacs
6  */
7 #ifdef __KERNEL__
8 #include <linux/list.h>
9 #endif
10 #include <linux/types.h>
11 
12 /*
13  * Known SMU commands
14  *
15  * Most of what is below comes from looking at the Open Firmware driver,
16  * though this is still incomplete and could use better documentation here
17  * or there...
18  */
19 
20 
21 /*
22  * Partition info commands
23  *
24  * These commands are used to retrieve the sdb-partition-XX datas from
25  * the SMU. The length is always 2. First byte is the subcommand code
26  * and second byte is the partition ID.
27  *
28  * The reply is 6 bytes:
29  *
30  * - 0..1 : partition address
31  * - 2 : a byte containing the partition ID
32  * - 3 : length (maybe other bits are rest of header ?)
33  *
34  * The data must then be obtained with calls to another command:
35  * SMU_CMD_MISC_ee_GET_DATABLOCK_REC (described below).
36  */
37 #define SMU_CMD_PARTITION_COMMAND 0x3e
38 #define SMU_CMD_PARTITION_LATEST 0x01
39 #define SMU_CMD_PARTITION_BASE 0x02
40 #define SMU_CMD_PARTITION_UPDATE 0x03
41 
42 
43 /*
44  * Fan control
45  *
46  * This is a "mux" for fan control commands. The command seem to
47  * act differently based on the number of arguments. With 1 byte
48  * of argument, this seem to be queries for fans status, setpoint,
49  * etc..., while with 0xe arguments, we will set the fans speeds.
50  *
51  * Queries (1 byte arg):
52  * ---------------------
53  *
54  * arg=0x01: read RPM fans status
55  * arg=0x02: read RPM fans setpoint
56  * arg=0x11: read PWM fans status
57  * arg=0x12: read PWM fans setpoint
58  *
59  * the "status" queries return the current speed while the "setpoint" ones
60  * return the programmed/target speed. It _seems_ that the result is a bit
61  * mask in the first byte of active/available fans, followed by 6 words (16
62  * bits) containing the requested speed.
63  *
64  * Setpoint (14 bytes arg):
65  * ------------------------
66  *
67  * first arg byte is 0 for RPM fans and 0x10 for PWM. Second arg byte is the
68  * mask of fans affected by the command. Followed by 6 words containing the
69  * setpoint value for selected fans in the mask (or 0 if mask value is 0)
70  */
71 #define SMU_CMD_FAN_COMMAND 0x4a
72 
73 
74 /*
75  * Battery access
76  *
77  * Same command number as the PMU, could it be same syntax ?
78  */
79 #define SMU_CMD_BATTERY_COMMAND 0x6f
80 #define SMU_CMD_GET_BATTERY_INFO 0x00
81 
82 /*
83  * Real time clock control
84  *
85  * This is a "mux", first data byte contains the "sub" command.
86  * The "RTC" part of the SMU controls the date, time, powerup
87  * timer, but also a PRAM
88  *
89  * Dates are in BCD format on 7 bytes:
90  * [sec] [min] [hour] [weekday] [month day] [month] [year]
91  * with month being 1 based and year minus 100
92  */
93 #define SMU_CMD_RTC_COMMAND 0x8e
94 #define SMU_CMD_RTC_SET_PWRUP_TIMER 0x00 /* i: 7 bytes date */
95 #define SMU_CMD_RTC_GET_PWRUP_TIMER 0x01 /* o: 7 bytes date */
96 #define SMU_CMD_RTC_STOP_PWRUP_TIMER 0x02
97 #define SMU_CMD_RTC_SET_PRAM_BYTE_ACC 0x20 /* i: 1 byte (address?) */
98 #define SMU_CMD_RTC_SET_PRAM_AUTOINC 0x21 /* i: 1 byte (data?) */
99 #define SMU_CMD_RTC_SET_PRAM_LO_BYTES 0x22 /* i: 10 bytes */
100 #define SMU_CMD_RTC_SET_PRAM_HI_BYTES 0x23 /* i: 10 bytes */
101 #define SMU_CMD_RTC_GET_PRAM_BYTE 0x28 /* i: 1 bytes (address?) */
102 #define SMU_CMD_RTC_GET_PRAM_LO_BYTES 0x29 /* o: 10 bytes */
103 #define SMU_CMD_RTC_GET_PRAM_HI_BYTES 0x2a /* o: 10 bytes */
104 #define SMU_CMD_RTC_SET_DATETIME 0x80 /* i: 7 bytes date */
105 #define SMU_CMD_RTC_GET_DATETIME 0x81 /* o: 7 bytes date */
106 
107  /*
108  * i2c commands
109  *
110  * To issue an i2c command, first is to send a parameter block to the
111  * the SMU. This is a command of type 0x9a with 9 bytes of header
112  * eventually followed by data for a write:
113  *
114  * 0: bus number (from device-tree usually, SMU has lots of busses !)
115  * 1: transfer type/format (see below)
116  * 2: device address. For combined and combined4 type transfers, this
117  * is the "write" version of the address (bit 0x01 cleared)
118  * 3: subaddress length (0..3)
119  * 4: subaddress byte 0 (or only byte for subaddress length 1)
120  * 5: subaddress byte 1
121  * 6: subaddress byte 2
122  * 7: combined address (device address for combined mode data phase)
123  * 8: data length
124  *
125  * The transfer types are the same good old Apple ones it seems,
126  * that is:
127  * - 0x00: Simple transfer
128  * - 0x01: Subaddress transfer (addr write + data tx, no restart)
129  * - 0x02: Combined transfer (addr write + restart + data tx)
130  *
131  * This is then followed by actual data for a write.
132  *
133  * At this point, the OF driver seems to have a limitation on transfer
134  * sizes of 0xd bytes on reads and 0x5 bytes on writes. I do not know
135  * wether this is just an OF limit due to some temporary buffer size
136  * or if this is an SMU imposed limit. This driver has the same limitation
137  * for now as I use a 0x10 bytes temporary buffer as well
138  *
139  * Once that is completed, a response is expected from the SMU. This is
140  * obtained via a command of type 0x9a with a length of 1 byte containing
141  * 0 as the data byte. OF also fills the rest of the data buffer with 0xff's
142  * though I can't tell yet if this is actually necessary. Once this command
143  * is complete, at this point, all I can tell is what OF does. OF tests
144  * byte 0 of the reply:
145  * - on read, 0xfe or 0xfc : bus is busy, wait (see below) or nak ?
146  * - on read, 0x00 or 0x01 : reply is in buffer (after the byte 0)
147  * - on write, < 0 -> failure (immediate exit)
148  * - else, OF just exists (without error, weird)
149  *
150  * So on read, there is this wait-for-busy thing when getting a 0xfc or
151  * 0xfe result. OF does a loop of up to 64 retries, waiting 20ms and
152  * doing the above again until either the retries expire or the result
153  * is no longer 0xfe or 0xfc
154  *
155  * The Darwin I2C driver is less subtle though. On any non-success status
156  * from the response command, it waits 5ms and tries again up to 20 times,
157  * it doesn't differenciate between fatal errors or "busy" status.
158  *
159  * This driver provides an asynchronous paramblock based i2c command
160  * interface to be used either directly by low level code or by a higher
161  * level driver interfacing to the linux i2c layer. The current
162  * implementation of this relies on working timers & timer interrupts
163  * though, so be careful of calling context for now. This may be "fixed"
164  * in the future by adding a polling facility.
165  */
166 #define SMU_CMD_I2C_COMMAND 0x9a
167  /* transfer types */
168 #define SMU_I2C_TRANSFER_SIMPLE 0x00
169 #define SMU_I2C_TRANSFER_STDSUB 0x01
170 #define SMU_I2C_TRANSFER_COMBINED 0x02
171 
172 /*
173  * Power supply control
174  *
175  * The "sub" command is an ASCII string in the data, the
176  * data length is that of the string.
177  *
178  * The VSLEW command can be used to get or set the voltage slewing.
179  * - length 5 (only "VSLEW") : it returns "DONE" and 3 bytes of
180  * reply at data offset 6, 7 and 8.
181  * - length 8 ("VSLEWxyz") has 3 additional bytes appended, and is
182  * used to set the voltage slewing point. The SMU replies with "DONE"
183  * I yet have to figure out their exact meaning of those 3 bytes in
184  * both cases. They seem to be:
185  * x = processor mask
186  * y = op. point index
187  * z = processor freq. step index
188  * I haven't yet decyphered result codes
189  *
190  */
191 #define SMU_CMD_POWER_COMMAND 0xaa
192 #define SMU_CMD_POWER_RESTART "RESTART"
193 #define SMU_CMD_POWER_SHUTDOWN "SHUTDOWN"
194 #define SMU_CMD_POWER_VOLTAGE_SLEW "VSLEW"
195 
196 /*
197  * Read ADC sensors
198  *
199  * This command takes one byte of parameter: the sensor ID (or "reg"
200  * value in the device-tree) and returns a 16 bits value
201  */
202 #define SMU_CMD_READ_ADC 0xd8
203 
204 
205 /* Misc commands
206  *
207  * This command seem to be a grab bag of various things
208  *
209  * Parameters:
210  * 1: subcommand
211  */
212 #define SMU_CMD_MISC_df_COMMAND 0xdf
213 
214 /*
215  * Sets "system ready" status
216  *
217  * I did not yet understand how it exactly works or what it does.
218  *
219  * Guessing from OF code, 0x02 activates the display backlight. Apple uses/used
220  * the same codebase for all OF versions. On PowerBooks, this command would
221  * enable the backlight. For the G5s, it only activates the front LED. However,
222  * don't take this for granted.
223  *
224  * Parameters:
225  * 2: status [0x00, 0x01 or 0x02]
226  */
227 #define SMU_CMD_MISC_df_SET_DISPLAY_LIT 0x02
228 
229 /*
230  * Sets mode of power switch.
231  *
232  * What this actually does is not yet known. Maybe it enables some interrupt.
233  *
234  * Parameters:
235  * 2: enable power switch? [0x00 or 0x01]
236  * 3 (optional): enable nmi? [0x00 or 0x01]
237  *
238  * Returns:
239  * If parameter 2 is 0x00 and parameter 3 is not specified, returns wether
240  * NMI is enabled. Otherwise unknown.
241  */
242 #define SMU_CMD_MISC_df_NMI_OPTION 0x04
243 
244 /* Sets LED dimm offset.
245  *
246  * The front LED dimms itself during sleep. Its brightness (or, well, the PWM
247  * frequency) depends on current time. Therefore, the SMU needs to know the
248  * timezone.
249  *
250  * Parameters:
251  * 2-8: unknown (BCD coding)
252  */
253 #define SMU_CMD_MISC_df_DIMM_OFFSET 0x99
254 
255 
256 /*
257  * Version info commands
258  *
259  * Parameters:
260  * 1 (optional): Specifies version part to retrieve
261  *
262  * Returns:
263  * Version value
264  */
265 #define SMU_CMD_VERSION_COMMAND 0xea
266 #define SMU_VERSION_RUNNING 0x00
267 #define SMU_VERSION_BASE 0x01
268 #define SMU_VERSION_UPDATE 0x02
269 
270 
271 /*
272  * Switches
273  *
274  * These are switches whose status seems to be known to the SMU.
275  *
276  * Parameters:
277  * none
278  *
279  * Result:
280  * Switch bits (ORed, see below)
281  */
282 #define SMU_CMD_SWITCHES 0xdc
283 
284 /* Switches bits */
285 #define SMU_SWITCH_CASE_CLOSED 0x01
286 #define SMU_SWITCH_AC_POWER 0x04
287 #define SMU_SWITCH_POWER_SWITCH 0x08
288 
289 
290 /*
291  * Misc commands
292  *
293  * This command seem to be a grab bag of various things
294  *
295  * SMU_CMD_MISC_ee_GET_DATABLOCK_REC is used, among others, to
296  * transfer blocks of data from the SMU. So far, I've decrypted it's
297  * usage to retrieve partition data. In order to do that, you have to
298  * break your transfer in "chunks" since that command cannot transfer
299  * more than a chunk at a time. The chunk size used by OF is 0xe bytes,
300  * but it seems that the darwin driver will let you do 0x1e bytes if
301  * your "PMU" version is >= 0x30. You can get the "PMU" version apparently
302  * either in the last 16 bits of property "smu-version-pmu" or as the 16
303  * bytes at offset 1 of "smu-version-info"
304  *
305  * For each chunk, the command takes 7 bytes of arguments:
306  * byte 0: subcommand code (0x02)
307  * byte 1: 0x04 (always, I don't know what it means, maybe the address
308  * space to use or some other nicety. It's hard coded in OF)
309  * byte 2..5: SMU address of the chunk (big endian 32 bits)
310  * byte 6: size to transfer (up to max chunk size)
311  *
312  * The data is returned directly
313  */
314 #define SMU_CMD_MISC_ee_COMMAND 0xee
315 #define SMU_CMD_MISC_ee_GET_DATABLOCK_REC 0x02
316 
317 /* Retrieves currently used watts.
318  *
319  * Parameters:
320  * 1: 0x03 (Meaning unknown)
321  */
322 #define SMU_CMD_MISC_ee_GET_WATTS 0x03
323 
324 #define SMU_CMD_MISC_ee_LEDS_CTRL 0x04 /* i: 00 (00,01) [00] */
325 #define SMU_CMD_MISC_ee_GET_DATA 0x05 /* i: 00 , o: ?? */
326 
327 
328 /*
329  * Power related commands
330  *
331  * Parameters:
332  * 1: subcommand
333  */
334 #define SMU_CMD_POWER_EVENTS_COMMAND 0x8f
335 
336 /* SMU_POWER_EVENTS subcommands */
337 enum {
344 
345  /*
346  * Get last shutdown cause
347  *
348  * Returns:
349  * 1 byte (signed char): Last shutdown cause. Exact meaning unknown.
350  */
352 
353  /*
354  * Sets or gets server ID. Meaning or use is unknown.
355  *
356  * Parameters:
357  * 2 (optional): Set server ID (1 byte)
358  *
359  * Returns:
360  * 1 byte (server ID?)
361  */
363 };
364 
365 /* Power events wakeup bits */
366 enum {
367  SMU_PWR_WAKEUP_KEY = 0x01, /* Wake on key press */
368  SMU_PWR_WAKEUP_AC_INSERT = 0x02, /* Wake on AC adapter plug */
372 };
373 
374 
375 /*
376  * - Kernel side interface -
377  */
378 
379 #ifdef __KERNEL__
380 
381 /*
382  * Asynchronous SMU commands
383  *
384  * Fill up this structure and submit it via smu_queue_command(),
385  * and get notified by the optional done() callback, or because
386  * status becomes != 1
387  */
388 
389 struct smu_cmd;
390 
391 struct smu_cmd
392 {
393  /* public */
394  u8 cmd; /* command */
395  int data_len; /* data len */
396  int reply_len; /* reply len */
397  void *data_buf; /* data buffer */
398  void *reply_buf; /* reply buffer */
399  int status; /* command status */
400  void (*done)(struct smu_cmd *cmd, void *misc);
401  void *misc;
402 
403  /* private */
404  struct list_head link;
405 };
406 
407 /*
408  * Queues an SMU command, all fields have to be initialized
409  */
410 extern int smu_queue_cmd(struct smu_cmd *cmd);
411 
412 /*
413  * Simple command wrapper. This structure embeds a small buffer
414  * to ease sending simple SMU commands from the stack
415  */
416 struct smu_simple_cmd
417 {
418  struct smu_cmd cmd;
419  u8 buffer[16];
420 };
421 
422 /*
423  * Queues a simple command. All fields will be initialized by that
424  * function
425  */
426 extern int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
427  unsigned int data_len,
428  void (*done)(struct smu_cmd *cmd, void *misc),
429  void *misc,
430  ...);
431 
432 /*
433  * Completion helper. Pass it to smu_queue_simple or as 'done'
434  * member to smu_queue_cmd, it will call complete() on the struct
435  * completion passed in the "misc" argument
436  */
437 extern void smu_done_complete(struct smu_cmd *cmd, void *misc);
438 
439 /*
440  * Synchronous helpers. Will spin-wait for completion of a command
441  */
442 extern void smu_spinwait_cmd(struct smu_cmd *cmd);
443 
444 static inline void smu_spinwait_simple(struct smu_simple_cmd *scmd)
445 {
446  smu_spinwait_cmd(&scmd->cmd);
447 }
448 
449 /*
450  * Poll routine to call if blocked with irqs off
451  */
452 extern void smu_poll(void);
453 
454 
455 /*
456  * Init routine, presence check....
457  */
458 extern int smu_init(void);
459 extern int smu_present(void);
460 struct platform_device;
461 extern struct platform_device *smu_get_ofdev(void);
462 
463 
464 /*
465  * Common command wrappers
466  */
467 extern void smu_shutdown(void);
468 extern void smu_restart(void);
469 struct rtc_time;
470 extern int smu_get_rtc_time(struct rtc_time *time, int spinwait);
471 extern int smu_set_rtc_time(struct rtc_time *time, int spinwait);
472 
473 /*
474  * SMU command buffer absolute address, exported by pmac_setup,
475  * this is allocated very early during boot.
476  */
477 extern unsigned long smu_cmdbuf_abs;
478 
479 
480 /*
481  * Kenrel asynchronous i2c interface
482  */
483 
484 #define SMU_I2C_READ_MAX 0x1d
485 #define SMU_I2C_WRITE_MAX 0x15
486 
487 /* SMU i2c header, exactly matches i2c header on wire */
488 struct smu_i2c_param
489 {
490  u8 bus; /* SMU bus ID (from device tree) */
491  u8 type; /* i2c transfer type */
492  u8 devaddr; /* device address (includes direction) */
493  u8 sublen; /* subaddress length */
494  u8 subaddr[3]; /* subaddress */
495  u8 caddr; /* combined address, filled by SMU driver */
496  u8 datalen; /* length of transfer */
497  u8 data[SMU_I2C_READ_MAX]; /* data */
498 };
499 
500 struct smu_i2c_cmd
501 {
502  /* public */
503  struct smu_i2c_param info;
504  void (*done)(struct smu_i2c_cmd *cmd, void *misc);
505  void *misc;
506  int status; /* 1 = pending, 0 = ok, <0 = fail */
507 
508  /* private */
509  struct smu_cmd scmd;
510  int read;
511  int stage;
512  int retries;
513  u8 pdata[32];
514  struct list_head link;
515 };
516 
517 /*
518  * Call this to queue an i2c command to the SMU. You must fill info,
519  * including info.data for a write, done and misc.
520  * For now, no polling interface is provided so you have to use completion
521  * callback.
522  */
523 extern int smu_queue_i2c(struct smu_i2c_cmd *cmd);
524 
525 
526 #endif /* __KERNEL__ */
527 
528 
529 /*
530  * - SMU "sdb" partitions informations -
531  */
532 
533 
534 /*
535  * Partition header format
536  */
542 };
543 
544 
545  /*
546  * demangle 16 and 32 bits integer in some SMU partitions
547  * (currently, afaik, this concerns only the FVT partition
548  * (0x12)
549  */
550 #define SMU_U16_MIX(x) le16_to_cpu(x)
551 #define SMU_U32_MIX(x) ((((x) & 0xff00ff00u) >> 8)|(((x) & 0x00ff00ffu) << 8))
552 
553 
554 /* This is the definition of the SMU sdb-partition-0x12 table (called
555  * CPU F/V/T operating points in Darwin). The definition for all those
556  * SMU tables should be moved to some separate file
557  */
558 #define SMU_SDB_FVT_ID 0x12
559 
560 struct smu_sdbp_fvt {
561  __u32 sysclk; /* Base SysClk frequency in Hz for
562  * this operating point. Value need to
563  * be unmixed with SMU_U32_MIX()
564  */
566  __u8 maxtemp; /* Max temp. supported by this
567  * operating point
568  */
569 
570  __u16 volts[3]; /* CPU core voltage for the 3
571  * PowerTune modes, a mode with
572  * 0V = not supported. Value need
573  * to be unmixed with SMU_U16_MIX()
574  */
575 };
576 
577 /* This partition contains voltage & current sensor calibration
578  * informations
579  */
580 #define SMU_SDB_CPUVCP_ID 0x21
581 
583  __u16 volt_scale; /* u4.12 fixed point */
584  __s16 volt_offset; /* s4.12 fixed point */
585  __u16 curr_scale; /* u4.12 fixed point */
586  __s16 curr_offset; /* s4.12 fixed point */
587  __s32 power_quads[3]; /* s4.28 fixed point */
588 };
589 
590 /* This partition contains CPU thermal diode calibration
591  */
592 #define SMU_SDB_CPUDIODE_ID 0x18
593 
595  __u16 m_value; /* u1.15 fixed point */
596  __s16 b_value; /* s10.6 fixed point */
597 
598 };
599 
600 /* This partition contains Slots power calibration
601  */
602 #define SMU_SDB_SLOTSPOW_ID 0x78
603 
605  __u16 pow_scale; /* u4.12 fixed point */
606  __s16 pow_offset; /* s4.12 fixed point */
607 };
608 
609 /* This partition contains machine specific version information about
610  * the sensor/control layout
611  */
612 #define SMU_SDB_SENSORTREE_ID 0x25
613 
617 };
618 
619 /* This partition contains CPU thermal control PID informations. So far
620  * only single CPU machines have been seen with an SMU, so we assume this
621  * carries only informations for those
622  */
623 #define SMU_SDB_CPUPIDDATA_ID 0x17
624 
633 };
634 
635 
636 /* Other partitions without known structures */
637 #define SMU_SDB_DEBUG_SWITCHES_ID 0x05
638 
639 #ifdef __KERNEL__
640 /*
641  * This returns the pointer to an SMU "sdb" partition data or NULL
642  * if not found. The data format is described below
643  */
644 extern const struct smu_sdbp_header *smu_get_sdb_partition(int id,
645  unsigned int *size);
646 
647 /* Get "sdb" partition data from an SMU satellite */
648 extern struct smu_sdbp_header *smu_sat_get_sdb_partition(unsigned int sat_id,
649  int id, unsigned int *size);
650 
651 
652 #endif /* __KERNEL__ */
653 
654 
655 /*
656  * - Userland interface -
657  */
658 
659 /*
660  * A given instance of the device can be configured for 2 different
661  * things at the moment:
662  *
663  * - sending SMU commands (default at open() time)
664  * - receiving SMU events (not yet implemented)
665  *
666  * Commands are written with write() of a command block. They can be
667  * "driver" commands (for example to switch to event reception mode)
668  * or real SMU commands. They are made of a header followed by command
669  * data if any.
670  *
671  * For SMU commands (not for driver commands), you can then read() back
672  * a reply. The reader will be blocked or not depending on how the device
673  * file is opened. poll() isn't implemented yet. The reply will consist
674  * of a header as well, followed by the reply data if any. You should
675  * always provide a buffer large enough for the maximum reply data, I
676  * recommand one page.
677  *
678  * It is illegal to send SMU commands through a file descriptor configured
679  * for events reception
680  *
681  */
683 {
685 #define SMU_CMDTYPE_SMU 0 /* SMU command */
686 #define SMU_CMDTYPE_WANTS_EVENTS 1 /* switch fd to events mode */
687 #define SMU_CMDTYPE_GET_PARTITION 2 /* retrieve an sdb partition */
688 
689  __u8 cmd; /* SMU command byte */
690  __u8 pad[3]; /* padding */
691  __u32 data_len; /* Length of data following */
692 };
693 
695 {
696  __u32 status; /* Command status */
697  __u32 reply_len; /* Length of data follwing */
698 };
699 
700 #endif /* _SMU_H */