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sn9c102_pas202bcb.c
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1 /***************************************************************************
2  * Plug-in for PAS202BCB image sensor connected to the SN9C1xx PC Camera *
3  * Controllers *
4  * *
5  * Copyright (C) 2004 by Carlos Eduardo Medaglia Dyonisio *
7  * *
8  * Support for SN9C103, DAC Magnitude, exposure and green gain controls *
9  * added by Luca Risolia <[email protected]> *
10  * *
11  * This program is free software; you can redistribute it and/or modify *
12  * it under the terms of the GNU General Public License as published by *
13  * the Free Software Foundation; either version 2 of the License, or *
14  * (at your option) any later version. *
15  * *
16  * This program is distributed in the hope that it will be useful, *
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19  * GNU General Public License for more details. *
20  * *
21  * You should have received a copy of the GNU General Public License *
22  * along with this program; if not, write to the Free Software *
23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
24  ***************************************************************************/
25 
26 #include <linux/delay.h>
27 #include "sn9c102_sensor.h"
28 #include "sn9c102_devtable.h"
29 
30 
31 static int pas202bcb_init(struct sn9c102_device* cam)
32 {
33  int err = 0;
34 
35  switch (sn9c102_get_bridge(cam)) {
36  case BRIDGE_SN9C101:
37  case BRIDGE_SN9C102:
38  err = sn9c102_write_const_regs(cam, {0x00, 0x10}, {0x00, 0x11},
39  {0x00, 0x14}, {0x20, 0x17},
40  {0x30, 0x19}, {0x09, 0x18});
41  break;
42  case BRIDGE_SN9C103:
43  err = sn9c102_write_const_regs(cam, {0x00, 0x02}, {0x00, 0x03},
44  {0x1a, 0x04}, {0x20, 0x05},
45  {0x20, 0x06}, {0x20, 0x07},
46  {0x00, 0x10}, {0x00, 0x11},
47  {0x00, 0x14}, {0x20, 0x17},
48  {0x30, 0x19}, {0x09, 0x18},
49  {0x02, 0x1c}, {0x03, 0x1d},
50  {0x0f, 0x1e}, {0x0c, 0x1f},
51  {0x00, 0x20}, {0x10, 0x21},
52  {0x20, 0x22}, {0x30, 0x23},
53  {0x40, 0x24}, {0x50, 0x25},
54  {0x60, 0x26}, {0x70, 0x27},
55  {0x80, 0x28}, {0x90, 0x29},
56  {0xa0, 0x2a}, {0xb0, 0x2b},
57  {0xc0, 0x2c}, {0xd0, 0x2d},
58  {0xe0, 0x2e}, {0xf0, 0x2f},
59  {0xff, 0x30});
60  break;
61  default:
62  break;
63  }
64 
65  err += sn9c102_i2c_write(cam, 0x02, 0x14);
66  err += sn9c102_i2c_write(cam, 0x03, 0x40);
67  err += sn9c102_i2c_write(cam, 0x0d, 0x2c);
68  err += sn9c102_i2c_write(cam, 0x0e, 0x01);
69  err += sn9c102_i2c_write(cam, 0x0f, 0xa9);
70  err += sn9c102_i2c_write(cam, 0x10, 0x08);
71  err += sn9c102_i2c_write(cam, 0x13, 0x63);
72  err += sn9c102_i2c_write(cam, 0x15, 0x70);
73  err += sn9c102_i2c_write(cam, 0x11, 0x01);
74 
75  msleep(400);
76 
77  return err;
78 }
79 
80 
81 static int pas202bcb_get_ctrl(struct sn9c102_device* cam,
82  struct v4l2_control* ctrl)
83 {
84  switch (ctrl->id) {
85  case V4L2_CID_EXPOSURE:
86  {
87  int r1 = sn9c102_i2c_read(cam, 0x04),
88  r2 = sn9c102_i2c_read(cam, 0x05);
89  if (r1 < 0 || r2 < 0)
90  return -EIO;
91  ctrl->value = (r1 << 6) | (r2 & 0x3f);
92  }
93  return 0;
95  if ((ctrl->value = sn9c102_i2c_read(cam, 0x09)) < 0)
96  return -EIO;
97  ctrl->value &= 0x0f;
98  return 0;
100  if ((ctrl->value = sn9c102_i2c_read(cam, 0x07)) < 0)
101  return -EIO;
102  ctrl->value &= 0x0f;
103  return 0;
104  case V4L2_CID_GAIN:
105  if ((ctrl->value = sn9c102_i2c_read(cam, 0x10)) < 0)
106  return -EIO;
107  ctrl->value &= 0x1f;
108  return 0;
110  if ((ctrl->value = sn9c102_i2c_read(cam, 0x08)) < 0)
111  return -EIO;
112  ctrl->value &= 0x0f;
113  return 0;
115  if ((ctrl->value = sn9c102_i2c_read(cam, 0x0c)) < 0)
116  return -EIO;
117  return 0;
118  default:
119  return -EINVAL;
120  }
121 }
122 
123 
124 static int pas202bcb_set_pix_format(struct sn9c102_device* cam,
125  const struct v4l2_pix_format* pix)
126 {
127  int err = 0;
128 
129  if (pix->pixelformat == V4L2_PIX_FMT_SN9C10X)
130  err += sn9c102_write_reg(cam, 0x28, 0x17);
131  else
132  err += sn9c102_write_reg(cam, 0x20, 0x17);
133 
134  return err;
135 }
136 
137 
138 static int pas202bcb_set_ctrl(struct sn9c102_device* cam,
139  const struct v4l2_control* ctrl)
140 {
141  int err = 0;
142 
143  switch (ctrl->id) {
144  case V4L2_CID_EXPOSURE:
145  err += sn9c102_i2c_write(cam, 0x04, ctrl->value >> 6);
146  err += sn9c102_i2c_write(cam, 0x05, ctrl->value & 0x3f);
147  break;
149  err += sn9c102_i2c_write(cam, 0x09, ctrl->value);
150  break;
152  err += sn9c102_i2c_write(cam, 0x07, ctrl->value);
153  break;
154  case V4L2_CID_GAIN:
155  err += sn9c102_i2c_write(cam, 0x10, ctrl->value);
156  break;
158  err += sn9c102_i2c_write(cam, 0x08, ctrl->value);
159  break;
161  err += sn9c102_i2c_write(cam, 0x0c, ctrl->value);
162  break;
163  default:
164  return -EINVAL;
165  }
166  err += sn9c102_i2c_write(cam, 0x11, 0x01);
167 
168  return err ? -EIO : 0;
169 }
170 
171 
172 static int pas202bcb_set_crop(struct sn9c102_device* cam,
173  const struct v4l2_rect* rect)
174 {
175  struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
176  int err = 0;
177  u8 h_start = 0,
178  v_start = (u8)(rect->top - s->cropcap.bounds.top) + 3;
179 
180  switch (sn9c102_get_bridge(cam)) {
181  case BRIDGE_SN9C101:
182  case BRIDGE_SN9C102:
183  h_start = (u8)(rect->left - s->cropcap.bounds.left) + 4;
184  break;
185  case BRIDGE_SN9C103:
186  h_start = (u8)(rect->left - s->cropcap.bounds.left) + 3;
187  break;
188  default:
189  break;
190  }
191 
192  err += sn9c102_write_reg(cam, h_start, 0x12);
193  err += sn9c102_write_reg(cam, v_start, 0x13);
194 
195  return err;
196 }
197 
198 
199 static const struct sn9c102_sensor pas202bcb = {
200  .name = "PAS202BCB",
201  .maintainer = "Luca Risolia <[email protected]>",
202  .supported_bridge = BRIDGE_SN9C101 | BRIDGE_SN9C102 | BRIDGE_SN9C103,
203  .sysfs_ops = SN9C102_I2C_READ | SN9C102_I2C_WRITE,
204  .frequency = SN9C102_I2C_400KHZ | SN9C102_I2C_100KHZ,
205  .interface = SN9C102_I2C_2WIRES,
206  .i2c_slave_id = 0x40,
207  .init = &pas202bcb_init,
208  .qctrl = {
209  {
210  .id = V4L2_CID_EXPOSURE,
211  .type = V4L2_CTRL_TYPE_INTEGER,
212  .name = "exposure",
213  .minimum = 0x01e5,
214  .maximum = 0x3fff,
215  .step = 0x0001,
216  .default_value = 0x01e5,
217  .flags = 0,
218  },
219  {
220  .id = V4L2_CID_GAIN,
221  .type = V4L2_CTRL_TYPE_INTEGER,
222  .name = "global gain",
223  .minimum = 0x00,
224  .maximum = 0x1f,
225  .step = 0x01,
226  .default_value = 0x0b,
227  .flags = 0,
228  },
229  {
230  .id = V4L2_CID_RED_BALANCE,
231  .type = V4L2_CTRL_TYPE_INTEGER,
232  .name = "red balance",
233  .minimum = 0x00,
234  .maximum = 0x0f,
235  .step = 0x01,
236  .default_value = 0x00,
237  .flags = 0,
238  },
239  {
240  .id = V4L2_CID_BLUE_BALANCE,
241  .type = V4L2_CTRL_TYPE_INTEGER,
242  .name = "blue balance",
243  .minimum = 0x00,
244  .maximum = 0x0f,
245  .step = 0x01,
246  .default_value = 0x05,
247  .flags = 0,
248  },
249  {
251  .type = V4L2_CTRL_TYPE_INTEGER,
252  .name = "green balance",
253  .minimum = 0x00,
254  .maximum = 0x0f,
255  .step = 0x01,
256  .default_value = 0x00,
257  .flags = 0,
258  },
259  {
261  .type = V4L2_CTRL_TYPE_INTEGER,
262  .name = "DAC magnitude",
263  .minimum = 0x00,
264  .maximum = 0xff,
265  .step = 0x01,
266  .default_value = 0x04,
267  .flags = 0,
268  },
269  },
270  .get_ctrl = &pas202bcb_get_ctrl,
271  .set_ctrl = &pas202bcb_set_ctrl,
272  .cropcap = {
273  .bounds = {
274  .left = 0,
275  .top = 0,
276  .width = 640,
277  .height = 480,
278  },
279  .defrect = {
280  .left = 0,
281  .top = 0,
282  .width = 640,
283  .height = 480,
284  },
285  },
286  .set_crop = &pas202bcb_set_crop,
287  .pix_format = {
288  .width = 640,
289  .height = 480,
290  .pixelformat = V4L2_PIX_FMT_SBGGR8,
291  .priv = 8,
292  },
293  .set_pix_format = &pas202bcb_set_pix_format
294 };
295 
296 
298 {
299  int r0 = 0, r1 = 0, err = 0;
300  unsigned int pid = 0;
301 
302  /*
303  * Minimal initialization to enable the I2C communication
304  * NOTE: do NOT change the values!
305  */
306  switch (sn9c102_get_bridge(cam)) {
307  case BRIDGE_SN9C101:
308  case BRIDGE_SN9C102:
309  err = sn9c102_write_const_regs(cam,
310  {0x01, 0x01}, /* power down */
311  {0x40, 0x01}, /* power on */
312  {0x28, 0x17});/* clock 24 MHz */
313  break;
314  case BRIDGE_SN9C103: /* do _not_ change anything! */
315  err = sn9c102_write_const_regs(cam, {0x09, 0x01}, {0x44, 0x01},
316  {0x44, 0x02}, {0x29, 0x17});
317  break;
318  default:
319  break;
320  }
321 
322  r0 = sn9c102_i2c_try_read(cam, &pas202bcb, 0x00);
323  r1 = sn9c102_i2c_try_read(cam, &pas202bcb, 0x01);
324 
325  if (err || r0 < 0 || r1 < 0)
326  return -EIO;
327 
328  pid = (r0 << 4) | ((r1 & 0xf0) >> 4);
329  if (pid != 0x017)
330  return -ENODEV;
331 
332  sn9c102_attach_sensor(cam, &pas202bcb);
333 
334  return 0;
335 }