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| #define | CS4231_FLAG_EBUS 0x00000001 |
| |
| #define | CS4231_FLAG_PLAYBACK 0x00000002 |
| |
| #define | CS4231_FLAG_CAPTURE 0x00000004 |
| |
| #define | CS4231_MODE_NONE 0x0000 |
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| #define | CS4231_MODE_PLAY 0x0001 |
| |
| #define | CS4231_MODE_RECORD 0x0002 |
| |
| #define | CS4231_MODE_TIMER 0x0004 |
| |
| #define | CS4231_MODE_OPEN |
| |
| #define | CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2)) |
| |
| #define | APCCSR 0x10UL /* APC DMA CSR */ |
| |
| #define | APCCVA 0x20UL /* APC Capture DMA Address */ |
| |
| #define | APCCC 0x24UL /* APC Capture Count */ |
| |
| #define | APCCNVA 0x28UL /* APC Capture DMA Next Address */ |
| |
| #define | APCCNC 0x2cUL /* APC Capture Next Count */ |
| |
| #define | APCPVA 0x30UL /* APC Play DMA Address */ |
| |
| #define | APCPC 0x34UL /* APC Play Count */ |
| |
| #define | APCPNVA 0x38UL /* APC Play DMA Next Address */ |
| |
| #define | APCPNC 0x3cUL /* APC Play Next Count */ |
| |
| #define | APCVA 0x0UL /* APC DMA Address */ |
| |
| #define | APCC 0x4UL /* APC Count */ |
| |
| #define | APCNVA 0x8UL /* APC DMA Next Address */ |
| |
| #define | APCNC 0xcUL /* APC Next Count */ |
| |
| #define | APC_PLAY 0x30UL /* Play registers start at 0x30 */ |
| |
| #define | APC_RECORD 0x20UL /* Record registers start at 0x20 */ |
| |
| #define | APC_INT_PENDING 0x800000 /* Interrupt Pending */ |
| |
| #define | APC_PLAY_INT 0x400000 /* Playback interrupt */ |
| |
| #define | APC_CAPT_INT 0x200000 /* Capture interrupt */ |
| |
| #define | APC_GENL_INT 0x100000 /* General interrupt */ |
| |
| #define | APC_XINT_ENA 0x80000 /* General ext int. enable */ |
| |
| #define | APC_XINT_PLAY 0x40000 /* Playback ext intr */ |
| |
| #define | APC_XINT_CAPT 0x20000 /* Capture ext intr */ |
| |
| #define | APC_XINT_GENL 0x10000 /* Error ext intr */ |
| |
| #define | APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */ |
| |
| #define | APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */ |
| |
| #define | APC_XINT_PNVA 0x2000 /* Playback NVA dirty */ |
| |
| #define | APC_XINT_PENA 0x1000 /* play pipe empty Int enable */ |
| |
| #define | APC_XINT_COVF 0x800 /* Cap data dropped on floor */ |
| |
| #define | APC_XINT_CNVA 0x400 /* Capture NVA dirty */ |
| |
| #define | APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */ |
| |
| #define | APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */ |
| |
| #define | APC_PPAUSE 0x80 /* Pause the play DMA */ |
| |
| #define | APC_CPAUSE 0x40 /* Pause the capture DMA */ |
| |
| #define | APC_CDC_RESET 0x20 /* CODEC RESET */ |
| |
| #define | APC_PDMA_READY 0x08 /* Play DMA Go */ |
| |
| #define | APC_CDMA_READY 0x04 /* Capture DMA Go */ |
| |
| #define | APC_CHIP_RESET 0x01 /* Reset the chip */ |
| |
| #define | EBDMA_CSR 0x00UL /* Control/Status */ |
| |
| #define | EBDMA_ADDR 0x04UL /* DMA Address */ |
| |
| #define | EBDMA_COUNT 0x08UL /* DMA Count */ |
| |
| #define | CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) |
| |
| #define | CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) |
| |
1.8.2