_MPI2_CONFIG_PAGE_IO_UNIT_5 Struct Reference

#include <mpi2_cnfg.h>

Data Fields
MPI2_CONFIG_PAGE_HEADER	Header
U64	RaidAcceleratorBufferBaseAddress
U64	RaidAcceleratorBufferSize
U64	RaidAcceleratorControlBaseAddress
U8	RAControlSize
U8	NumDmaEngines
U8	RAMinControlSize
U8	RAMaxControlSize
U32	Reserved1
U32	Reserved2
U32	Reserved3
U32	DmaEngineCapabilities [MPI2_IOUNITPAGE5_DMAENGINE_ENTRIES]

Detailed Description

Definition at line 824 of file mpi2_cnfg.h.

Field Documentation

U32 DmaEngineCapabilities[MPI2_IOUNITPAGE5_DMAENGINE_ENTRIES]

Definition at line 837 of file mpi2_cnfg.h.

MPI2_CONFIG_PAGE_HEADER Header

Definition at line 825 of file mpi2_cnfg.h.

U8 NumDmaEngines

Definition at line 830 of file mpi2_cnfg.h.

U8 RAControlSize

Definition at line 829 of file mpi2_cnfg.h.

U64 RaidAcceleratorBufferBaseAddress

Definition at line 826 of file mpi2_cnfg.h.

U64 RaidAcceleratorBufferSize

Definition at line 827 of file mpi2_cnfg.h.

U64 RaidAcceleratorControlBaseAddress

Definition at line 828 of file mpi2_cnfg.h.

U8 RAMaxControlSize

Definition at line 832 of file mpi2_cnfg.h.

U8 RAMinControlSize

Definition at line 831 of file mpi2_cnfg.h.

U32 Reserved1

Definition at line 833 of file mpi2_cnfg.h.

U32 Reserved2

Definition at line 834 of file mpi2_cnfg.h.

U32 Reserved3

Definition at line 835 of file mpi2_cnfg.h.

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The documentation for this struct was generated from the following file:

• drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h