Linux Kernel
3.7.1
|
#include <ad7192.h>
Data Fields | |
u16 | vref_mv |
u8 | clock_source_sel |
u32 | ext_clk_Hz |
bool | refin2_en |
bool | rej60_en |
bool | sinc3_en |
bool | chop_en |
bool | buf_en |
bool | unipolar_en |
bool | burnout_curr_en |
struct ad7192_platform_data - platform/board specific information : the external reference voltage in millivolt : [0..3] 0 External 4.92 MHz clock connected from MCLK1 to MCLK2 1 External Clock applied to MCLK2 2 Internal 4.92 MHz Clock not available at the MCLK2 pin 3 Internal 4.92 MHz Clock available at the MCLK2 pin : the external clock frequency in Hz, if not set the driver uses the internal clock (16.776 MHz) : REFIN1/REFIN2 Reference Select (AD7190/2 only) : 50/60Hz notch filter enable : SINC3 filter enable (default SINC4) : CHOP mode enable : buffered input mode enable : unipolar mode enable : constant current generators on AIN(+|-) enable