drm_i915_gem_set_tiling Struct Reference

#include <i915_drm.h>

Data Fields
__u32	handle
__u32	tiling_mode
__u32	stride
__u32	swizzle_mode

Detailed Description

Definition at line 741 of file i915_drm.h.

Field Documentation

__u32 handle

Handle of the buffer to have its tiling state updated

Definition at line 743 of file i915_drm.h.

__u32 stride

Stride in bytes for the object when in I915_TILING_X or I915_TILING_Y.

Definition at line 763 of file i915_drm.h.

__u32 swizzle_mode

Returned address bit 6 swizzling required for CPU access through mmap mapping.

Definition at line 769 of file i915_drm.h.

__u32 tiling_mode

Tiling mode for the object (I915_TILING_NONE, I915_TILING_X, I915_TILING_Y).

This value is to be set on request, and will be updated by the kernel on successful return with the actual chosen tiling layout.

The tiling mode may be demoted to I915_TILING_NONE when the system has bit 6 swizzling that can't be managed correctly by GEM.

Buffer contents become undefined when changing tiling_mode.

Definition at line 757 of file i915_drm.h.

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The documentation for this struct was generated from the following file:

• include/uapi/drm/i915_drm.h