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Data Fields
qla25xx_fw_dump Struct Reference

#include <qla_dbg.h>

Data Fields

uint32_t host_status
 
uint32_t host_risc_reg [32]
 
uint32_t pcie_regs [4]
 
uint32_t host_reg [32]
 
uint32_t shadow_reg [11]
 
uint32_t risc_io_reg
 
uint16_t mailbox_reg [32]
 
uint32_t xseq_gp_reg [128]
 
uint32_t xseq_0_reg [48]
 
uint32_t xseq_1_reg [16]
 
uint32_t rseq_gp_reg [128]
 
uint32_t rseq_0_reg [32]
 
uint32_t rseq_1_reg [16]
 
uint32_t rseq_2_reg [16]
 
uint32_t aseq_gp_reg [128]
 
uint32_t aseq_0_reg [32]
 
uint32_t aseq_1_reg [16]
 
uint32_t aseq_2_reg [16]
 
uint32_t cmd_dma_reg [16]
 
uint32_t req0_dma_reg [15]
 
uint32_t resp0_dma_reg [15]
 
uint32_t req1_dma_reg [15]
 
uint32_t xmt0_dma_reg [32]
 
uint32_t xmt1_dma_reg [32]
 
uint32_t xmt2_dma_reg [32]
 
uint32_t xmt3_dma_reg [32]
 
uint32_t xmt4_dma_reg [32]
 
uint32_t xmt_data_dma_reg [16]
 
uint32_t rcvt0_data_dma_reg [32]
 
uint32_t rcvt1_data_dma_reg [32]
 
uint32_t risc_gp_reg [128]
 
uint32_t lmc_reg [128]
 
uint32_t fpm_hdw_reg [192]
 
uint32_t fb_hdw_reg [192]
 
uint32_t code_ram [0x2000]
 
uint32_t ext_mem [1]
 

Detailed Description

Definition at line 90 of file qla_dbg.h.

Field Documentation

uint32_t aseq_0_reg[32]

Definition at line 106 of file qla_dbg.h.

uint32_t aseq_1_reg[16]

Definition at line 107 of file qla_dbg.h.

uint32_t aseq_2_reg[16]

Definition at line 108 of file qla_dbg.h.

uint32_t aseq_gp_reg[128]

Definition at line 105 of file qla_dbg.h.

uint32_t cmd_dma_reg[16]

Definition at line 109 of file qla_dbg.h.

uint32_t code_ram[0x2000]

Definition at line 125 of file qla_dbg.h.

uint32_t ext_mem[1]

Definition at line 126 of file qla_dbg.h.

uint32_t fb_hdw_reg[192]

Definition at line 124 of file qla_dbg.h.

uint32_t fpm_hdw_reg[192]

Definition at line 123 of file qla_dbg.h.

uint32_t host_reg[32]

Definition at line 94 of file qla_dbg.h.

uint32_t host_risc_reg[32]

Definition at line 92 of file qla_dbg.h.

uint32_t host_status

Definition at line 91 of file qla_dbg.h.

uint32_t lmc_reg[128]

Definition at line 122 of file qla_dbg.h.

uint16_t mailbox_reg[32]

Definition at line 97 of file qla_dbg.h.

uint32_t pcie_regs[4]

Definition at line 93 of file qla_dbg.h.

uint32_t rcvt0_data_dma_reg[32]

Definition at line 119 of file qla_dbg.h.

uint32_t rcvt1_data_dma_reg[32]

Definition at line 120 of file qla_dbg.h.

uint32_t req0_dma_reg[15]

Definition at line 110 of file qla_dbg.h.

uint32_t req1_dma_reg[15]

Definition at line 112 of file qla_dbg.h.

uint32_t resp0_dma_reg[15]

Definition at line 111 of file qla_dbg.h.

uint32_t risc_gp_reg[128]

Definition at line 121 of file qla_dbg.h.

uint32_t risc_io_reg

Definition at line 96 of file qla_dbg.h.

uint32_t rseq_0_reg[32]

Definition at line 102 of file qla_dbg.h.

uint32_t rseq_1_reg[16]

Definition at line 103 of file qla_dbg.h.

uint32_t rseq_2_reg[16]

Definition at line 104 of file qla_dbg.h.

uint32_t rseq_gp_reg[128]

Definition at line 101 of file qla_dbg.h.

uint32_t shadow_reg[11]

Definition at line 95 of file qla_dbg.h.

uint32_t xmt0_dma_reg[32]

Definition at line 113 of file qla_dbg.h.

uint32_t xmt1_dma_reg[32]

Definition at line 114 of file qla_dbg.h.

uint32_t xmt2_dma_reg[32]

Definition at line 115 of file qla_dbg.h.

uint32_t xmt3_dma_reg[32]

Definition at line 116 of file qla_dbg.h.

uint32_t xmt4_dma_reg[32]

Definition at line 117 of file qla_dbg.h.

uint32_t xmt_data_dma_reg[16]

Definition at line 118 of file qla_dbg.h.

uint32_t xseq_0_reg[48]

Definition at line 99 of file qla_dbg.h.

uint32_t xseq_1_reg[16]

Definition at line 100 of file qla_dbg.h.

uint32_t xseq_gp_reg[128]

Definition at line 98 of file qla_dbg.h.


The documentation for this struct was generated from the following file: