vxge_hw_fifo_config Struct Reference

#include <vxge-config.h>

Data Fields
u32	enable
u32	fifo_blocks
u32	max_frags
u32	memblock_size
u32	alignment_size
u32	intr
u32	no_snoop_bits

Detailed Description

struct vxge_hw_fifo_config - Configuration of fifo. : Is this fifo to be commissioned : Numbers of TxDL (that is, lists of Tx descriptors) blocks per queue. : Max number of Tx buffers per TxDL (that is, per single transmit operation). No more than 256 transmit buffers can be specified. : Fifo descriptors are allocated in blocks of bytes. Setting to page size ensures by-page allocation of descriptors. 128K bytes is the maximum supported block size. : per Tx fragment DMA-able memory used to align transmit data (e.g., to align on a cache line). : Boolean. Use 1 to generate interrupt for each completed TxDL. Use 0 otherwise. : If non-zero, specifies no-snoop PCI operation, which generally improves latency of the host bridge operation (see PCI specification). For valid values please refer to struct vxge_hw_fifo_config{} in the driver sources. Configuration of all Titan fifos. Note: Valid (min, max) range for each attribute is specified in the body of the struct vxge_hw_fifo_config{} structure.

Definition at line 251 of file vxge-config.h.

Field Documentation

u32 alignment_size

Definition at line 269 of file vxge-config.h.

u32 enable

Definition at line 252 of file vxge-config.h.

u32 fifo_blocks

Definition at line 256 of file vxge-config.h.

u32 intr

Definition at line 274 of file vxge-config.h.

u32 max_frags

Definition at line 260 of file vxge-config.h.

u32 memblock_size

Definition at line 264 of file vxge-config.h.

u32 no_snoop_bits

Definition at line 279 of file vxge-config.h.

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The documentation for this struct was generated from the following file:

• drivers/net/ethernet/neterion/vxge/vxge-config.h