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stv06xx_hdcs.h
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1 /*
2  * Copyright (c) 2001 Jean-Fredric Clere, Nikolas Zimmermann, Georg Acher
3  * Mark Cave-Ayland, Carlo E Prelz, Dick Streefland
4  * Copyright (c) 2002, 2003 Tuukka Toivonen
5  * Copyright (c) 2008 Erik AndrĂ©n
6  * Copyright (c) 2008 Chia-I Wu
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21  *
22  * P/N 861037: Sensor HDCS1000 ASIC STV0600
23  * P/N 861050-0010: Sensor HDCS1000 ASIC STV0600
24  * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express
25  * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam
26  * P/N 861075-0040: Sensor HDCS1000 ASIC
27  * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB
28  * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web
29  */
30 
31 #ifndef STV06XX_HDCS_H_
32 #define STV06XX_HDCS_H_
33 
34 #include "stv06xx_sensor.h"
35 
36 #define HDCS_REG_CONFIG(sd) (IS_1020(sd) ? HDCS20_CONFIG : HDCS00_CONFIG)
37 #define HDCS_REG_CONTROL(sd) (IS_1020(sd) ? HDCS20_CONTROL : HDCS00_CONTROL)
38 
39 #define HDCS_1X00_DEF_WIDTH 360
40 #define HDCS_1X00_DEF_HEIGHT 296
41 
42 #define HDCS_1020_DEF_WIDTH 352
43 #define HDCS_1020_DEF_HEIGHT 292
44 
45 #define HDCS_1020_BOTTOM_Y_SKIP 4
46 
47 #define HDCS_CLK_FREQ_MHZ 25
48 
49 #define HDCS_ADC_START_SIG_DUR 3
50 
51 /* LSB bit of I2C or register address signifies write (0) or read (1) */
52 /* I2C Registers common for both HDCS-1000/1100 and HDCS-1020 */
53 /* Identifications Register */
54 #define HDCS_IDENT (0x00 << 1)
55 /* Status Register */
56 #define HDCS_STATUS (0x01 << 1)
57 /* Interrupt Mask Register */
58 #define HDCS_IMASK (0x02 << 1)
59 /* Pad Control Register */
60 #define HDCS_PCTRL (0x03 << 1)
61 /* Pad Drive Control Register */
62 #define HDCS_PDRV (0x04 << 1)
63 /* Interface Control Register */
64 #define HDCS_ICTRL (0x05 << 1)
65 /* Interface Timing Register */
66 #define HDCS_ITMG (0x06 << 1)
67 /* Baud Fraction Register */
68 #define HDCS_BFRAC (0x07 << 1)
69 /* Baud Rate Register */
70 #define HDCS_BRATE (0x08 << 1)
71 /* ADC Control Register */
72 #define HDCS_ADCCTRL (0x09 << 1)
73 /* First Window Row Register */
74 #define HDCS_FWROW (0x0a << 1)
75 /* First Window Column Register */
76 #define HDCS_FWCOL (0x0b << 1)
77 /* Last Window Row Register */
78 #define HDCS_LWROW (0x0c << 1)
79 /* Last Window Column Register */
80 #define HDCS_LWCOL (0x0d << 1)
81 /* Timing Control Register */
82 #define HDCS_TCTRL (0x0e << 1)
83 /* PGA Gain Register: Even Row, Even Column */
84 #define HDCS_ERECPGA (0x0f << 1)
85 /* PGA Gain Register: Even Row, Odd Column */
86 #define HDCS_EROCPGA (0x10 << 1)
87 /* PGA Gain Register: Odd Row, Even Column */
88 #define HDCS_ORECPGA (0x11 << 1)
89 /* PGA Gain Register: Odd Row, Odd Column */
90 #define HDCS_OROCPGA (0x12 << 1)
91 /* Row Exposure Low Register */
92 #define HDCS_ROWEXPL (0x13 << 1)
93 /* Row Exposure High Register */
94 #define HDCS_ROWEXPH (0x14 << 1)
95 
96 /* I2C Registers only for HDCS-1000/1100 */
97 /* Sub-Row Exposure Low Register */
98 #define HDCS00_SROWEXPL (0x15 << 1)
99 /* Sub-Row Exposure High Register */
100 #define HDCS00_SROWEXPH (0x16 << 1)
101 /* Configuration Register */
102 #define HDCS00_CONFIG (0x17 << 1)
103 /* Control Register */
104 #define HDCS00_CONTROL (0x18 << 1)
105 
106 /* I2C Registers only for HDCS-1020 */
107 /* Sub-Row Exposure Register */
108 #define HDCS20_SROWEXP (0x15 << 1)
109 /* Error Control Register */
110 #define HDCS20_ERROR (0x16 << 1)
111 /* Interface Timing 2 Register */
112 #define HDCS20_ITMG2 (0x17 << 1)
113 /* Interface Control 2 Register */
114 #define HDCS20_ICTRL2 (0x18 << 1)
115 /* Horizontal Blank Register */
116 #define HDCS20_HBLANK (0x19 << 1)
117 /* Vertical Blank Register */
118 #define HDCS20_VBLANK (0x1a << 1)
119 /* Configuration Register */
120 #define HDCS20_CONFIG (0x1b << 1)
121 /* Control Register */
122 #define HDCS20_CONTROL (0x1c << 1)
123 
124 #define HDCS_RUN_ENABLE (1 << 2)
125 #define HDCS_SLEEP_MODE (1 << 1)
126 
127 #define HDCS_DEFAULT_EXPOSURE 48
128 #define HDCS_DEFAULT_GAIN 50
129 
130 static int hdcs_probe_1x00(struct sd *sd);
131 static int hdcs_probe_1020(struct sd *sd);
132 static int hdcs_start(struct sd *sd);
133 static int hdcs_init(struct sd *sd);
134 static int hdcs_init_controls(struct sd *sd);
135 static int hdcs_stop(struct sd *sd);
136 static int hdcs_dump(struct sd *sd);
137 
138 static int hdcs_set_exposure(struct gspca_dev *gspca_dev, __s32 val);
139 static int hdcs_set_gain(struct gspca_dev *gspca_dev, __s32 val);
140 
142  .name = "HP HDCS-1000/1100",
143  .i2c_flush = 0,
144  .i2c_addr = (0x55 << 1),
145  .i2c_len = 1,
146 
147  /* FIXME (see if we can lower min_packet_size, needs testing, and also
148  adjusting framerate when the bandwidth gets lower) */
149  .min_packet_size = { 847 },
150  .max_packet_size = { 847 },
151 
152  .init = hdcs_init,
153  .init_controls = hdcs_init_controls,
154  .probe = hdcs_probe_1x00,
155  .start = hdcs_start,
156  .stop = hdcs_stop,
157  .dump = hdcs_dump,
158 };
159 
161  .name = "HDCS-1020",
162  .i2c_flush = 0,
163  .i2c_addr = (0x55 << 1),
164  .i2c_len = 1,
165 
166  /* FIXME (see if we can lower min_packet_size, needs testing, and also
167  adjusting framerate when the bandwidthm gets lower) */
168  .min_packet_size = { 847 },
169  .max_packet_size = { 847 },
170 
171  .init = hdcs_init,
172  .init_controls = hdcs_init_controls,
173  .probe = hdcs_probe_1020,
174  .start = hdcs_start,
175  .stop = hdcs_stop,
176  .dump = hdcs_dump,
177 };
178 
179 static const u16 stv_bridge_init[][2] = {
180  {STV_ISO_ENABLE, 0},
181  {STV_REG23, 0},
182  {STV_REG00, 0x1d},
183  {STV_REG01, 0xb5},
184  {STV_REG02, 0xa8},
185  {STV_REG03, 0x95},
186  {STV_REG04, 0x07},
187 
188  {STV_SCAN_RATE, 0x20},
189  {STV_Y_CTRL, 0x01},
190  {STV_X_CTRL, 0x0a}
191 };
192 
193 static const u8 stv_sensor_init[][2] = {
194  /* Clear status (writing 1 will clear the corresponding status bit) */
195  {HDCS_STATUS, BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1)},
196  /* Disable all interrupts */
197  {HDCS_IMASK, 0x00},
198  {HDCS_PCTRL, BIT(6) | BIT(5) | BIT(1) | BIT(0)},
199  {HDCS_PDRV, 0x00},
200  {HDCS_ICTRL, BIT(5)},
201  {HDCS_ITMG, BIT(4) | BIT(1)},
202  /* ADC output resolution to 10 bits */
203  {HDCS_ADCCTRL, 10}
204 };
205 
206 #endif