55 nv_mask(priv,
info.reg + 0x0c, 0x00000000, 0x00000100);
56 nv_wr32(priv,
info.reg + 0x04, (P << 16) | (N << 8) | M);
57 nv_wr32(priv,
info.reg + 0x10, fN << 16);
60 nv_warn(priv,
"0x%08x/%dKhz unimplemented\n", type, freq);
77 *pobject = nv_object(priv);
81 priv->
base.pll_set = nvc0_clock_pll_set;
90 .ctor = nvc0_clock_ctor,