#include <linux/cpumask.h>
#include <linux/interrupt.h>
#include <linux/smp.h>
#include <linux/kernel.h>
#include <linux/perf_event.h>
#include <linux/uaccess.h>
#include <asm/irq.h>
#include <asm/irq_regs.h>
#include <asm/stacktrace.h>
#include <asm/time.h>

Data Structures
struct	cpu_hw_events

struct	mips_perf_event

struct	mips_pmu

Macros
#define	MIPS_MAX_HWEVENTS 4

#define	MIPS_TCS_PER_COUNTER 2

#define	MIPS_CPUID_TO_COUNTER_MASK (MIPS_TCS_PER_COUNTER - 1)

#define	CNTR_EVEN 0x55555555

#define	CNTR_ODD 0xaaaaaaaa

#define	CNTR_ALL 0xffffffff

#define	T

#define	V

#define	P

#define	C(x) PERF_COUNT_HW_CACHE_##x

#define	M_CONFIG1_PC (1 << 4)

#define	M_PERFCTL_EXL (1 << 0)

#define	M_PERFCTL_KERNEL (1 << 1)

#define	M_PERFCTL_SUPERVISOR (1 << 2)

#define	M_PERFCTL_USER (1 << 3)

#define	M_PERFCTL_INTERRUPT_ENABLE (1 << 4)

#define	M_PERFCTL_EVENT(event) (((event) & 0x3ff) << 5)

#define	M_PERFCTL_VPEID(vpe) ((vpe) << 16)

#define	M_PERFCTL_MT_EN(filter) ((filter) << 20)

#define	M_TC_EN_ALL M_PERFCTL_MT_EN(0)

#define	M_TC_EN_VPE M_PERFCTL_MT_EN(1)

#define	M_TC_EN_TC M_PERFCTL_MT_EN(2)

#define	M_PERFCTL_TCID(tcid) ((tcid) << 22)

#define	M_PERFCTL_WIDE (1 << 30)

#define	M_PERFCTL_MORE (1 << 31)

#define	M_PERFCTL_TC (1 << 30)

#define	M_PERFCTL_COUNT_EVENT_WHENEVER

#define	M_PERFCTL_CONFIG_MASK 0x1f

#define	M_PERFCTL_EVENT_MASK 0xfe0

#define	vpe_id() 0

#define	HANDLE_COUNTER(n)

#define	IS_BOTH_COUNTERS_24K_EVENT(b) ((b) == 0 \|\| (b) == 1 \|\| (b) == 11)

#define	IS_BOTH_COUNTERS_34K_EVENT(b) ((b) == 0 \|\| (b) == 1 \|\| (b) == 11)

#define	IS_BOTH_COUNTERS_74K_EVENT(b) ((b) == 0 \|\| (b) == 1)

#define	IS_BOTH_COUNTERS_1004K_EVENT(b) ((b) == 0 \|\| (b) == 1 \|\| (b) == 11)

#define	IS_BOTH_COUNTERS_BMIPS5000_EVENT(b) ((b) == 0 \|\| (b) == 1)

Functions
	DEFINE_PER_CPU (struct cpu_hw_events, cpu_hw_events)

	early_initcall (init_hw_perf_events)

Macro Definition Documentation

#define C ( x ) PERF_COUNT_HW_CACHE_##x

Definition at line 83 of file perf_event_mipsxx.c.

#define CNTR_ALL 0xffffffff

Definition at line 66 of file perf_event_mipsxx.c.

#define CNTR_EVEN 0x55555555

Definition at line 64 of file perf_event_mipsxx.c.

#define CNTR_ODD 0xaaaaaaaa

Definition at line 65 of file perf_event_mipsxx.c.

#define HANDLE_COUNTER ( n )

Value:

case n + 1:                         \
        if (test_bit(n, cpuc->used_mask)) {         \
            counter = mipspmu.read_counter(n);      \
            if (counter & mipspmu.overflow) {       \
                handle_associated_event(cpuc, n, &data, regs); \
                handled = IRQ_HANDLED;          \
            }                       \
        }

#define IS_BOTH_COUNTERS_1004K_EVENT ( b ) ((b) == 0 || (b) == 1 || (b) == 11)

Definition at line 1316 of file perf_event_mipsxx.c.

#define IS_BOTH_COUNTERS_24K_EVENT ( b ) ((b) == 0 || (b) == 1 || (b) == 11)

Definition at line 1296 of file perf_event_mipsxx.c.

#define IS_BOTH_COUNTERS_34K_EVENT ( b ) ((b) == 0 || (b) == 1 || (b) == 11)

Definition at line 1300 of file perf_event_mipsxx.c.

#define IS_BOTH_COUNTERS_74K_EVENT ( b ) ((b) == 0 || (b) == 1)

Definition at line 1312 of file perf_event_mipsxx.c.

#define IS_BOTH_COUNTERS_BMIPS5000_EVENT ( b ) ((b) == 0 || (b) == 1)

Definition at line 1329 of file perf_event_mipsxx.c.

#define M_CONFIG1_PC (1 << 4)

Definition at line 104 of file perf_event_mipsxx.c.

#define M_PERFCTL_CONFIG_MASK 0x1f

Definition at line 137 of file perf_event_mipsxx.c.

#define M_PERFCTL_COUNT_EVENT_WHENEVER

Value:

(M_PERFCTL_EXL |        \
                    M_PERFCTL_KERNEL |      \
                    M_PERFCTL_USER |        \
                    M_PERFCTL_SUPERVISOR |      \
                    M_PERFCTL_INTERRUPT_ENABLE)

Definition at line 128 of file perf_event_mipsxx.c.

#define M_PERFCTL_EVENT ( event ) (((event) & 0x3ff) << 5)

Definition at line 111 of file perf_event_mipsxx.c.

#define M_PERFCTL_EVENT_MASK 0xfe0

Definition at line 139 of file perf_event_mipsxx.c.

#define M_PERFCTL_EXL (1 << 0)

Definition at line 106 of file perf_event_mipsxx.c.

#define M_PERFCTL_INTERRUPT_ENABLE (1 << 4)

Definition at line 110 of file perf_event_mipsxx.c.

#define M_PERFCTL_KERNEL (1 << 1)

Definition at line 107 of file perf_event_mipsxx.c.

#define M_PERFCTL_MORE (1 << 31)

Definition at line 125 of file perf_event_mipsxx.c.

#define M_PERFCTL_MT_EN ( filter ) ((filter) << 20)

Definition at line 117 of file perf_event_mipsxx.c.

#define M_PERFCTL_SUPERVISOR (1 << 2)

Definition at line 108 of file perf_event_mipsxx.c.

#define M_PERFCTL_TC (1 << 30)

Definition at line 126 of file perf_event_mipsxx.c.

#define M_PERFCTL_TCID ( tcid ) ((tcid) << 22)

Definition at line 123 of file perf_event_mipsxx.c.

#define M_PERFCTL_USER (1 << 3)

Definition at line 109 of file perf_event_mipsxx.c.

#define M_PERFCTL_VPEID ( vpe ) ((vpe) << 16)

Definition at line 112 of file perf_event_mipsxx.c.

#define M_PERFCTL_WIDE (1 << 30)

Definition at line 124 of file perf_event_mipsxx.c.

#define M_TC_EN_ALL M_PERFCTL_MT_EN(0)

Definition at line 120 of file perf_event_mipsxx.c.

#define M_TC_EN_TC M_PERFCTL_MT_EN(2)

Definition at line 122 of file perf_event_mipsxx.c.

#define M_TC_EN_VPE M_PERFCTL_MT_EN(1)

Definition at line 121 of file perf_event_mipsxx.c.

#define MIPS_CPUID_TO_COUNTER_MASK (MIPS_TCS_PER_COUNTER - 1)

Definition at line 32 of file perf_event_mipsxx.c.

#define MIPS_MAX_HWEVENTS 4

Definition at line 30 of file perf_event_mipsxx.c.

#define MIPS_TCS_PER_COUNTER 2

Definition at line 31 of file perf_event_mipsxx.c.

#define P

Definition at line 76 of file perf_event_mipsxx.c.

#define T

Definition at line 74 of file perf_event_mipsxx.c.

#define V

Definition at line 75 of file perf_event_mipsxx.c.

#define vpe_id ( ) 0

Definition at line 174 of file perf_event_mipsxx.c.

Function Documentation

DEFINE_PER_CPU	(	struct cpu_hw_events	,
		cpu_hw_events
	)

early_initcall ( init_hw_perf_events )

Data Structures

Macros

Functions

Macro Definition Documentation

Function Documentation