27 #define NV04_PFB_BOOT_0 0x00100000
28 # define NV04_PFB_BOOT_0_RAM_AMOUNT 0x00000003
29 # define NV04_PFB_BOOT_0_RAM_AMOUNT_32MB 0x00000000
30 # define NV04_PFB_BOOT_0_RAM_AMOUNT_4MB 0x00000001
31 # define NV04_PFB_BOOT_0_RAM_AMOUNT_8MB 0x00000002
32 # define NV04_PFB_BOOT_0_RAM_AMOUNT_16MB 0x00000003
33 # define NV04_PFB_BOOT_0_RAM_WIDTH_128 0x00000004
34 # define NV04_PFB_BOOT_0_RAM_TYPE 0x00000028
35 # define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_8MBIT 0x00000000
36 # define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_16MBIT 0x00000008
37 # define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_16MBIT_4BANK 0x00000010
38 # define NV04_PFB_BOOT_0_RAM_TYPE_SDRAM_16MBIT 0x00000018
39 # define NV04_PFB_BOOT_0_RAM_TYPE_SDRAM_64MBIT 0x00000020
40 # define NV04_PFB_BOOT_0_RAM_TYPE_SDRAM_64MBITX16 0x00000028
41 # define NV04_PFB_BOOT_0_UMA_ENABLE 0x00000100
42 # define NV04_PFB_BOOT_0_UMA_SIZE 0x0000f000
43 #define NV04_PFB_CFG0 0x00100200
52 if (!(tile_flags & 0xff00))
86 *pobject = nv_object(priv);
91 if (boot0 & 0x00000100) {
92 priv->
base.ram.size = ((boot0 >> 12) & 0xf) * 2 + 2;
93 priv->
base.ram.size *= 1024 * 1024;
97 priv->
base.ram.size = 32 * 1024 * 1024;
100 priv->
base.ram.size = 16 * 1024 * 1024;
103 priv->
base.ram.size = 8 * 1024 * 1024;
106 priv->
base.ram.size = 4 * 1024 * 1024;
111 if ((boot0 & 0x00000038) <= 0x10)
112 priv->
base.ram.type = NV_MEM_TYPE_SGRAM;
114 priv->
base.ram.type = NV_MEM_TYPE_SDRAM;
125 .ctor = nv04_fb_ctor,
127 .init = nv04_fb_init,