35 nv_mask(therm, 0x15b8, 0x80000000, 0);
36 nv_wr32(therm, 0x15b0, 0x80003fff);
37 return nv_rd32(therm, 0x15b4) & 0x3fff;
39 nv_wr32(therm, 0x15b0, 0xff);
40 return nv_rd32(therm, 0x15b4) & 0xff;
53 nv_wr32(therm, 0x15b0, 0x80003fff);
54 core_temp = nv_rd32(therm, 0x15b4) & 0x3fff;
56 nv_wr32(therm, 0x15b0, 0xff);
57 core_temp = nv_rd32(therm, 0x15b4) & 0xff;
62 core_temp = nv40_sensor_setup(therm);
82 u32 reg = nv_rd32(therm, 0x0010f0);
83 if (reg & 0x80000000) {
84 *duty = (reg & 0x7fff0000) >> 16;
85 *divs = (reg & 0x00007fff);
90 u32 reg = nv_rd32(therm, 0x0015f4);
91 if (reg & 0x80000000) {
92 *divs = nv_rd32(therm, 0x0015f8);
93 *duty = (reg & 0x7fffffff);
97 nv_error(therm,
"unknown pwm ctrl for gpio %d\n", line);
108 nv_wr32(therm, 0x0010f0, 0x80000000 | (duty << 16) | divs);
111 nv_wr32(therm, 0x0015f8, divs);
112 nv_wr32(therm, 0x0015f4, duty | 0x80000000);
114 nv_error(therm,
"unknown pwm ctrl for gpio %d\n", line);
132 *pobject = nv_object(priv);
133 therm = (
void *) priv;
158 .ctor = nv40_therm_ctor,