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Macros
suni1x10gexp_regs.h File Reference

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Macros

#define SUNI1x10GEXP_REG_SIZEOF_MAC_FILTER   0x0003
 
#define mSUNI1x10GEXP_MAC_FILTER_OFFSET(filterId)   ( (filterId) * SUNI1x10GEXP_REG_SIZEOF_MAC_FILTER )
 
#define SUNI1x10GEXP_REG_SIZEOF_MAC_VID_FILTER   0x0001
 
#define mSUNI1x10GEXP_MAC_VID_FILTER_OFFSET(filterId)   ( (filterId) * SUNI1x10GEXP_REG_SIZEOF_MAC_VID_FILTER )
 
#define SUNI1x10GEXP_REG_SIZEOF_MSTAT_COUNT   0x0004
 
#define mSUNI1x10GEXP_MSTAT_COUNT_OFFSET(countId)   ( (countId) * SUNI1x10GEXP_REG_SIZEOF_MSTAT_COUNT )
 
#define SUNI1x10GEXP_REG_IDENTIFICATION   0x0000
 
#define SUNI1x10GEXP_REG_PRODUCT_REVISION   0x0001
 
#define SUNI1x10GEXP_REG_CONFIG_AND_RESET_CONTROL   0x0002
 
#define SUNI1x10GEXP_REG_LOOPBACK_MISC_CTRL   0x0003
 
#define SUNI1x10GEXP_REG_DEVICE_STATUS   0x0004
 
#define SUNI1x10GEXP_REG_GLOBAL_PERFORMANCE_MONITOR_UPDATE   0x0005
 
#define SUNI1x10GEXP_REG_MDIO_COMMAND   0x0006
 
#define SUNI1x10GEXP_REG_MDIO_INTERRUPT_ENABLE   0x0007
 
#define SUNI1x10GEXP_REG_MDIO_INTERRUPT_STATUS   0x0008
 
#define SUNI1x10GEXP_REG_MMD_PHY_ADDRESS   0x0009
 
#define SUNI1x10GEXP_REG_MMD_CONTROL_ADDRESS_DATA   0x000A
 
#define SUNI1x10GEXP_REG_MDIO_READ_STATUS_DATA   0x000B
 
#define SUNI1x10GEXP_REG_OAM_INTF_CTRL   0x000C
 
#define SUNI1x10GEXP_REG_MASTER_INTERRUPT_STATUS   0x000D
 
#define SUNI1x10GEXP_REG_GLOBAL_INTERRUPT_ENABLE   0x000E
 
#define SUNI1x10GEXP_REG_FREE   0x000F
 
#define SUNI1x10GEXP_REG_XTEF_MISC_CTRL   0x0010
 
#define SUNI1x10GEXP_REG_XRF_MISC_CTRL   0x0011
 
#define SUNI1x10GEXP_REG_SERDES_3125_CONFIG_1   0x0100
 
#define SUNI1x10GEXP_REG_SERDES_3125_CONFIG_2   0x0101
 
#define SUNI1x10GEXP_REG_SERDES_3125_INTERRUPT_ENABLE   0x0102
 
#define SUNI1x10GEXP_REG_SERDES_3125_INTERRUPT_VISIBLE   0x0103
 
#define SUNI1x10GEXP_REG_SERDES_3125_INTERRUPT_STATUS   0x0104
 
#define SUNI1x10GEXP_REG_SERDES_3125_TEST_CONFIG   0x0107
 
#define SUNI1x10GEXP_REG_RXXG_CONFIG_1   0x2040
 
#define SUNI1x10GEXP_REG_RXXG_CONFIG_2   0x2041
 
#define SUNI1x10GEXP_REG_RXXG_CONFIG_3   0x2042
 
#define SUNI1x10GEXP_REG_RXXG_INTERRUPT   0x2043
 
#define SUNI1x10GEXP_REG_RXXG_MAX_FRAME_LENGTH   0x2045
 
#define SUNI1x10GEXP_REG_RXXG_SA_15_0   0x2046
 
#define SUNI1x10GEXP_REG_RXXG_SA_31_16   0x2047
 
#define SUNI1x10GEXP_REG_RXXG_SA_47_32   0x2048
 
#define SUNI1x10GEXP_REG_RXXG_RECEIVE_FIFO_THRESHOLD   0x2049
 
#define mSUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_LOW(filterId)   (0x204A + mSUNI1x10GEXP_MAC_FILTER_OFFSET(filterId))
 
#define mSUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_MID(filterId)   (0x204B + mSUNI1x10GEXP_MAC_FILTER_OFFSET(filterId))
 
#define mSUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_HIGH(filterId)   (0x204C + mSUNI1x10GEXP_MAC_FILTER_OFFSET(filterId))
 
#define mSUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID(filterId)   (0x2062 + mSUNI1x10GEXP_MAC_VID_FILTER_OFFSET(filterId))
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_0_LOW   0x204A
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_0_MID   0x204B
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_0_HIGH   0x204C
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_1_LOW   0x204D
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_1_MID   0x204E
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_1_HIGH   0x204F
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_2_LOW   0x2050
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_2_MID   0x2051
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_2_HIGH   0x2052
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_3_LOW   0x2053
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_3_MID   0x2054
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_3_HIGH   0x2055
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_4_LOW   0x2056
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_4_MID   0x2057
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_4_HIGH   0x2058
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_5_LOW   0x2059
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_5_MID   0x205A
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_5_HIGH   0x205B
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_6_LOW   0x205C
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_6_MID   0x205D
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_6_HIGH   0x205E
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_7_LOW   0x205F
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_7_MID   0x2060
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_7_HIGH   0x2061
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_0   0x2062
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_1   0x2063
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_2   0x2064
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_3   0x2065
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_4   0x2066
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_5   0x2067
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_6   0x2068
 
#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_7   0x2069
 
#define SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_LOW   0x206A
 
#define SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_MIDLOW   0x206B
 
#define SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_MIDHIGH   0x206C
 
#define SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_HIGH   0x206D
 
#define SUNI1x10GEXP_REG_RXXG_ADDRESS_FILTER_CONTROL_0   0x206E
 
#define SUNI1x10GEXP_REG_RXXG_ADDRESS_FILTER_CONTROL_1   0x206F
 
#define SUNI1x10GEXP_REG_RXXG_ADDRESS_FILTER_CONTROL_2   0x2070
 
#define SUNI1x10GEXP_REG_XRF_PATTERN_GEN_CTRL   0x2081
 
#define SUNI1x10GEXP_REG_XRF_8BTB_ERR_COUNT_LANE_0   0x2084
 
#define SUNI1x10GEXP_REG_XRF_8BTB_ERR_COUNT_LANE_1   0x2085
 
#define SUNI1x10GEXP_REG_XRF_8BTB_ERR_COUNT_LANE_2   0x2086
 
#define SUNI1x10GEXP_REG_XRF_8BTB_ERR_COUNT_LANE_3   0x2087
 
#define SUNI1x10GEXP_REG_XRF_INTERRUPT_ENABLE   0x2088
 
#define SUNI1x10GEXP_REG_XRF_INTERRUPT_STATUS   0x2089
 
#define SUNI1x10GEXP_REG_XRF_ERR_STATUS   0x208A
 
#define SUNI1x10GEXP_REG_XRF_DIAG_INTERRUPT_ENABLE   0x208B
 
#define SUNI1x10GEXP_REG_XRF_DIAG_INTERRUPT_STATUS   0x208C
 
#define SUNI1x10GEXP_REG_XRF_CODE_ERR_THRES   0x2092
 
#define SUNI1x10GEXP_REG_RXOAM_CONFIG   0x20C0
 
#define SUNI1x10GEXP_REG_RXOAM_FILTER_1_CONFIG   0x20C1
 
#define SUNI1x10GEXP_REG_RXOAM_FILTER_2_CONFIG   0x20C2
 
#define SUNI1x10GEXP_REG_RXOAM_CONFIG_2   0x20C3
 
#define SUNI1x10GEXP_REG_RXOAM_HEC_CONFIG   0x20C4
 
#define SUNI1x10GEXP_REG_RXOAM_HEC_ERR_THRES   0x20C5
 
#define SUNI1x10GEXP_REG_RXOAM_INTERRUPT_ENABLE   0x20C7
 
#define SUNI1x10GEXP_REG_RXOAM_INTERRUPT_STATUS   0x20C8
 
#define SUNI1x10GEXP_REG_RXOAM_STATUS   0x20C9
 
#define SUNI1x10GEXP_REG_RXOAM_HEC_ERR_COUNT   0x20CA
 
#define SUNI1x10GEXP_REG_RXOAM_FIFO_OVERFLOW_COUNT   0x20CB
 
#define SUNI1x10GEXP_REG_RXOAM_FILTER_MISMATCH_COUNT_LSB   0x20CC
 
#define SUNI1x10GEXP_REG_RXOAM_FILTER_MISMATCH_COUNT_MSB   0x20CD
 
#define SUNI1x10GEXP_REG_RXOAM_FILTER_1_MISMATCH_COUNT_LSB   0x20CE
 
#define SUNI1x10GEXP_REG_RXOAM_FILTER_1_MISMATCH_COUNT_MSB   0x20CF
 
#define SUNI1x10GEXP_REG_RXOAM_FILTER_2_MISMATCH_COUNT_LSB   0x20D0
 
#define SUNI1x10GEXP_REG_RXOAM_FILTER_2_MISMATCH_COUNT_MSB   0x20D1
 
#define SUNI1x10GEXP_REG_RXOAM_OAM_EXTRACT_COUNT_LSB   0x20D2
 
#define SUNI1x10GEXP_REG_RXOAM_OAM_EXTRACT_COUNT_MSB   0x20D3
 
#define SUNI1x10GEXP_REG_RXOAM_MINI_PACKET_COUNT_LSB   0x20D4
 
#define SUNI1x10GEXP_REG_RXOAM_MINI_PACKET_COUNT_MSB   0x20D5
 
#define SUNI1x10GEXP_REG_RXOAM_FILTER_MISMATCH_THRES_LSB   0x20D6
 
#define SUNI1x10GEXP_REG_RXOAM_FILTER_MISMATCH_THRES_MSB   0x20D7
 
#define SUNI1x10GEXP_REG_MSTAT_CONTROL   0x2100
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_ROLLOVER_0   0x2101
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_ROLLOVER_1   0x2102
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_ROLLOVER_2   0x2103
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_ROLLOVER_3   0x2104
 
#define SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_0   0x2105
 
#define SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_1   0x2106
 
#define SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_2   0x2107
 
#define SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_3   0x2108
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_WRITE_ADDRESS   0x2109
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_WRITE_DATA_LOW   0x210A
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_WRITE_DATA_MIDDLE   0x210B
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_WRITE_DATA_HIGH   0x210C
 
#define mSUNI1x10GEXP_REG_MSTAT_COUNTER_LOW(countId)   (0x2110 + mSUNI1x10GEXP_MSTAT_COUNT_OFFSET(countId))
 
#define mSUNI1x10GEXP_REG_MSTAT_COUNTER_MID(countId)   (0x2111 + mSUNI1x10GEXP_MSTAT_COUNT_OFFSET(countId))
 
#define mSUNI1x10GEXP_REG_MSTAT_COUNTER_HIGH(countId)   (0x2112 + mSUNI1x10GEXP_MSTAT_COUNT_OFFSET(countId))
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_0_LOW   0x2110
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_0_MID   0x2111
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_0_HIGH   0x2112
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_0_RESVD   0x2113
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_1_LOW   0x2114
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_1_MID   0x2115
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_1_HIGH   0x2116
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_1_RESVD   0x2117
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_2_LOW   0x2118
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_2_MID   0x2119
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_2_HIGH   0x211A
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_2_RESVD   0x211B
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_3_LOW   0x211C
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_3_MID   0x211D
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_3_HIGH   0x211E
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_3_RESVD   0x211F
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_4_LOW   0x2120
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_4_MID   0x2121
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_4_HIGH   0x2122
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_4_RESVD   0x2123
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_5_LOW   0x2124
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_5_MID   0x2125
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_5_HIGH   0x2126
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_5_RESVD   0x2127
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_6_LOW   0x2128
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_6_MID   0x2129
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_6_HIGH   0x212A
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_6_RESVD   0x212B
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_7_LOW   0x212C
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_7_MID   0x212D
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_7_HIGH   0x212E
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_7_RESVD   0x212F
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_8_LOW   0x2130
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_8_MID   0x2131
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_8_HIGH   0x2132
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_8_RESVD   0x2133
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_9_LOW   0x2134
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_9_MID   0x2135
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_9_HIGH   0x2136
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_9_RESVD   0x2137
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_10_LOW   0x2138
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_10_MID   0x2139
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_10_HIGH   0x213A
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_10_RESVD   0x213B
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_11_LOW   0x213C
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_11_MID   0x213D
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_11_HIGH   0x213E
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_11_RESVD   0x213F
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_12_LOW   0x2140
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_12_MID   0x2141
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_12_HIGH   0x2142
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_12_RESVD   0x2143
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_13_LOW   0x2144
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_13_MID   0x2145
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_13_HIGH   0x2146
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_13_RESVD   0x2147
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_14_LOW   0x2148
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_14_MID   0x2149
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_14_HIGH   0x214A
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_14_RESVD   0x214B
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_15_LOW   0x214C
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_15_MID   0x214D
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_15_HIGH   0x214E
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_15_RESVD   0x214F
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_16_LOW   0x2150
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_16_MID   0x2151
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_16_HIGH   0x2152
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_16_RESVD   0x2153
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_17_LOW   0x2154
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_17_MID   0x2155
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_17_HIGH   0x2156
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_17_RESVD   0x2157
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_18_LOW   0x2158
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_18_MID   0x2159
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_18_HIGH   0x215A
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_18_RESVD   0x215B
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_19_LOW   0x215C
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_19_MID   0x215D
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_19_HIGH   0x215E
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_19_RESVD   0x215F
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_20_LOW   0x2160
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_20_MID   0x2161
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_20_HIGH   0x2162
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_20_RESVD   0x2163
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_21_LOW   0x2164
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_21_MID   0x2165
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_21_HIGH   0x2166
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_21_RESVD   0x2167
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_22_LOW   0x2168
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_22_MID   0x2169
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_22_HIGH   0x216A
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_22_RESVD   0x216B
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_23_LOW   0x216C
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_23_MID   0x216D
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_23_HIGH   0x216E
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_23_RESVD   0x216F
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_24_LOW   0x2170
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_24_MID   0x2171
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_24_HIGH   0x2172
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_24_RESVD   0x2173
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_25_LOW   0x2174
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_25_MID   0x2175
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_25_HIGH   0x2176
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_25_RESVD   0x2177
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_26_LOW   0x2178
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_26_MID   0x2179
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_26_HIGH   0x217a
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_26_RESVD   0x217b
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_27_LOW   0x217c
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_27_MID   0x217d
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_27_HIGH   0x217e
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_27_RESVD   0x217f
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_28_LOW   0x2180
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_28_MID   0x2181
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_28_HIGH   0x2182
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_28_RESVD   0x2183
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_29_LOW   0x2184
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_29_MID   0x2185
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_29_HIGH   0x2186
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_29_RESVD   0x2187
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_30_LOW   0x2188
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_30_MID   0x2189
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_30_HIGH   0x218A
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_30_RESVD   0x218B
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_31_LOW   0x218C
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_31_MID   0x218D
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_31_HIGH   0x218E
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_31_RESVD   0x218F
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_32_LOW   0x2190
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_32_MID   0x2191
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_32_HIGH   0x2192
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_32_RESVD   0x2193
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_33_LOW   0x2194
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_33_MID   0x2195
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_33_HIGH   0x2196
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_33_RESVD   0x2197
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_34_LOW   0x2198
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_34_MID   0x2199
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_34_HIGH   0x219A
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_34_RESVD   0x219B
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_35_LOW   0x219C
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_35_MID   0x219D
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_35_HIGH   0x219E
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_35_RESVD   0x219F
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_36_LOW   0x21A0
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_36_MID   0x21A1
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_36_HIGH   0x21A2
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_36_RESVD   0x21A3
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_37_LOW   0x21A4
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_37_MID   0x21A5
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_37_HIGH   0x21A6
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_37_RESVD   0x21A7
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_38_LOW   0x21A8
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_38_MID   0x21A9
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_38_HIGH   0x21AA
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_38_RESVD   0x21AB
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_39_LOW   0x21AC
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_39_MID   0x21AD
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_39_HIGH   0x21AE
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_39_RESVD   0x21AF
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_40_LOW   0x21B0
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_40_MID   0x21B1
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_40_HIGH   0x21B2
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_40_RESVD   0x21B3
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_41_LOW   0x21B4
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_41_MID   0x21B5
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_41_HIGH   0x21B6
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_41_RESVD   0x21B7
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_42_LOW   0x21B8
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_42_MID   0x21B9
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_42_HIGH   0x21BA
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_42_RESVD   0x21BB
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_43_LOW   0x21BC
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_43_MID   0x21BD
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_43_HIGH   0x21BE
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_43_RESVD   0x21BF
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_44_LOW   0x21C0
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_44_MID   0x21C1
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_44_HIGH   0x21C2
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_44_RESVD   0x21C3
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_45_LOW   0x21C4
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_45_MID   0x21C5
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_45_HIGH   0x21C6
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_45_RESVD   0x21C7
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_46_LOW   0x21C8
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_46_MID   0x21C9
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_46_HIGH   0x21CA
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_46_RESVD   0x21CB
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_47_LOW   0x21CC
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_47_MID   0x21CD
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_47_HIGH   0x21CE
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_47_RESVD   0x21CF
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_48_LOW   0x21D0
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_48_MID   0x21D1
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_48_HIGH   0x21D2
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_48_RESVD   0x21D3
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_49_LOW   0x21D4
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_49_MID   0x21D5
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_49_HIGH   0x21D6
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_49_RESVD   0x21D7
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_50_LOW   0x21D8
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_50_MID   0x21D9
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_50_HIGH   0x21DA
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_50_RESVD   0x21DB
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_51_LOW   0x21DC
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_51_MID   0x21DD
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_51_HIGH   0x21DE
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_51_RESVD   0x21DF
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_52_LOW   0x21E0
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_52_MID   0x21E1
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_52_HIGH   0x21E2
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_52_RESVD   0x21E3
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_53_LOW   0x21E4
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_53_MID   0x21E5
 
#define SUNI1x10GEXP_REG_MSTAT_COUNTER_53_HIGH   0x21E6
 
#define SUNI1x10GEXP_CNTR_MAC_ETHERNET_NUM   51
 
#define SUNI1x10GEXP_REG_IFLX_GLOBAL_CONFIG   0x2200
 
#define SUNI1x10GEXP_REG_IFLX_CHANNEL_PROVISION   0x2201
 
#define SUNI1x10GEXP_REG_IFLX_FIFO_OVERFLOW_ENABLE   0x2209
 
#define SUNI1x10GEXP_REG_IFLX_FIFO_OVERFLOW_INTERRUPT   0x220A
 
#define SUNI1x10GEXP_REG_IFLX_INDIR_CHANNEL_ADDRESS   0x220D
 
#define SUNI1x10GEXP_REG_IFLX_INDIR_LOGICAL_FIFO_LOW_LIMIT_PROVISION   0x220E
 
#define SUNI1x10GEXP_REG_IFLX_INDIR_LOGICAL_FIFO_HIGH_LIMIT   0x220F
 
#define SUNI1x10GEXP_REG_IFLX_INDIR_FULL_ALMOST_FULL_STATUS_LIMIT   0x2210
 
#define SUNI1x10GEXP_REG_IFLX_INDIR_EMPTY_ALMOST_EMPTY_STATUS_LIMIT   0x2211
 
#define SUNI1x10GEXP_REG_PL4MOS_CONFIG   0x2240
 
#define SUNI1x10GEXP_REG_PL4MOS_MASK   0x2241
 
#define SUNI1x10GEXP_REG_PL4MOS_FAIRNESS_MASKING   0x2242
 
#define SUNI1x10GEXP_REG_PL4MOS_MAXBURST1   0x2243
 
#define SUNI1x10GEXP_REG_PL4MOS_MAXBURST2   0x2244
 
#define SUNI1x10GEXP_REG_PL4MOS_TRANSFER_SIZE   0x2245
 
#define SUNI1x10GEXP_REG_PL4ODP_CONFIG   0x2280
 
#define SUNI1x10GEXP_REG_PL4ODP_INTERRUPT_MASK   0x2282
 
#define SUNI1x10GEXP_REG_PL4ODP_INTERRUPT   0x2283
 
#define SUNI1x10GEXP_REG_PL4ODP_CONFIG_MAX_T   0x2284
 
#define SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_STATUS   0x2300
 
#define SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_CHANGE   0x2301
 
#define SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_MASK   0x2302
 
#define SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_LIMITS   0x2303
 
#define SUNI1x10GEXP_REG_PL4IO_CALENDAR_REPETITIONS   0x2304
 
#define SUNI1x10GEXP_REG_PL4IO_CONFIG   0x2305
 
#define SUNI1x10GEXP_REG_TXXG_CONFIG_1   0x3040
 
#define SUNI1x10GEXP_REG_TXXG_CONFIG_2   0x3041
 
#define SUNI1x10GEXP_REG_TXXG_CONFIG_3   0x3042
 
#define SUNI1x10GEXP_REG_TXXG_INTERRUPT   0x3043
 
#define SUNI1x10GEXP_REG_TXXG_STATUS   0x3044
 
#define SUNI1x10GEXP_REG_TXXG_MAX_FRAME_SIZE   0x3045
 
#define SUNI1x10GEXP_REG_TXXG_MIN_FRAME_SIZE   0x3046
 
#define SUNI1x10GEXP_REG_TXXG_SA_15_0   0x3047
 
#define SUNI1x10GEXP_REG_TXXG_SA_31_16   0x3048
 
#define SUNI1x10GEXP_REG_TXXG_SA_47_32   0x3049
 
#define SUNI1x10GEXP_REG_TXXG_PAUSE_TIMER   0x304D
 
#define SUNI1x10GEXP_REG_TXXG_PAUSE_TIMER_INTERVAL   0x304E
 
#define SUNI1x10GEXP_REG_TXXG_FILTER_ERROR_COUNTER   0x3051
 
#define SUNI1x10GEXP_REG_TXXG_PAUSE_QUANTUM_CONFIG   0x3052
 
#define SUNI1x10GEXP_REG_XTEF_CTRL   0x3080
 
#define SUNI1x10GEXP_REG_XTEF_INTERRUPT_STATUS   0x3084
 
#define SUNI1x10GEXP_REG_XTEF_INTERRUPT_ENABLE   0x3085
 
#define SUNI1x10GEXP_REG_XTEF_VISIBILITY   0x3086
 
#define SUNI1x10GEXP_REG_TXOAM_OAM_CONFIG   0x30C0
 
#define SUNI1x10GEXP_REG_TXOAM_MINI_RATE_CONFIG   0x30C1
 
#define SUNI1x10GEXP_REG_TXOAM_MINI_GAP_FIFO_CONFIG   0x30C2
 
#define SUNI1x10GEXP_REG_TXOAM_P1P2_STATIC_VALUES   0x30C3
 
#define SUNI1x10GEXP_REG_TXOAM_P3P4_STATIC_VALUES   0x30C4
 
#define SUNI1x10GEXP_REG_TXOAM_P5P6_STATIC_VALUES   0x30C5
 
#define SUNI1x10GEXP_REG_TXOAM_INTERRUPT_ENABLE   0x30C6
 
#define SUNI1x10GEXP_REG_TXOAM_INTERRUPT_STATUS   0x30C7
 
#define SUNI1x10GEXP_REG_TXOAM_INSERT_COUNT_LSB   0x30C8
 
#define SUNI1x10GEXP_REG_TXOAM_INSERT_COUNT_MSB   0x30C9
 
#define SUNI1x10GEXP_REG_TXOAM_OAM_MINI_COUNT_LSB   0x30CA
 
#define SUNI1x10GEXP_REG_TXOAM_OAM_MINI_COUNT_MSB   0x30CB
 
#define SUNI1x10GEXP_REG_TXOAM_P1P2_MINI_MASK   0x30CC
 
#define SUNI1x10GEXP_REG_TXOAM_P3P4_MINI_MASK   0x30CD
 
#define SUNI1x10GEXP_REG_TXOAM_P5P6_MINI_MASK   0x30CE
 
#define SUNI1x10GEXP_REG_TXOAM_COSET   0x30CF
 
#define SUNI1x10GEXP_REG_TXOAM_EMPTY_FIFO_INS_OP_CNT_LSB   0x30D0
 
#define SUNI1x10GEXP_REG_TXOAM_EMPTY_FIFO_INS_OP_CNT_MSB   0x30D1
 
#define SUNI1x10GEXP_REG_TXOAM_STATIC_VALUE_MINI_COUNT_LSB   0x30D2
 
#define SUNI1x10GEXP_REG_TXOAM_STATIC_VALUE_MINI_COUNT_MSB   0x30D3
 
#define SUNI1x10GEXP_REG_EFLX_GLOBAL_CONFIG   0x3200
 
#define SUNI1x10GEXP_REG_EFLX_ERCU_GLOBAL_STATUS   0x3201
 
#define SUNI1x10GEXP_REG_EFLX_INDIR_CHANNEL_ADDRESS   0x3202
 
#define SUNI1x10GEXP_REG_EFLX_INDIR_FIFO_LOW_LIMIT   0x3203
 
#define SUNI1x10GEXP_REG_EFLX_INDIR_FIFO_HIGH_LIMIT   0x3204
 
#define SUNI1x10GEXP_REG_EFLX_INDIR_FULL_ALMOST_FULL_STATUS_AND_LIMIT   0x3205
 
#define SUNI1x10GEXP_REG_EFLX_INDIR_EMPTY_ALMOST_EMPTY_STATUS_AND_LIMIT   0x3206
 
#define SUNI1x10GEXP_REG_EFLX_INDIR_FIFO_CUT_THROUGH_THRESHOLD   0x3207
 
#define SUNI1x10GEXP_REG_EFLX_FIFO_OVERFLOW_ERROR_ENABLE   0x320C
 
#define SUNI1x10GEXP_REG_EFLX_FIFO_OVERFLOW_ERROR_INDICATION   0x320D
 
#define SUNI1x10GEXP_REG_EFLX_CHANNEL_PROVISION   0x3210
 
#define SUNI1x10GEXP_REG_PL4IDU_CONFIG   0x3280
 
#define SUNI1x10GEXP_REG_PL4IDU_INTERRUPT_MASK   0x3282
 
#define SUNI1x10GEXP_REG_PL4IDU_INTERRUPT   0x3283
 
#define SUNI1x10GEXP_REG_MAX_OFFSET   0x3480
 
#define SUNI1x10GEXP_BITMSK_BITS_1   0x00001
 
#define SUNI1x10GEXP_BITMSK_BITS_2   0x00003
 
#define SUNI1x10GEXP_BITMSK_BITS_3   0x00007
 
#define SUNI1x10GEXP_BITMSK_BITS_4   0x0000f
 
#define SUNI1x10GEXP_BITMSK_BITS_5   0x0001f
 
#define SUNI1x10GEXP_BITMSK_BITS_6   0x0003f
 
#define SUNI1x10GEXP_BITMSK_BITS_7   0x0007f
 
#define SUNI1x10GEXP_BITMSK_BITS_8   0x000ff
 
#define SUNI1x10GEXP_BITMSK_BITS_9   0x001ff
 
#define SUNI1x10GEXP_BITMSK_BITS_10   0x003ff
 
#define SUNI1x10GEXP_BITMSK_BITS_11   0x007ff
 
#define SUNI1x10GEXP_BITMSK_BITS_12   0x00fff
 
#define SUNI1x10GEXP_BITMSK_BITS_13   0x01fff
 
#define SUNI1x10GEXP_BITMSK_BITS_14   0x03fff
 
#define SUNI1x10GEXP_BITMSK_BITS_15   0x07fff
 
#define SUNI1x10GEXP_BITMSK_BITS_16   0x0ffff
 
#define mSUNI1x10GEXP_CLR_MSBITS_1(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_15)
 
#define mSUNI1x10GEXP_CLR_MSBITS_2(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_14)
 
#define mSUNI1x10GEXP_CLR_MSBITS_3(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_13)
 
#define mSUNI1x10GEXP_CLR_MSBITS_4(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_12)
 
#define mSUNI1x10GEXP_CLR_MSBITS_5(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_11)
 
#define mSUNI1x10GEXP_CLR_MSBITS_6(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_10)
 
#define mSUNI1x10GEXP_CLR_MSBITS_7(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_9)
 
#define mSUNI1x10GEXP_CLR_MSBITS_8(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_8)
 
#define mSUNI1x10GEXP_CLR_MSBITS_9(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_7)
 
#define mSUNI1x10GEXP_CLR_MSBITS_10(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_6)
 
#define mSUNI1x10GEXP_CLR_MSBITS_11(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_5)
 
#define mSUNI1x10GEXP_CLR_MSBITS_12(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_4)
 
#define mSUNI1x10GEXP_CLR_MSBITS_13(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_3)
 
#define mSUNI1x10GEXP_CLR_MSBITS_14(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_2)
 
#define mSUNI1x10GEXP_CLR_MSBITS_15(v)   ((v) & SUNI1x10GEXP_BITMSK_BITS_1)
 
#define mSUNI1x10GEXP_GET_BIT(val, bitMsk)   (((val)&(bitMsk)) ? 1:0)
 
#define SUNI1x10GEXP_BITMSK_REVISION   0x000F
 
#define SUNI1x10GEXP_BITMSK_XAUI_ARESET   0x0004
 
#define SUNI1x10GEXP_BITMSK_PL4_ARESET   0x0002
 
#define SUNI1x10GEXP_BITMSK_DRESETB   0x0001
 
#define SUNI1x10GEXP_BITMSK_PL4IO_OUTCLKSEL   0x0800
 
#define SUNI1x10GEXP_BITMSK_SYSPCSLB   0x0200
 
#define SUNI1x10GEXP_BITMSK_LINEPCSLB   0x0100
 
#define SUNI1x10GEXP_BITMSK_MSTAT_BYPASS   0x0080
 
#define SUNI1x10GEXP_BITMSK_RXXG_BYPASS   0x0040
 
#define SUNI1x10GEXP_BITMSK_TXXG_BYPASS   0x0020
 
#define SUNI1x10GEXP_BITMSK_SOP_PAD_EN   0x0010
 
#define SUNI1x10GEXP_BITMSK_LOS_INV   0x0002
 
#define SUNI1x10GEXP_BITMSK_OVERRIDE_LOS   0x0001
 
#define SUNI1x10GEXP_BITMSK_TOP_SXRA_EXPIRED   0x0200
 
#define SUNI1x10GEXP_BITMSK_TOP_MDIO_BUSY   0x0100
 
#define SUNI1x10GEXP_BITMSK_TOP_DTRB   0x0080
 
#define SUNI1x10GEXP_BITMSK_TOP_EXPIRED   0x0040
 
#define SUNI1x10GEXP_BITMSK_TOP_PAUSED   0x0020
 
#define SUNI1x10GEXP_BITMSK_TOP_PL4_ID_DOOL   0x0010
 
#define SUNI1x10GEXP_BITMSK_TOP_PL4_IS_DOOL   0x0008
 
#define SUNI1x10GEXP_BITMSK_TOP_PL4_ID_ROOL   0x0004
 
#define SUNI1x10GEXP_BITMSK_TOP_PL4_IS_ROOL   0x0002
 
#define SUNI1x10GEXP_BITMSK_TOP_PL4_OUT_ROOL   0x0001
 
#define SUNI1x10GEXP_BITMSK_TIP   0x8000
 
#define SUNI1x10GEXP_BITMSK_XAUI_REF_CLKA   0x0100
 
#define SUNI1x10GEXP_BITMSK_RXLANE3CLKA   0x0080
 
#define SUNI1x10GEXP_BITMSK_RXLANE2CLKA   0x0040
 
#define SUNI1x10GEXP_BITMSK_RXLANE1CLKA   0x0020
 
#define SUNI1x10GEXP_BITMSK_RXLANE0CLKA   0x0010
 
#define SUNI1x10GEXP_BITMSK_CSUCLKA   0x0008
 
#define SUNI1x10GEXP_BITMSK_TDCLKA   0x0004
 
#define SUNI1x10GEXP_BITMSK_RSCLKA   0x0002
 
#define SUNI1x10GEXP_BITMSK_RDCLKA   0x0001
 
#define SUNI1x10GEXP_BITMSK_MDIO_RDINC   0x0010
 
#define SUNI1x10GEXP_BITMSK_MDIO_RSTAT   0x0008
 
#define SUNI1x10GEXP_BITMSK_MDIO_LCTLD   0x0004
 
#define SUNI1x10GEXP_BITMSK_MDIO_LCTLA   0x0002
 
#define SUNI1x10GEXP_BITMSK_MDIO_SPRE   0x0001
 
#define SUNI1x10GEXP_BITMSK_MDIO_BUSY_EN   0x0001
 
#define SUNI1x10GEXP_BITMSK_MDIO_BUSYI   0x0001
 
#define SUNI1x10GEXP_BITMSK_MDIO_DEVADR   0x1F00
 
#define SUNI1x10GEXP_BITOFF_MDIO_DEVADR   8
 
#define SUNI1x10GEXP_BITMSK_MDIO_PRTADR   0x001F
 
#define SUNI1x10GEXP_BITOFF_MDIO_PRTADR   0
 
#define SUNI1x10GEXP_BITMSK_MDO_OD_ENB   0x0040
 
#define SUNI1x10GEXP_BITMSK_MDI_INV   0x0020
 
#define SUNI1x10GEXP_BITMSK_MDI_SEL   0x0010
 
#define SUNI1x10GEXP_BITMSK_RXOAMEN   0x0008
 
#define SUNI1x10GEXP_BITMSK_RXOAMCLKEN   0x0004
 
#define SUNI1x10GEXP_BITMSK_TXOAMEN   0x0002
 
#define SUNI1x10GEXP_BITMSK_TXOAMCLKEN   0x0001
 
#define SUNI1x10GEXP_BITMSK_TOP_PL4IO_INT   0x8000
 
#define SUNI1x10GEXP_BITMSK_TOP_IRAM_INT   0x4000
 
#define SUNI1x10GEXP_BITMSK_TOP_ERAM_INT   0x2000
 
#define SUNI1x10GEXP_BITMSK_TOP_XAUI_INT   0x1000
 
#define SUNI1x10GEXP_BITMSK_TOP_MSTAT_INT   0x0800
 
#define SUNI1x10GEXP_BITMSK_TOP_RXXG_INT   0x0400
 
#define SUNI1x10GEXP_BITMSK_TOP_TXXG_INT   0x0200
 
#define SUNI1x10GEXP_BITMSK_TOP_XRF_INT   0x0100
 
#define SUNI1x10GEXP_BITMSK_TOP_XTEF_INT   0x0080
 
#define SUNI1x10GEXP_BITMSK_TOP_MDIO_BUSY_INT   0x0040
 
#define SUNI1x10GEXP_BITMSK_TOP_RXOAM_INT   0x0020
 
#define SUNI1x10GEXP_BITMSK_TOP_TXOAM_INT   0x0010
 
#define SUNI1x10GEXP_BITMSK_TOP_IFLX_INT   0x0008
 
#define SUNI1x10GEXP_BITMSK_TOP_EFLX_INT   0x0004
 
#define SUNI1x10GEXP_BITMSK_TOP_PL4ODP_INT   0x0002
 
#define SUNI1x10GEXP_BITMSK_TOP_PL4IDU_INT   0x0001
 
#define SUNI1x10GEXP_BITMSK_TOP_INTE   0x8000
 
#define SUNI1x10GEXP_BITMSK_RF_VAL   0x0080
 
#define SUNI1x10GEXP_BITMSK_RF_OVERRIDE   0x0040
 
#define SUNI1x10GEXP_BITMSK_LF_VAL   0x0020
 
#define SUNI1x10GEXP_BITMSK_LF_OVERRIDE   0x0010
 
#define SUNI1x10GEXP_BITMSK_LFRF_OVERRIDE_VAL   0x00F0
 
#define SUNI1x10GEXP_BITMSK_EN_IDLE_REP   0x0070
 
#define SUNI1x10GEXP_BITMSK_RXEQB   0x0FF0
 
#define SUNI1x10GEXP_BITOFF_RXEQB_3   10
 
#define SUNI1x10GEXP_BITOFF_RXEQB_2   8
 
#define SUNI1x10GEXP_BITOFF_RXEQB_1   6
 
#define SUNI1x10GEXP_BITOFF_RXEQB_0   4
 
#define SUNI1x10GEXP_BITMSK_YSEL   0x1000
 
#define SUNI1x10GEXP_BITMSK_PRE_EMPH   0x00F0
 
#define SUNI1x10GEXP_BITMSK_PRE_EMPH_3   0x0080
 
#define SUNI1x10GEXP_BITMSK_PRE_EMPH_2   0x0040
 
#define SUNI1x10GEXP_BITMSK_PRE_EMPH_1   0x0020
 
#define SUNI1x10GEXP_BITMSK_PRE_EMPH_0   0x0010
 
#define SUNI1x10GEXP_BITMSK_LASIE   0x0008
 
#define SUNI1x10GEXP_BITMSK_SPLL_RAE   0x0004
 
#define SUNI1x10GEXP_BITMSK_MPLL_RAE   0x0002
 
#define SUNI1x10GEXP_BITMSK_PLL_LOCKE   0x0001
 
#define SUNI1x10GEXP_BITMSK_LASIV   0x0008
 
#define SUNI1x10GEXP_BITMSK_SPLL_RAV   0x0004
 
#define SUNI1x10GEXP_BITMSK_MPLL_RAV   0x0002
 
#define SUNI1x10GEXP_BITMSK_PLL_LOCKV   0x0001
 
#define SUNI1x10GEXP_BITMSK_LASII   0x0008
 
#define SUNI1x10GEXP_BITMSK_SPLL_RAI   0x0004
 
#define SUNI1x10GEXP_BITMSK_MPLL_RAI   0x0002
 
#define SUNI1x10GEXP_BITMSK_PLL_LOCKI   0x0001
 
#define SUNI1x10GEXP_BITMSK_DUALTX   0x1000
 
#define SUNI1x10GEXP_BITMSK_HC   0x0600
 
#define SUNI1x10GEXP_BITOFF_HC_0   9
 
#define SUNI1x10GEXP_BITMSK_RXXG_RXEN   0x8000
 
#define SUNI1x10GEXP_BITMSK_RXXG_ROCF   0x4000
 
#define SUNI1x10GEXP_BITMSK_RXXG_PAD_STRIP   0x2000
 
#define SUNI1x10GEXP_BITMSK_RXXG_PUREP   0x0400
 
#define SUNI1x10GEXP_BITMSK_RXXG_LONGP   0x0200
 
#define SUNI1x10GEXP_BITMSK_RXXG_PARF   0x0100
 
#define SUNI1x10GEXP_BITMSK_RXXG_FLCHK   0x0080
 
#define SUNI1x10GEXP_BITMSK_RXXG_PASS_CTRL   0x0020
 
#define SUNI1x10GEXP_BITMSK_RXXG_CRC_STRIP   0x0008
 
#define SUNI1x10GEXP_BITMSK_RXXG_HDRSIZE   0x00FF
 
#define SUNI1x10GEXP_BITMSK_RXXG_MIN_LERRE   0x8000
 
#define SUNI1x10GEXP_BITMSK_RXXG_MAX_LERRE   0x4000
 
#define SUNI1x10GEXP_BITMSK_RXXG_LINE_ERRE   0x1000
 
#define SUNI1x10GEXP_BITMSK_RXXG_RX_OVRE   0x0400
 
#define SUNI1x10GEXP_BITMSK_RXXG_ADR_FILTERE   0x0200
 
#define SUNI1x10GEXP_BITMSK_RXXG_ERR_FILTERRE   0x0100
 
#define SUNI1x10GEXP_BITMSK_RXXG_PRMB_ERRE   0x0020
 
#define SUNI1x10GEXP_BITMSK_RXXG_MIN_LERRI   0x8000
 
#define SUNI1x10GEXP_BITMSK_RXXG_MAX_LERRI   0x4000
 
#define SUNI1x10GEXP_BITMSK_RXXG_LINE_ERRI   0x1000
 
#define SUNI1x10GEXP_BITMSK_RXXG_RX_OVRI   0x0400
 
#define SUNI1x10GEXP_BITMSK_RXXG_ADR_FILTERI   0x0200
 
#define SUNI1x10GEXP_BITMSK_RXXG_ERR_FILTERI   0x0100
 
#define SUNI1x10GEXP_BITMSK_RXXG_PRMB_ERRE   0x0020
 
#define SUNI1x10GEXP_BITMSK_RXXG_CUT_THRU   0x0007
 
#define SUNI1x10GEXP_BITOFF_RXXG_CUT_THRU   0
 
#define SUNI1x10GEXP_BITMSK_RXXG_VID_MATCH   0x0FFF
 
#define SUNI1x10GEXP_BITOFF_RXXG_VID_MATCH   0
 
#define SUNI1x10GEXP_BITMSK_RXXG_FORWARD_ENABLE   0x0008
 
#define SUNI1x10GEXP_BITMSK_RXXG_VLAN_ENABLE   0x0004
 
#define SUNI1x10GEXP_BITMSK_RXXG_SRC_ADDR   0x0002
 
#define SUNI1x10GEXP_BITMSK_RXXG_MATCH_ENABLE   0x0001
 
#define SUNI1x10GEXP_BITMSK_RXXG_PMODE   0x0002
 
#define SUNI1x10GEXP_BITMSK_RXXG_MHASH_EN   0x0001
 
#define SUNI1x10GEXP_BITMSK_EN_PKT_GEN   0x0040
 
#define SUNI1x10GEXP_BITMSK_PATT   0x001C
 
#define SUNI1x10GEXP_BITOFF_PATT   2
 
#define SUNI1x10GEXP_BITMSK_LANE_HICERE   0x1E00
 
#define SUNI1x10GEXP_BITOFF_LANE_HICERE   9
 
#define SUNI1x10GEXP_BITMSK_HS_SD_LANEE   0x01E0
 
#define SUNI1x10GEXP_BITOFF_HS_SD_LANEE   5
 
#define SUNI1x10GEXP_BITMSK_ALIGN_STATUS_ERRE   0x0010
 
#define SUNI1x10GEXP_BITMSK_LANE_SYNC_STAT_ERRE   0x000F
 
#define SUNI1x10GEXP_BITOFF_LANE_SYNC_STAT_ERRE   0
 
#define SUNI1x10GEXP_BITMSK_LANE_HICERI   0x1E00
 
#define SUNI1x10GEXP_BITOFF_LANE_HICERI   9
 
#define SUNI1x10GEXP_BITMSK_HS_SD_LANEI   0x01E0
 
#define SUNI1x10GEXP_BITOFF_HS_SD_LANEI   5
 
#define SUNI1x10GEXP_BITMSK_ALIGN_STATUS_ERRI   0x0010
 
#define SUNI1x10GEXP_BITMSK_LANE_SYNC_STAT_ERRI   0x000F
 
#define SUNI1x10GEXP_BITOFF_LANE_SYNC_STAT_ERRI   0
 
#define SUNI1x10GEXP_BITMSK_HS_SD_LANE3   0x0100
 
#define SUNI1x10GEXP_BITMSK_HS_SD_LANE2   0x0080
 
#define SUNI1x10GEXP_BITMSK_HS_SD_LANE1   0x0040
 
#define SUNI1x10GEXP_BITMSK_HS_SD_LANE0   0x0020
 
#define SUNI1x10GEXP_BITMSK_ALIGN_STATUS_ERR   0x0010
 
#define SUNI1x10GEXP_BITMSK_LANE3_SYNC_STAT_ERR   0x0008
 
#define SUNI1x10GEXP_BITMSK_LANE2_SYNC_STAT_ERR   0x0004
 
#define SUNI1x10GEXP_BITMSK_LANE1_SYNC_STAT_ERR   0x0002
 
#define SUNI1x10GEXP_BITMSK_LANE0_SYNC_STAT_ERR   0x0001
 
#define SUNI1x10GEXP_BITMSK_LANE_OVERRUNE   0x00F0
 
#define SUNI1x10GEXP_BITOFF_LANE_OVERRUNE   4
 
#define SUNI1x10GEXP_BITMSK_LANE_UNDERRUNE   0x000F
 
#define SUNI1x10GEXP_BITOFF_LANE_UNDERRUNE   0
 
#define SUNI1x10GEXP_BITMSK_LANE_OVERRUNI   0x00F0
 
#define SUNI1x10GEXP_BITOFF_LANE_OVERRUNI   4
 
#define SUNI1x10GEXP_BITMSK_LANE_UNDERRUNI   0x000F
 
#define SUNI1x10GEXP_BITOFF_LANE_UNDERRUNI   0
 
#define SUNI1x10GEXP_BITMSK_RXOAM_BUSY   0x8000
 
#define SUNI1x10GEXP_BITMSK_RXOAM_F2_SEL   0x7000
 
#define SUNI1x10GEXP_BITOFF_RXOAM_F2_SEL   12
 
#define SUNI1x10GEXP_BITMSK_RXOAM_F1_SEL   0x0700
 
#define SUNI1x10GEXP_BITOFF_RXOAM_F1_SEL   8
 
#define SUNI1x10GEXP_BITMSK_RXOAM_FILTER_CTRL   0x00C0
 
#define SUNI1x10GEXP_BITOFF_RXOAM_FILTER_CTRL   6
 
#define SUNI1x10GEXP_BITMSK_RXOAM_PX_EN   0x003F
 
#define SUNI1x10GEXP_BITOFF_RXOAM_PX_EN   0
 
#define SUNI1x10GEXP_BITMSK_RXOAM_FX_MASK   0xFF00
 
#define SUNI1x10GEXP_BITOFF_RXOAM_FX_MASK   8
 
#define SUNI1x10GEXP_BITMSK_RXOAM_FX_VAL   0x00FF
 
#define SUNI1x10GEXP_BITOFF_RXOAM_FX_VAl   0
 
#define SUNI1x10GEXP_BITMSK_RXOAM_REC_BYTE_VAL   0x2000
 
#define SUNI1x10GEXP_BITMSK_RXOAM_BYPASS_MODE   0x0C00
 
#define SUNI1x10GEXP_BITOFF_RXOAM_BYPASS_MODE   10
 
#define SUNI1x10GEXP_BITMSK_RXOAM_PX_CLEAR   0x003F
 
#define SUNI1x10GEXP_BITOFF_RXOAM_PX_CLEAR   0
 
#define SUNI1x10GEXP_BITMSK_RXOAM_COSET   0xFF00
 
#define SUNI1x10GEXP_BITOFF_RXOAM_COSET   8
 
#define SUNI1x10GEXP_BITMSK_RXOAM_HEC_ERR_PKT   0x0004
 
#define SUNI1x10GEXP_BITMSK_RXOAM_HEC_EN   0x0001
 
#define SUNI1x10GEXP_BITMSK_RXOAM_FILTER_THRSHE   0x0400
 
#define SUNI1x10GEXP_BITMSK_RXOAM_OAM_ERRE   0x0200
 
#define SUNI1x10GEXP_BITMSK_RXOAM_HECE_THRSHE   0x0100
 
#define SUNI1x10GEXP_BITMSK_RXOAM_SOPE   0x0080
 
#define SUNI1x10GEXP_BITMSK_RXOAM_RFE   0x0040
 
#define SUNI1x10GEXP_BITMSK_RXOAM_LFE   0x0020
 
#define SUNI1x10GEXP_BITMSK_RXOAM_DV_ERRE   0x0010
 
#define SUNI1x10GEXP_BITMSK_RXOAM_DATA_INVALIDE   0x0008
 
#define SUNI1x10GEXP_BITMSK_RXOAM_FILTER_DROPE   0x0004
 
#define SUNI1x10GEXP_BITMSK_RXOAM_HECE   0x0002
 
#define SUNI1x10GEXP_BITMSK_RXOAM_OFLE   0x0001
 
#define SUNI1x10GEXP_BITMSK_RXOAM_FILTER_THRSHI   0x0400
 
#define SUNI1x10GEXP_BITMSK_RXOAM_OAM_ERRI   0x0200
 
#define SUNI1x10GEXP_BITMSK_RXOAM_HECE_THRSHI   0x0100
 
#define SUNI1x10GEXP_BITMSK_RXOAM_SOPI   0x0080
 
#define SUNI1x10GEXP_BITMSK_RXOAM_RFI   0x0040
 
#define SUNI1x10GEXP_BITMSK_RXOAM_LFI   0x0020
 
#define SUNI1x10GEXP_BITMSK_RXOAM_DV_ERRI   0x0010
 
#define SUNI1x10GEXP_BITMSK_RXOAM_DATA_INVALIDI   0x0008
 
#define SUNI1x10GEXP_BITMSK_RXOAM_FILTER_DROPI   0x0004
 
#define SUNI1x10GEXP_BITMSK_RXOAM_HECI   0x0002
 
#define SUNI1x10GEXP_BITMSK_RXOAM_OFLI   0x0001
 
#define SUNI1x10GEXP_BITMSK_RXOAM_FILTER_THRSHV   0x0400
 
#define SUNI1x10GEXP_BITMSK_RXOAM_HECE_THRSHV   0x0100
 
#define SUNI1x10GEXP_BITMSK_RXOAM_RFV   0x0040
 
#define SUNI1x10GEXP_BITMSK_RXOAM_LFV   0x0020
 
#define SUNI1x10GEXP_BITMSK_MSTAT_WRITE   0x0004
 
#define SUNI1x10GEXP_BITMSK_MSTAT_CLEAR   0x0002
 
#define SUNI1x10GEXP_BITMSK_MSTAT_SNAP   0x0001
 
#define SUNI1x10GEXP_BITMSK_MSTAT_WRITE_ADDRESS   0x003F
 
#define SUNI1x10GEXP_BITOFF_MSTAT_WRITE_ADDRESS   0
 
#define SUNI1x10GEXP_BITMSK_IFLX_IRCU_ENABLE   0x8000
 
#define SUNI1x10GEXP_BITMSK_IFLX_IDSWT_ENABLE   0x4000
 
#define SUNI1x10GEXP_BITMSK_IFLX_IFD_CNT   0x3FFF
 
#define SUNI1x10GEXP_BITOFF_IFLX_IFD_CNT   0
 
#define SUNI1x10GEXP_BITMSK_IFLX_OVFE   0x0001
 
#define SUNI1x10GEXP_BITMSK_IFLX_OVFI   0x0001
 
#define SUNI1x10GEXP_BITMSK_IFLX_BUSY   0x8000
 
#define SUNI1x10GEXP_BITMSK_IFLX_RWB   0x4000
 
#define SUNI1x10GEXP_BITMSK_IFLX_LOLIM   0x03FF
 
#define SUNI1x10GEXP_BITOFF_IFLX_LOLIM   0
 
#define SUNI1x10GEXP_BITMSK_IFLX_HILIM   0x03FF
 
#define SUNI1x10GEXP_BITOFF_IFLX_HILIM   0
 
#define SUNI1x10GEXP_BITMSK_IFLX_FULL   0x8000
 
#define SUNI1x10GEXP_BITMSK_IFLX_AFULL   0x4000
 
#define SUNI1x10GEXP_BITMSK_IFLX_AFTH   0x3FFF
 
#define SUNI1x10GEXP_BITOFF_IFLX_AFTH   0
 
#define SUNI1x10GEXP_BITMSK_IFLX_EMPTY   0x8000
 
#define SUNI1x10GEXP_BITMSK_IFLX_AEMPTY   0x4000
 
#define SUNI1x10GEXP_BITMSK_IFLX_AETH   0x3FFF
 
#define SUNI1x10GEXP_BITOFF_IFLX_AETH   0
 
#define SUNI1x10GEXP_BITMSK_PL4MOS_RE_INIT   0x0008
 
#define SUNI1x10GEXP_BITMSK_PL4MOS_EN   0x0004
 
#define SUNI1x10GEXP_BITMSK_PL4MOS_NO_STATUS   0x0002
 
#define SUNI1x10GEXP_BITMSK_PL4MOS_MAX_BURST1   0x0FFF
 
#define SUNI1x10GEXP_BITOFF_PL4MOS_MAX_BURST1   0
 
#define SUNI1x10GEXP_BITMSK_PL4MOS_MAX_BURST2   0x0FFF
 
#define SUNI1x10GEXP_BITOFF_PL4MOS_MAX_BURST2   0
 
#define SUNI1x10GEXP_BITMSK_PL4MOS_MAX_TRANSFER   0x00FF
 
#define SUNI1x10GEXP_BITOFF_PL4MOS_MAX_TRANSFER   0
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_REPEAT_T   0xF000
 
#define SUNI1x10GEXP_BITOFF_PL4ODP_REPEAT_T   12
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_SOP_RULE   0x0100
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_EN_PORTS   0x0002
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_EN_DFWD   0x0001
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_OUT_DISE   0x0001
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_EOPEOBE   0x0080
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_ERREOPE   0x0040
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_MEOPE   0x0008
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_MSOPE   0x0004
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_ES_OVRE   0x0002
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_OUT_DISI   0x0001
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_EOPEOBI   0x0080
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_ERREOPI   0x0040
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_MEOPI   0x0008
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_MSOPI   0x0004
 
#define SUNI1x10GEXP_BITMSK_PL4ODP_ES_OVRI   0x0002
 
#define SUNI1x10GEXP_BITMSK_PL4IO_OUT_ROOLV   0x8000
 
#define SUNI1x10GEXP_BITMSK_PL4IO_IS_ROOLV   0x1000
 
#define SUNI1x10GEXP_BITMSK_PL4IO_DIP2_ERRV   0x0800
 
#define SUNI1x10GEXP_BITMSK_PL4IO_ID_ROOLV   0x0100
 
#define SUNI1x10GEXP_BITMSK_PL4IO_IS_DOOLV   0x0010
 
#define SUNI1x10GEXP_BITMSK_PL4IO_ID_DOOLV   0x0001
 
#define SUNI1x10GEXP_BITMSK_PL4IO_OUT_ROOLI   0x8000
 
#define SUNI1x10GEXP_BITMSK_PL4IO_IS_ROOLI   0x1000
 
#define SUNI1x10GEXP_BITMSK_PL4IO_DIP2_ERRI   0x0800
 
#define SUNI1x10GEXP_BITMSK_PL4IO_ID_ROOLI   0x0100
 
#define SUNI1x10GEXP_BITMSK_PL4IO_IS_DOOLI   0x0010
 
#define SUNI1x10GEXP_BITMSK_PL4IO_ID_DOOLI   0x0001
 
#define SUNI1x10GEXP_BITMSK_PL4IO_OUT_ROOLE   0x8000
 
#define SUNI1x10GEXP_BITMSK_PL4IO_IS_ROOLE   0x1000
 
#define SUNI1x10GEXP_BITMSK_PL4IO_DIP2_ERRE   0x0800
 
#define SUNI1x10GEXP_BITMSK_PL4IO_ID_ROOLE   0x0100
 
#define SUNI1x10GEXP_BITMSK_PL4IO_IS_DOOLE   0x0010
 
#define SUNI1x10GEXP_BITMSK_PL4IO_ID_DOOLE   0x0001
 
#define SUNI1x10GEXP_BITMSK_PL4IO_REF_LIMIT   0xFF00
 
#define SUNI1x10GEXP_BITOFF_PL4IO_REF_LIMIT   8
 
#define SUNI1x10GEXP_BITMSK_PL4IO_TRAN_LIMIT   0x00FF
 
#define SUNI1x10GEXP_BITOFF_PL4IO_TRAN_LIMIT   0
 
#define SUNI1x10GEXP_BITMSK_PL4IO_IN_MUL   0xFF00
 
#define SUNI1x10GEXP_BITOFF_PL4IO_IN_MUL   8
 
#define SUNI1x10GEXP_BITMSK_PL4IO_OUT_MUL   0x00FF
 
#define SUNI1x10GEXP_BITOFF_PL4IO_OUT_MUL   0
 
#define SUNI1x10GEXP_BITMSK_PL4IO_DIP2_ERR_CHK   0x8000
 
#define SUNI1x10GEXP_BITMSK_PL4IO_ODAT_DIS   0x0800
 
#define SUNI1x10GEXP_BITMSK_PL4IO_TRAIN_DIS   0x0400
 
#define SUNI1x10GEXP_BITMSK_PL4IO_OSTAT_DIS   0x0200
 
#define SUNI1x10GEXP_BITMSK_PL4IO_ISTAT_DIS   0x0100
 
#define SUNI1x10GEXP_BITMSK_PL4IO_NO_ISTAT   0x0080
 
#define SUNI1x10GEXP_BITMSK_PL4IO_STAT_OUTSEL   0x0040
 
#define SUNI1x10GEXP_BITMSK_PL4IO_INSEL   0x0020
 
#define SUNI1x10GEXP_BITMSK_PL4IO_DLSEL   0x0010
 
#define SUNI1x10GEXP_BITMSK_PL4IO_OUTSEL   0x0003
 
#define SUNI1x10GEXP_BITOFF_PL4IO_OUTSEL   0
 
#define SUNI1x10GEXP_BITMSK_TXXG_TXEN0   0x8000
 
#define SUNI1x10GEXP_BITMSK_TXXG_HOSTPAUSE   0x2000
 
#define SUNI1x10GEXP_BITMSK_TXXG_IPGT   0x1F80
 
#define SUNI1x10GEXP_BITOFF_TXXG_IPGT   7
 
#define SUNI1x10GEXP_BITMSK_TXXG_32BIT_ALIGN   0x0020
 
#define SUNI1x10GEXP_BITMSK_TXXG_CRCEN   0x0010
 
#define SUNI1x10GEXP_BITMSK_TXXG_FCTX   0x0008
 
#define SUNI1x10GEXP_BITMSK_TXXG_FCRX   0x0004
 
#define SUNI1x10GEXP_BITMSK_TXXG_PADEN   0x0002
 
#define SUNI1x10GEXP_BITMSK_TXXG_SPRE   0x0001
 
#define SUNI1x10GEXP_BITMSK_TXXG_HDRSIZE   0x00FF
 
#define SUNI1x10GEXP_BITMSK_TXXG_FIFO_ERRE   0x8000
 
#define SUNI1x10GEXP_BITMSK_TXXG_FIFO_UDRE   0x4000
 
#define SUNI1x10GEXP_BITMSK_TXXG_MAX_LERRE   0x2000
 
#define SUNI1x10GEXP_BITMSK_TXXG_MIN_LERRE   0x1000
 
#define SUNI1x10GEXP_BITMSK_TXXG_XFERE   0x0800
 
#define SUNI1x10GEXP_BITMSK_TXXG_FIFO_ERRI   0x8000
 
#define SUNI1x10GEXP_BITMSK_TXXG_FIFO_UDRI   0x4000
 
#define SUNI1x10GEXP_BITMSK_TXXG_MAX_LERRI   0x2000
 
#define SUNI1x10GEXP_BITMSK_TXXG_MIN_LERRI   0x1000
 
#define SUNI1x10GEXP_BITMSK_TXXG_XFERI   0x0800
 
#define SUNI1x10GEXP_BITMSK_TXXG_TXACTIVE   0x0002
 
#define SUNI1x10GEXP_BITMSK_TXXG_PAUSED   0x0001
 
#define SUNI1x10GEXP_BITMSK_TXXG_TX_MINFR   0x00FF
 
#define SUNI1x10GEXP_BITOFF_TXXG_TX_MINFR   0
 
#define SUNI1x10GEXP_BITMSK_TXXG_FC_PAUSE_QNTM   0x00FF
 
#define SUNI1x10GEXP_BITOFF_TXXG_FC_PAUSE_QNTM   0
 
#define SUNI1x10GEXP_BITMSK_XTEF_FORCE_PARITY_ERR   0x000F
 
#define SUNI1x10GEXP_BITOFF_XTEF_FORCE_PARITY_ERR   0
 
#define SUNI1x10GEXP_BITMSK_XTEF_LOST_SYNCI   0x0001
 
#define SUNI1x10GEXP_BITMSK_XTEF_LOST_SYNCE   0x0001
 
#define SUNI1x10GEXP_BITMSK_XTEF_LOST_SYNCV   0x0001
 
#define SUNI1x10GEXP_BITMSK_TXOAM_HEC_EN   0x8000
 
#define SUNI1x10GEXP_BITMSK_TXOAM_EMPTYCODE_EN   0x4000
 
#define SUNI1x10GEXP_BITMSK_TXOAM_FORCE_IDLE   0x2000
 
#define SUNI1x10GEXP_BITMSK_TXOAM_IGNORE_IDLE   0x1000
 
#define SUNI1x10GEXP_BITMSK_TXOAM_PX_OVERWRITE   0x0FC0
 
#define SUNI1x10GEXP_BITOFF_TXOAM_PX_OVERWRITE   6
 
#define SUNI1x10GEXP_BITMSK_TXOAM_PX_SEL   0x003F
 
#define SUNI1x10GEXP_BITOFF_TXOAM_PX_SEL   0
 
#define SUNI1x10GEXP_BITMSK_TXOAM_MINIDIS   0x8000
 
#define SUNI1x10GEXP_BITMSK_TXOAM_BUSY   0x4000
 
#define SUNI1x10GEXP_BITMSK_TXOAM_TRANS_EN   0x2000
 
#define SUNI1x10GEXP_BITMSK_TXOAM_MINIRATE   0x07FF
 
#define SUNI1x10GEXP_BITMSK_TXOAM_FTHRESH   0x3C00
 
#define SUNI1x10GEXP_BITOFF_TXOAM_FTHRESH   10
 
#define SUNI1x10GEXP_BITMSK_TXOAM_MINIPOST   0x03C0
 
#define SUNI1x10GEXP_BITOFF_TXOAM_MINIPOST   6
 
#define SUNI1x10GEXP_BITMSK_TXOAM_MINIPRE   0x003F
 
#define SUNI1x10GEXP_BITMSK_TXOAM_SOP_ERRE   0x0004
 
#define SUNI1x10GEXP_BITMSK_TXOAM_OFLE   0x0002
 
#define SUNI1x10GEXP_BITMSK_TXOAM_ERRE   0x0001
 
#define SUNI1x10GEXP_BITMSK_TXOAM_SOP_ERRI   0x0004
 
#define SUNI1x10GEXP_BITMSK_TXOAM_OFLI   0x0002
 
#define SUNI1x10GEXP_BITMSK_TXOAM_ERRI   0x0001
 
#define SUNI1x10GEXP_BITMSK_TXOAM_COSET   0x00FF
 
#define SUNI1x10GEXP_BITMSK_EFLX_ERCU_EN   0x8000
 
#define SUNI1x10GEXP_BITMSK_EFLX_EN_EDSWT   0x0080
 
#define SUNI1x10GEXP_BITMSK_EFLX_OVF_ERR   0x2000
 
#define SUNI1x10GEXP_BITMSK_EFLX_BUSY   0x8000
 
#define SUNI1x10GEXP_BITMSK_EFLX_RDWRB   0x4000
 
#define SUNI1x10GEXP_BITMSK_EFLX_LOLIM   0x03FF
 
#define SUNI1x10GEXP_BITOFF_EFLX_LOLIM   0
 
#define SUNI1x10GEXP_BITMSK_EFLX_HILIM   0x03FF
 
#define SUNI1x10GEXP_BITOFF_EFLX_HILIM   0
 
#define SUNI1x10GEXP_BITMSK_EFLX_FULL   0x8000
 
#define SUNI1x10GEXP_BITMSK_EFLX_AFULL   0x4000
 
#define SUNI1x10GEXP_BITMSK_EFLX_AFTH   0x3FFF
 
#define SUNI1x10GEXP_BITOFF_EFLX_AFTH   0
 
#define SUNI1x10GEXP_BITMSK_EFLX_EMPTY   0x8000
 
#define SUNI1x10GEXP_BITMSK_EFLX_AEMPTY   0x4000
 
#define SUNI1x10GEXP_BITMSK_EFLX_AETH   0x3FFF
 
#define SUNI1x10GEXP_BITOFF_EFLX_AETH   0
 
#define SUNI1x10GEXP_BITMSK_EFLX_CUT_THRU   0x3FFF
 
#define SUNI1x10GEXP_BITOFF_EFLX_CUT_THRU   0
 
#define SUNI1x10GEXP_BITMSK_EFLX_OVFE   0x0001
 
#define SUNI1x10GEXP_BITMSK_EFLX_OVFI   0x0001
 
#define SUNI1x10GEXP_BITMSK_EFLX_PROV   0x0001
 
#define SUNI1x10GEXP_BITMSK_PL4IDU_SYNCH_ON_TRAIN   0x0004
 
#define SUNI1x10GEXP_BITMSK_PL4IDU_EN_PORTS   0x0002
 
#define SUNI1x10GEXP_BITMSK_PL4IDU_EN_DFWD   0x0001
 
#define SUNI1x10GEXP_BITMSK_PL4IDU_DIP4E   0x0002
 
#define SUNI1x10GEXP_BITMSK_PL4IDU_DIP4I   0x0002
 

Macro Definition Documentation

#define mSUNI1x10GEXP_CLR_MSBITS_1 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_15)

Definition at line 534 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_10 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_6)

Definition at line 543 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_11 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_5)

Definition at line 544 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_12 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_4)

Definition at line 545 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_13 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_3)

Definition at line 546 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_14 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_2)

Definition at line 547 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_15 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_1)

Definition at line 548 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_2 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_14)

Definition at line 535 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_3 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_13)

Definition at line 536 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_4 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_12)

Definition at line 537 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_5 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_11)

Definition at line 538 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_6 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_10)

Definition at line 539 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_7 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_9)

Definition at line 540 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_8 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_8)

Definition at line 541 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_CLR_MSBITS_9 (   v)    ((v) & SUNI1x10GEXP_BITMSK_BITS_7)

Definition at line 542 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_GET_BIT (   val,
  bitMsk 
)    (((val)&(bitMsk)) ? 1:0)

Definition at line 550 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_MAC_FILTER_OFFSET (   filterId)    ( (filterId) * SUNI1x10GEXP_REG_SIZEOF_MAC_FILTER )

Definition at line 41 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_MAC_VID_FILTER_OFFSET (   filterId)    ( (filterId) * SUNI1x10GEXP_REG_SIZEOF_MAC_VID_FILTER )

Definition at line 49 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_MSTAT_COUNT_OFFSET (   countId)    ( (countId) * SUNI1x10GEXP_REG_SIZEOF_MSTAT_COUNT )

Definition at line 56 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_REG_MSTAT_COUNTER_HIGH (   countId)    (0x2112 + mSUNI1x10GEXP_MSTAT_COUNT_OFFSET(countId))

Definition at line 200 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_REG_MSTAT_COUNTER_LOW (   countId)    (0x2110 + mSUNI1x10GEXP_MSTAT_COUNT_OFFSET(countId))

Definition at line 198 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_REG_MSTAT_COUNTER_MID (   countId)    (0x2111 + mSUNI1x10GEXP_MSTAT_COUNT_OFFSET(countId))

Definition at line 199 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_HIGH (   filterId)    (0x204C + mSUNI1x10GEXP_MAC_FILTER_OFFSET(filterId))

Definition at line 107 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_LOW (   filterId)    (0x204A + mSUNI1x10GEXP_MAC_FILTER_OFFSET(filterId))

Definition at line 105 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_MID (   filterId)    (0x204B + mSUNI1x10GEXP_MAC_FILTER_OFFSET(filterId))

Definition at line 106 of file suni1x10gexp_regs.h.

#define mSUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID (   filterId)    (0x2062 + mSUNI1x10GEXP_MAC_VID_FILTER_OFFSET(filterId))

Definition at line 108 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_ALIGN_STATUS_ERR   0x0010

Definition at line 977 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_ALIGN_STATUS_ERRE   0x0010

Definition at line 948 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_ALIGN_STATUS_ERRI   0x0010

Definition at line 963 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_1   0x00001

SUNI-1x10GE-XP REGISTER BIT MASKS

Definition at line 517 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_10   0x003ff

Definition at line 526 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_11   0x007ff

Definition at line 527 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_12   0x00fff

Definition at line 528 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_13   0x01fff

Definition at line 529 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_14   0x03fff

Definition at line 530 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_15   0x07fff

Definition at line 531 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_16   0x0ffff

Definition at line 532 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_2   0x00003

Definition at line 518 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_3   0x00007

Definition at line 519 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_4   0x0000f

Definition at line 520 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_5   0x0001f

Definition at line 521 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_6   0x0003f

Definition at line 522 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_7   0x0007f

Definition at line 523 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_8   0x000ff

Definition at line 524 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_BITS_9   0x001ff

Definition at line 525 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_CSUCLKA   0x0008

Definition at line 635 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_DRESETB   0x0001

Definition at line 568 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_DUALTX   0x1000

Definition at line 825 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_AEMPTY   0x4000

Definition at line 1592 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_AETH   0x3FFF

Definition at line 1593 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_AFTH   0x3FFF

Definition at line 1582 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_AFULL   0x4000

Definition at line 1581 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_BUSY   0x8000

Definition at line 1559 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_CUT_THRU   0x3FFF

Definition at line 1599 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_EMPTY   0x8000

Definition at line 1591 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_EN_EDSWT   0x0080

Definition at line 1546 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_ERCU_EN   0x8000

Definition at line 1545 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_FULL   0x8000

Definition at line 1580 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_HILIM   0x03FF

Definition at line 1571 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_LOLIM   0x03FF

Definition at line 1565 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_OVF_ERR   0x2000

Definition at line 1552 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_OVFE   0x0001

Definition at line 1606 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_OVFI   0x0001

Definition at line 1612 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_PROV   0x0001

Definition at line 1618 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EFLX_RDWRB   0x4000

Definition at line 1560 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EN_IDLE_REP   0x0070

Definition at line 753 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_EN_PKT_GEN   0x0040

Definition at line 933 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_HC   0x0600

Definition at line 826 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_HS_SD_LANE0   0x0020

Definition at line 976 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_HS_SD_LANE1   0x0040

Definition at line 975 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_HS_SD_LANE2   0x0080

Definition at line 974 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_HS_SD_LANE3   0x0100

Definition at line 973 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_HS_SD_LANEE   0x01E0

Definition at line 946 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_HS_SD_LANEI   0x01E0

Definition at line 961 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_AEMPTY   0x4000

Definition at line 1198 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_AETH   0x3FFF

Definition at line 1199 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_AFTH   0x3FFF

Definition at line 1188 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_AFULL   0x4000

Definition at line 1187 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_BUSY   0x8000

Definition at line 1163 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_EMPTY   0x8000

Definition at line 1197 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_FULL   0x8000

Definition at line 1186 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_HILIM   0x03FF

Definition at line 1177 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_IDSWT_ENABLE   0x4000

Definition at line 1142 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_IFD_CNT   0x3FFF

Definition at line 1143 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_IRCU_ENABLE   0x8000

Definition at line 1141 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_LOLIM   0x03FF

Definition at line 1170 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_OVFE   0x0001

Definition at line 1150 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_OVFI   0x0001

Definition at line 1156 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_IFLX_RWB   0x4000

Definition at line 1164 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LANE0_SYNC_STAT_ERR   0x0001

Definition at line 981 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LANE1_SYNC_STAT_ERR   0x0002

Definition at line 980 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LANE2_SYNC_STAT_ERR   0x0004

Definition at line 979 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LANE3_SYNC_STAT_ERR   0x0008

Definition at line 978 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LANE_HICERE   0x1E00

Definition at line 944 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LANE_HICERI   0x1E00

Definition at line 959 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LANE_OVERRUNE   0x00F0

Definition at line 988 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LANE_OVERRUNI   0x00F0

Definition at line 998 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LANE_SYNC_STAT_ERRE   0x000F

Definition at line 949 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LANE_SYNC_STAT_ERRI   0x000F

Definition at line 964 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LANE_UNDERRUNE   0x000F

Definition at line 990 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LANE_UNDERRUNI   0x000F

Definition at line 1000 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LASIE   0x0008

Definition at line 790 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LASII   0x0008

Definition at line 814 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LASIV   0x0008

Definition at line 802 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LF_OVERRIDE   0x0010

Definition at line 746 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LF_VAL   0x0020

Definition at line 745 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LFRF_OVERRIDE_VAL   0x00F0

Definition at line 747 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LINEPCSLB   0x0100

Definition at line 584 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_LOS_INV   0x0002

Definition at line 589 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MDI_INV   0x0020

Definition at line 687 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MDI_SEL   0x0010

Definition at line 688 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MDIO_BUSY_EN   0x0001

Definition at line 658 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MDIO_BUSYI   0x0001

Definition at line 664 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MDIO_DEVADR   0x1F00

Definition at line 671 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MDIO_LCTLA   0x0002

Definition at line 651 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MDIO_LCTLD   0x0004

Definition at line 650 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MDIO_PRTADR   0x001F

Definition at line 673 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MDIO_RDINC   0x0010

Definition at line 648 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MDIO_RSTAT   0x0008

Definition at line 649 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MDIO_SPRE   0x0001

Definition at line 652 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MDO_OD_ENB   0x0040

Definition at line 686 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MPLL_RAE   0x0002

Definition at line 792 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MPLL_RAI   0x0002

Definition at line 816 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MPLL_RAV   0x0002

Definition at line 804 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MSTAT_BYPASS   0x0080

Definition at line 585 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MSTAT_CLEAR   0x0002

Definition at line 1125 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MSTAT_SNAP   0x0001

Definition at line 1126 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MSTAT_WRITE   0x0004

Definition at line 1124 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_MSTAT_WRITE_ADDRESS   0x003F

Definition at line 1132 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_OVERRIDE_LOS   0x0001

Definition at line 590 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PATT   0x001C

Definition at line 934 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4_ARESET   0x0002

Definition at line 567 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IDU_DIP4E   0x0002

Definition at line 1634 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IDU_DIP4I   0x0002

Definition at line 1640 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IDU_EN_DFWD   0x0001

Definition at line 1628 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IDU_EN_PORTS   0x0002

Definition at line 1627 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IDU_SYNCH_ON_TRAIN   0x0004

Definition at line 1626 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_DIP2_ERR_CHK   0x8000

Definition at line 1356 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_DIP2_ERRE   0x0800

Definition at line 1318 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_DIP2_ERRI   0x0800

Definition at line 1302 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_DIP2_ERRV   0x0800

Definition at line 1286 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_DLSEL   0x0010

Definition at line 1364 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_ID_DOOLE   0x0001

Definition at line 1321 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_ID_DOOLI   0x0001

Definition at line 1305 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_ID_DOOLV   0x0001

Definition at line 1289 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_ID_ROOLE   0x0100

Definition at line 1319 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_ID_ROOLI   0x0100

Definition at line 1303 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_ID_ROOLV   0x0100

Definition at line 1287 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_IN_MUL   0xFF00

Definition at line 1338 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_INSEL   0x0020

Definition at line 1363 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_IS_DOOLE   0x0010

Definition at line 1320 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_IS_DOOLI   0x0010

Definition at line 1304 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_IS_DOOLV   0x0010

Definition at line 1288 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_IS_ROOLE   0x1000

Definition at line 1317 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_IS_ROOLI   0x1000

Definition at line 1301 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_IS_ROOLV   0x1000

Definition at line 1285 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_ISTAT_DIS   0x0100

Definition at line 1360 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_NO_ISTAT   0x0080

Definition at line 1361 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_ODAT_DIS   0x0800

Definition at line 1357 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_OSTAT_DIS   0x0200

Definition at line 1359 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_OUT_MUL   0x00FF

Definition at line 1340 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_OUT_ROOLE   0x8000

Definition at line 1316 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_OUT_ROOLI   0x8000

Definition at line 1300 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_OUT_ROOLV   0x8000

Definition at line 1284 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_OUTCLKSEL   0x0800

Definition at line 582 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_OUTSEL   0x0003

Definition at line 1365 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_REF_LIMIT   0xFF00

Definition at line 1328 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_STAT_OUTSEL   0x0040

Definition at line 1362 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_TRAIN_DIS   0x0400

Definition at line 1358 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4IO_TRAN_LIMIT   0x00FF

Definition at line 1330 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4MOS_EN   0x0004

Definition at line 1209 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4MOS_MAX_BURST1   0x0FFF

Definition at line 1216 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4MOS_MAX_BURST2   0x0FFF

Definition at line 1223 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4MOS_MAX_TRANSFER   0x00FF

Definition at line 1230 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4MOS_NO_STATUS   0x0002

Definition at line 1210 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4MOS_RE_INIT   0x0008

Definition at line 1208 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_EN_DFWD   0x0001

Definition at line 1244 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_EN_PORTS   0x0002

Definition at line 1243 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_ES_OVRE   0x0002

Definition at line 1258 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_ES_OVRI   0x0002

Definition at line 1273 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_OUT_DISE   0x0001

Definition at line 1250 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_OUT_DISI   0x0001

Definition at line 1265 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_EOPEOBE   0x0080

Definition at line 1254 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_EOPEOBI   0x0080

Definition at line 1269 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_ERREOPE   0x0040

Definition at line 1255 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_ERREOPI   0x0040

Definition at line 1270 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_MEOPE   0x0008

Definition at line 1256 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_MEOPI   0x0008

Definition at line 1271 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_MSOPE   0x0004

Definition at line 1257 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_PPE_MSOPI   0x0004

Definition at line 1272 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_REPEAT_T   0xF000

Definition at line 1240 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PL4ODP_SOP_RULE   0x0100

Definition at line 1242 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PLL_LOCKE   0x0001

Definition at line 793 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PLL_LOCKI   0x0001

Definition at line 817 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PLL_LOCKV   0x0001

Definition at line 805 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PRE_EMPH   0x00F0

Definition at line 777 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PRE_EMPH_0   0x0010

Definition at line 781 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PRE_EMPH_1   0x0020

Definition at line 780 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PRE_EMPH_2   0x0040

Definition at line 779 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_PRE_EMPH_3   0x0080

Definition at line 778 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RDCLKA   0x0001

Definition at line 638 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_REVISION   0x000F

Definition at line 558 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RF_OVERRIDE   0x0040

Definition at line 744 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RF_VAL   0x0080

Definition at line 743 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RSCLKA   0x0002

Definition at line 637 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXEQB   0x0FF0

Definition at line 762 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXLANE0CLKA   0x0010

Definition at line 634 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXLANE1CLKA   0x0020

Definition at line 633 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXLANE2CLKA   0x0040

Definition at line 632 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXLANE3CLKA   0x0080

Definition at line 631 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_BUSY   0x8000

Definition at line 1011 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_BYPASS_MODE   0x0C00

Definition at line 1038 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_COSET   0xFF00

Definition at line 1049 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_DATA_INVALIDE   0x0008

Definition at line 1075 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_DATA_INVALIDI   0x0008

Definition at line 1101 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_DV_ERRE   0x0010

Definition at line 1074 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_DV_ERRI   0x0010

Definition at line 1100 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_F1_SEL   0x0700

Definition at line 1014 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_F2_SEL   0x7000

Definition at line 1012 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_FILTER_CTRL   0x00C0

Definition at line 1016 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_FILTER_DROPE   0x0004

Definition at line 1076 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_FILTER_DROPI   0x0004

Definition at line 1102 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_FILTER_THRSHE   0x0400

Definition at line 1068 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_FILTER_THRSHI   0x0400

Definition at line 1094 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_FILTER_THRSHV   0x0400

Definition at line 1113 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_FX_MASK   0xFF00

Definition at line 1026 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_FX_VAL   0x00FF

Definition at line 1028 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_HEC_EN   0x0001

Definition at line 1052 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_HEC_ERR_PKT   0x0004

Definition at line 1051 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_HECE   0x0002

Definition at line 1077 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_HECE_THRSHE   0x0100

Definition at line 1070 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_HECE_THRSHI   0x0100

Definition at line 1096 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_HECE_THRSHV   0x0100

Definition at line 1114 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_HECI   0x0002

Definition at line 1103 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_LFE   0x0020

Definition at line 1073 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_LFI   0x0020

Definition at line 1099 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_LFV   0x0020

Definition at line 1116 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_OAM_ERRE   0x0200

Definition at line 1069 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_OAM_ERRI   0x0200

Definition at line 1095 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_OFLE   0x0001

Definition at line 1078 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_OFLI   0x0001

Definition at line 1104 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_PX_CLEAR   0x003F

Definition at line 1040 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_PX_EN   0x003F

Definition at line 1018 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_REC_BYTE_VAL   0x2000

Definition at line 1037 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_RFE   0x0040

Definition at line 1072 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_RFI   0x0040

Definition at line 1098 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_RFV   0x0040

Definition at line 1115 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_SOPE   0x0080

Definition at line 1071 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAM_SOPI   0x0080

Definition at line 1097 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAMCLKEN   0x0004

Definition at line 690 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXOAMEN   0x0008

Definition at line 689 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_ADR_FILTERE   0x0200

Definition at line 872 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_ADR_FILTERI   0x0200

Definition at line 890 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_BYPASS   0x0040

Definition at line 586 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_CRC_STRIP   0x0008

Definition at line 850 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_CUT_THRU   0x0007

Definition at line 898 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_ERR_FILTERI   0x0100

Definition at line 891 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_ERR_FILTERRE   0x0100

Definition at line 873 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_FLCHK   0x0080

Definition at line 848 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_FORWARD_ENABLE   0x0008

Definition at line 915 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_HDRSIZE   0x00FF

Definition at line 856 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_LINE_ERRE   0x1000

Definition at line 870 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_LINE_ERRI   0x1000

Definition at line 888 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_LONGP   0x0200

Definition at line 846 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_MATCH_ENABLE   0x0001

Definition at line 918 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_MAX_LERRE   0x4000

Definition at line 869 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_MAX_LERRI   0x4000

Definition at line 887 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_MHASH_EN   0x0001

Definition at line 926 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_MIN_LERRE   0x8000

Definition at line 868 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_MIN_LERRI   0x8000

Definition at line 886 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_PAD_STRIP   0x2000

Definition at line 844 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_PARF   0x0100

Definition at line 847 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_PASS_CTRL   0x0020

Definition at line 849 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_PMODE   0x0002

Definition at line 925 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_PRMB_ERRE   0x0020

Definition at line 892 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_PRMB_ERRE   0x0020

Definition at line 892 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_PUREP   0x0400

Definition at line 845 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_ROCF   0x4000

Definition at line 843 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_RX_OVRE   0x0400

Definition at line 871 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_RX_OVRI   0x0400

Definition at line 889 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_RXEN   0x8000

Definition at line 842 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_SRC_ADDR   0x0002

Definition at line 917 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_VID_MATCH   0x0FFF

Definition at line 905 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_RXXG_VLAN_ENABLE   0x0004

Definition at line 916 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_SOP_PAD_EN   0x0010

Definition at line 588 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_SPLL_RAE   0x0004

Definition at line 791 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_SPLL_RAI   0x0004

Definition at line 815 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_SPLL_RAV   0x0004

Definition at line 803 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_SYSPCSLB   0x0200

Definition at line 583 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TDCLKA   0x0004

Definition at line 636 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TIP   0x8000

Definition at line 629 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_DTRB   0x0080

Definition at line 607 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_EFLX_INT   0x0004

Definition at line 726 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_ERAM_INT   0x2000

Definition at line 715 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_EXPIRED   0x0040

Definition at line 608 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_IFLX_INT   0x0008

Definition at line 725 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_INTE   0x8000

Definition at line 734 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_IRAM_INT   0x4000

Definition at line 714 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_MDIO_BUSY   0x0100

Definition at line 606 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_MDIO_BUSY_INT   0x0040

Definition at line 722 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_MSTAT_INT   0x0800

Definition at line 717 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_PAUSED   0x0020

Definition at line 609 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_PL4_ID_DOOL   0x0010

Definition at line 610 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_PL4_ID_ROOL   0x0004

Definition at line 612 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_PL4_IS_DOOL   0x0008

Definition at line 611 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_PL4_IS_ROOL   0x0002

Definition at line 613 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_PL4_OUT_ROOL   0x0001

Definition at line 614 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_PL4IDU_INT   0x0001

Definition at line 728 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_PL4IO_INT   0x8000

Definition at line 713 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_PL4ODP_INT   0x0002

Definition at line 727 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_RXOAM_INT   0x0020

Definition at line 723 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_RXXG_INT   0x0400

Definition at line 718 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_SXRA_EXPIRED   0x0200

Definition at line 605 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_TXOAM_INT   0x0010

Definition at line 724 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_TXXG_INT   0x0200

Definition at line 719 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_XAUI_INT   0x1000

Definition at line 716 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_XRF_INT   0x0100

Definition at line 720 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TOP_XTEF_INT   0x0080

Definition at line 721 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_BUSY   0x4000

Definition at line 1498 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_COSET   0x00FF

Definition at line 1538 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_EMPTYCODE_EN   0x4000

Definition at line 1482 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_ERRE   0x0001

Definition at line 1522 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_ERRI   0x0001

Definition at line 1532 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_FORCE_IDLE   0x2000

Definition at line 1483 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_FTHRESH   0x3C00

Definition at line 1508 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_HEC_EN   0x8000

Definition at line 1481 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_IGNORE_IDLE   0x1000

Definition at line 1484 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_MINIDIS   0x8000

Definition at line 1497 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_MINIPOST   0x03C0

Definition at line 1510 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_MINIPRE   0x003F

Definition at line 1512 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_MINIRATE   0x07FF

Definition at line 1500 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_OFLE   0x0002

Definition at line 1521 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_OFLI   0x0002

Definition at line 1531 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_PX_OVERWRITE   0x0FC0

Definition at line 1485 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_PX_SEL   0x003F

Definition at line 1487 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_SOP_ERRE   0x0004

Definition at line 1520 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_SOP_ERRI   0x0004

Definition at line 1530 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAM_TRANS_EN   0x2000

Definition at line 1499 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAMCLKEN   0x0001

Definition at line 692 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXOAMEN   0x0002

Definition at line 691 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_32BIT_ALIGN   0x0020

Definition at line 1384 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_BYPASS   0x0020

Definition at line 587 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_CRCEN   0x0010

Definition at line 1385 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_FC_PAUSE_QNTM   0x00FF

Definition at line 1444 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_FCRX   0x0004

Definition at line 1387 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_FCTX   0x0008

Definition at line 1386 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_FIFO_ERRE   0x8000

Definition at line 1405 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_FIFO_ERRI   0x8000

Definition at line 1419 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_FIFO_UDRE   0x4000

Definition at line 1406 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_FIFO_UDRI   0x4000

Definition at line 1420 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_HDRSIZE   0x00FF

Definition at line 1395 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_HOSTPAUSE   0x2000

Definition at line 1381 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_IPGT   0x1F80

Definition at line 1382 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_MAX_LERRE   0x2000

Definition at line 1407 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_MAX_LERRI   0x2000

Definition at line 1421 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_MIN_LERRE   0x1000

Definition at line 1408 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_MIN_LERRI   0x1000

Definition at line 1422 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_PADEN   0x0002

Definition at line 1388 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_PAUSED   0x0001

Definition at line 1431 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_SPRE   0x0001

Definition at line 1389 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_TX_MINFR   0x00FF

Definition at line 1437 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_TXACTIVE   0x0002

Definition at line 1430 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_TXEN0   0x8000

Definition at line 1380 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_XFERE   0x0800

Definition at line 1409 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_TXXG_XFERI   0x0800

Definition at line 1423 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_XAUI_ARESET   0x0004

Definition at line 566 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_XAUI_REF_CLKA   0x0100

Definition at line 630 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_XTEF_FORCE_PARITY_ERR   0x000F

Definition at line 1451 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_XTEF_LOST_SYNCE   0x0001

Definition at line 1464 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_XTEF_LOST_SYNCI   0x0001

Definition at line 1458 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_XTEF_LOST_SYNCV   0x0001

Definition at line 1470 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITMSK_YSEL   0x1000

Definition at line 776 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_EFLX_AETH   0

Definition at line 1594 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_EFLX_AFTH   0

Definition at line 1583 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_EFLX_CUT_THRU   0

Definition at line 1600 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_EFLX_HILIM   0

Definition at line 1572 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_EFLX_LOLIM   0

Definition at line 1566 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_HC_0   9

Definition at line 827 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_HS_SD_LANEE   5

Definition at line 947 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_HS_SD_LANEI   5

Definition at line 962 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_IFLX_AETH   0

Definition at line 1200 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_IFLX_AFTH   0

Definition at line 1189 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_IFLX_HILIM   0

Definition at line 1178 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_IFLX_IFD_CNT   0

Definition at line 1144 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_IFLX_LOLIM   0

Definition at line 1171 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_LANE_HICERE   9

Definition at line 945 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_LANE_HICERI   9

Definition at line 960 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_LANE_OVERRUNE   4

Definition at line 989 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_LANE_OVERRUNI   4

Definition at line 999 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_LANE_SYNC_STAT_ERRE   0

Definition at line 950 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_LANE_SYNC_STAT_ERRI   0

Definition at line 965 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_LANE_UNDERRUNE   0

Definition at line 991 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_LANE_UNDERRUNI   0

Definition at line 1001 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_MDIO_DEVADR   8

Definition at line 672 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_MDIO_PRTADR   0

Definition at line 674 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_MSTAT_WRITE_ADDRESS   0

Definition at line 1133 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_PATT   2

Definition at line 935 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_PL4IO_IN_MUL   8

Definition at line 1339 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_PL4IO_OUT_MUL   0

Definition at line 1341 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_PL4IO_OUTSEL   0

Definition at line 1366 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_PL4IO_REF_LIMIT   8

Definition at line 1329 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_PL4IO_TRAN_LIMIT   0

Definition at line 1331 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_PL4MOS_MAX_BURST1   0

Definition at line 1217 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_PL4MOS_MAX_BURST2   0

Definition at line 1224 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_PL4MOS_MAX_TRANSFER   0

Definition at line 1231 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_PL4ODP_REPEAT_T   12

Definition at line 1241 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXEQB_0   4

Definition at line 766 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXEQB_1   6

Definition at line 765 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXEQB_2   8

Definition at line 764 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXEQB_3   10

Definition at line 763 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXOAM_BYPASS_MODE   10

Definition at line 1039 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXOAM_COSET   8

Definition at line 1050 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXOAM_F1_SEL   8

Definition at line 1015 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXOAM_F2_SEL   12

Definition at line 1013 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXOAM_FILTER_CTRL   6

Definition at line 1017 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXOAM_FX_MASK   8

Definition at line 1027 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXOAM_FX_VAl   0

Definition at line 1029 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXOAM_PX_CLEAR   0

Definition at line 1041 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXOAM_PX_EN   0

Definition at line 1019 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXXG_CUT_THRU   0

Definition at line 899 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_RXXG_VID_MATCH   0

Definition at line 906 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_TXOAM_FTHRESH   10

Definition at line 1509 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_TXOAM_MINIPOST   6

Definition at line 1511 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_TXOAM_PX_OVERWRITE   6

Definition at line 1486 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_TXOAM_PX_SEL   0

Definition at line 1488 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_TXXG_FC_PAUSE_QNTM   0

Definition at line 1445 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_TXXG_IPGT   7

Definition at line 1383 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_TXXG_TX_MINFR   0

Definition at line 1438 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_BITOFF_XTEF_FORCE_PARITY_ERR   0

Definition at line 1452 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_CNTR_MAC_ETHERNET_NUM   51

Definition at line 416 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_CONFIG_AND_RESET_CONTROL   0x0002

Definition at line 69 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_DEVICE_STATUS   0x0004

Definition at line 71 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_EFLX_CHANNEL_PROVISION   0x3210

Definition at line 499 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_EFLX_ERCU_GLOBAL_STATUS   0x3201

Definition at line 490 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_EFLX_FIFO_OVERFLOW_ERROR_ENABLE   0x320C

Definition at line 497 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_EFLX_FIFO_OVERFLOW_ERROR_INDICATION   0x320D

Definition at line 498 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_EFLX_GLOBAL_CONFIG   0x3200

Definition at line 489 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_EFLX_INDIR_CHANNEL_ADDRESS   0x3202

Definition at line 491 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_EFLX_INDIR_EMPTY_ALMOST_EMPTY_STATUS_AND_LIMIT   0x3206

Definition at line 495 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_EFLX_INDIR_FIFO_CUT_THROUGH_THRESHOLD   0x3207

Definition at line 496 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_EFLX_INDIR_FIFO_HIGH_LIMIT   0x3204

Definition at line 493 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_EFLX_INDIR_FIFO_LOW_LIMIT   0x3203

Definition at line 492 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_EFLX_INDIR_FULL_ALMOST_FULL_STATUS_AND_LIMIT   0x3205

Definition at line 494 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_FREE   0x000F

Definition at line 84 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_GLOBAL_INTERRUPT_ENABLE   0x000E

Definition at line 83 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_GLOBAL_PERFORMANCE_MONITOR_UPDATE   0x0005

Definition at line 72 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_IDENTIFICATION   0x0000

S/UNI-1x10GE-XP REGISTER ADDRESS MAP

Definition at line 67 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_IFLX_CHANNEL_PROVISION   0x2201

Definition at line 419 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_IFLX_FIFO_OVERFLOW_ENABLE   0x2209

Definition at line 420 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_IFLX_FIFO_OVERFLOW_INTERRUPT   0x220A

Definition at line 421 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_IFLX_GLOBAL_CONFIG   0x2200

Definition at line 418 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_IFLX_INDIR_CHANNEL_ADDRESS   0x220D

Definition at line 422 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_IFLX_INDIR_EMPTY_ALMOST_EMPTY_STATUS_LIMIT   0x2211

Definition at line 426 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_IFLX_INDIR_FULL_ALMOST_FULL_STATUS_LIMIT   0x2210

Definition at line 425 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_IFLX_INDIR_LOGICAL_FIFO_HIGH_LIMIT   0x220F

Definition at line 424 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_IFLX_INDIR_LOGICAL_FIFO_LOW_LIMIT_PROVISION   0x220E

Definition at line 423 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_LOOPBACK_MISC_CTRL   0x0003

Definition at line 70 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MASTER_INTERRUPT_STATUS   0x000D

Definition at line 82 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MAX_OFFSET   0x3480

Definition at line 507 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MDIO_COMMAND   0x0006

Definition at line 74 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MDIO_INTERRUPT_ENABLE   0x0007

Definition at line 75 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MDIO_INTERRUPT_STATUS   0x0008

Definition at line 76 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MDIO_READ_STATUS_DATA   0x000B

Definition at line 79 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MMD_CONTROL_ADDRESS_DATA   0x000A

Definition at line 78 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MMD_PHY_ADDRESS   0x0009

Definition at line 77 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_CONTROL   0x2100

Definition at line 185 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_0_HIGH   0x2112

Definition at line 203 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_0_LOW   0x2110

Definition at line 201 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_0_MID   0x2111

Definition at line 202 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_0_RESVD   0x2113

Definition at line 204 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_10_HIGH   0x213A

Definition at line 243 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_10_LOW   0x2138

Definition at line 241 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_10_MID   0x2139

Definition at line 242 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_10_RESVD   0x213B

Definition at line 244 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_11_HIGH   0x213E

Definition at line 247 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_11_LOW   0x213C

Definition at line 245 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_11_MID   0x213D

Definition at line 246 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_11_RESVD   0x213F

Definition at line 248 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_12_HIGH   0x2142

Definition at line 251 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_12_LOW   0x2140

Definition at line 249 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_12_MID   0x2141

Definition at line 250 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_12_RESVD   0x2143

Definition at line 252 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_13_HIGH   0x2146

Definition at line 255 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_13_LOW   0x2144

Definition at line 253 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_13_MID   0x2145

Definition at line 254 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_13_RESVD   0x2147

Definition at line 256 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_14_HIGH   0x214A

Definition at line 259 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_14_LOW   0x2148

Definition at line 257 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_14_MID   0x2149

Definition at line 258 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_14_RESVD   0x214B

Definition at line 260 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_15_HIGH   0x214E

Definition at line 263 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_15_LOW   0x214C

Definition at line 261 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_15_MID   0x214D

Definition at line 262 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_15_RESVD   0x214F

Definition at line 264 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_16_HIGH   0x2152

Definition at line 267 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_16_LOW   0x2150

Definition at line 265 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_16_MID   0x2151

Definition at line 266 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_16_RESVD   0x2153

Definition at line 268 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_17_HIGH   0x2156

Definition at line 271 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_17_LOW   0x2154

Definition at line 269 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_17_MID   0x2155

Definition at line 270 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_17_RESVD   0x2157

Definition at line 272 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_18_HIGH   0x215A

Definition at line 275 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_18_LOW   0x2158

Definition at line 273 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_18_MID   0x2159

Definition at line 274 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_18_RESVD   0x215B

Definition at line 276 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_19_HIGH   0x215E

Definition at line 279 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_19_LOW   0x215C

Definition at line 277 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_19_MID   0x215D

Definition at line 278 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_19_RESVD   0x215F

Definition at line 280 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_1_HIGH   0x2116

Definition at line 207 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_1_LOW   0x2114

Definition at line 205 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_1_MID   0x2115

Definition at line 206 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_1_RESVD   0x2117

Definition at line 208 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_20_HIGH   0x2162

Definition at line 283 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_20_LOW   0x2160

Definition at line 281 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_20_MID   0x2161

Definition at line 282 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_20_RESVD   0x2163

Definition at line 284 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_21_HIGH   0x2166

Definition at line 287 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_21_LOW   0x2164

Definition at line 285 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_21_MID   0x2165

Definition at line 286 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_21_RESVD   0x2167

Definition at line 288 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_22_HIGH   0x216A

Definition at line 291 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_22_LOW   0x2168

Definition at line 289 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_22_MID   0x2169

Definition at line 290 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_22_RESVD   0x216B

Definition at line 292 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_23_HIGH   0x216E

Definition at line 295 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_23_LOW   0x216C

Definition at line 293 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_23_MID   0x216D

Definition at line 294 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_23_RESVD   0x216F

Definition at line 296 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_24_HIGH   0x2172

Definition at line 299 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_24_LOW   0x2170

Definition at line 297 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_24_MID   0x2171

Definition at line 298 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_24_RESVD   0x2173

Definition at line 300 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_25_HIGH   0x2176

Definition at line 303 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_25_LOW   0x2174

Definition at line 301 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_25_MID   0x2175

Definition at line 302 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_25_RESVD   0x2177

Definition at line 304 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_26_HIGH   0x217a

Definition at line 307 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_26_LOW   0x2178

Definition at line 305 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_26_MID   0x2179

Definition at line 306 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_26_RESVD   0x217b

Definition at line 308 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_27_HIGH   0x217e

Definition at line 311 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_27_LOW   0x217c

Definition at line 309 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_27_MID   0x217d

Definition at line 310 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_27_RESVD   0x217f

Definition at line 312 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_28_HIGH   0x2182

Definition at line 315 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_28_LOW   0x2180

Definition at line 313 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_28_MID   0x2181

Definition at line 314 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_28_RESVD   0x2183

Definition at line 316 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_29_HIGH   0x2186

Definition at line 319 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_29_LOW   0x2184

Definition at line 317 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_29_MID   0x2185

Definition at line 318 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_29_RESVD   0x2187

Definition at line 320 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_2_HIGH   0x211A

Definition at line 211 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_2_LOW   0x2118

Definition at line 209 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_2_MID   0x2119

Definition at line 210 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_2_RESVD   0x211B

Definition at line 212 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_30_HIGH   0x218A

Definition at line 323 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_30_LOW   0x2188

Definition at line 321 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_30_MID   0x2189

Definition at line 322 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_30_RESVD   0x218B

Definition at line 324 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_31_HIGH   0x218E

Definition at line 327 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_31_LOW   0x218C

Definition at line 325 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_31_MID   0x218D

Definition at line 326 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_31_RESVD   0x218F

Definition at line 328 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_32_HIGH   0x2192

Definition at line 331 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_32_LOW   0x2190

Definition at line 329 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_32_MID   0x2191

Definition at line 330 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_32_RESVD   0x2193

Definition at line 332 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_33_HIGH   0x2196

Definition at line 335 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_33_LOW   0x2194

Definition at line 333 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_33_MID   0x2195

Definition at line 334 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_33_RESVD   0x2197

Definition at line 336 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_34_HIGH   0x219A

Definition at line 339 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_34_LOW   0x2198

Definition at line 337 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_34_MID   0x2199

Definition at line 338 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_34_RESVD   0x219B

Definition at line 340 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_35_HIGH   0x219E

Definition at line 343 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_35_LOW   0x219C

Definition at line 341 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_35_MID   0x219D

Definition at line 342 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_35_RESVD   0x219F

Definition at line 344 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_36_HIGH   0x21A2

Definition at line 347 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_36_LOW   0x21A0

Definition at line 345 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_36_MID   0x21A1

Definition at line 346 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_36_RESVD   0x21A3

Definition at line 348 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_37_HIGH   0x21A6

Definition at line 351 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_37_LOW   0x21A4

Definition at line 349 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_37_MID   0x21A5

Definition at line 350 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_37_RESVD   0x21A7

Definition at line 352 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_38_HIGH   0x21AA

Definition at line 355 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_38_LOW   0x21A8

Definition at line 353 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_38_MID   0x21A9

Definition at line 354 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_38_RESVD   0x21AB

Definition at line 356 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_39_HIGH   0x21AE

Definition at line 359 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_39_LOW   0x21AC

Definition at line 357 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_39_MID   0x21AD

Definition at line 358 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_39_RESVD   0x21AF

Definition at line 360 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_3_HIGH   0x211E

Definition at line 215 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_3_LOW   0x211C

Definition at line 213 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_3_MID   0x211D

Definition at line 214 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_3_RESVD   0x211F

Definition at line 216 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_40_HIGH   0x21B2

Definition at line 363 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_40_LOW   0x21B0

Definition at line 361 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_40_MID   0x21B1

Definition at line 362 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_40_RESVD   0x21B3

Definition at line 364 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_41_HIGH   0x21B6

Definition at line 367 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_41_LOW   0x21B4

Definition at line 365 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_41_MID   0x21B5

Definition at line 366 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_41_RESVD   0x21B7

Definition at line 368 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_42_HIGH   0x21BA

Definition at line 371 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_42_LOW   0x21B8

Definition at line 369 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_42_MID   0x21B9

Definition at line 370 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_42_RESVD   0x21BB

Definition at line 372 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_43_HIGH   0x21BE

Definition at line 375 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_43_LOW   0x21BC

Definition at line 373 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_43_MID   0x21BD

Definition at line 374 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_43_RESVD   0x21BF

Definition at line 376 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_44_HIGH   0x21C2

Definition at line 379 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_44_LOW   0x21C0

Definition at line 377 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_44_MID   0x21C1

Definition at line 378 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_44_RESVD   0x21C3

Definition at line 380 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_45_HIGH   0x21C6

Definition at line 383 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_45_LOW   0x21C4

Definition at line 381 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_45_MID   0x21C5

Definition at line 382 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_45_RESVD   0x21C7

Definition at line 384 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_46_HIGH   0x21CA

Definition at line 387 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_46_LOW   0x21C8

Definition at line 385 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_46_MID   0x21C9

Definition at line 386 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_46_RESVD   0x21CB

Definition at line 388 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_47_HIGH   0x21CE

Definition at line 391 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_47_LOW   0x21CC

Definition at line 389 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_47_MID   0x21CD

Definition at line 390 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_47_RESVD   0x21CF

Definition at line 392 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_48_HIGH   0x21D2

Definition at line 395 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_48_LOW   0x21D0

Definition at line 393 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_48_MID   0x21D1

Definition at line 394 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_48_RESVD   0x21D3

Definition at line 396 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_49_HIGH   0x21D6

Definition at line 399 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_49_LOW   0x21D4

Definition at line 397 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_49_MID   0x21D5

Definition at line 398 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_49_RESVD   0x21D7

Definition at line 400 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_4_HIGH   0x2122

Definition at line 219 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_4_LOW   0x2120

Definition at line 217 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_4_MID   0x2121

Definition at line 218 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_4_RESVD   0x2123

Definition at line 220 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_50_HIGH   0x21DA

Definition at line 403 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_50_LOW   0x21D8

Definition at line 401 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_50_MID   0x21D9

Definition at line 402 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_50_RESVD   0x21DB

Definition at line 404 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_51_HIGH   0x21DE

Definition at line 407 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_51_LOW   0x21DC

Definition at line 405 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_51_MID   0x21DD

Definition at line 406 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_51_RESVD   0x21DF

Definition at line 408 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_52_HIGH   0x21E2

Definition at line 411 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_52_LOW   0x21E0

Definition at line 409 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_52_MID   0x21E1

Definition at line 410 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_52_RESVD   0x21E3

Definition at line 412 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_53_HIGH   0x21E6

Definition at line 415 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_53_LOW   0x21E4

Definition at line 413 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_53_MID   0x21E5

Definition at line 414 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_5_HIGH   0x2126

Definition at line 223 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_5_LOW   0x2124

Definition at line 221 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_5_MID   0x2125

Definition at line 222 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_5_RESVD   0x2127

Definition at line 224 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_6_HIGH   0x212A

Definition at line 227 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_6_LOW   0x2128

Definition at line 225 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_6_MID   0x2129

Definition at line 226 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_6_RESVD   0x212B

Definition at line 228 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_7_HIGH   0x212E

Definition at line 231 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_7_LOW   0x212C

Definition at line 229 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_7_MID   0x212D

Definition at line 230 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_7_RESVD   0x212F

Definition at line 232 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_8_HIGH   0x2132

Definition at line 235 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_8_LOW   0x2130

Definition at line 233 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_8_MID   0x2131

Definition at line 234 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_8_RESVD   0x2133

Definition at line 236 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_9_HIGH   0x2136

Definition at line 239 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_9_LOW   0x2134

Definition at line 237 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_9_MID   0x2135

Definition at line 238 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_9_RESVD   0x2137

Definition at line 240 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_ROLLOVER_0   0x2101

Definition at line 186 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_ROLLOVER_1   0x2102

Definition at line 187 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_ROLLOVER_2   0x2103

Definition at line 188 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_ROLLOVER_3   0x2104

Definition at line 189 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_WRITE_ADDRESS   0x2109

Definition at line 194 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_WRITE_DATA_HIGH   0x210C

Definition at line 197 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_WRITE_DATA_LOW   0x210A

Definition at line 195 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_COUNTER_WRITE_DATA_MIDDLE   0x210B

Definition at line 196 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_0   0x2105

Definition at line 190 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_1   0x2106

Definition at line 191 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_2   0x2107

Definition at line 192 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_3   0x2108

Definition at line 193 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_OAM_INTF_CTRL   0x000C

Definition at line 81 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4IDU_CONFIG   0x3280

Definition at line 501 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4IDU_INTERRUPT   0x3283

Definition at line 503 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4IDU_INTERRUPT_MASK   0x3282

Definition at line 502 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4IO_CALENDAR_REPETITIONS   0x2304

Definition at line 444 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4IO_CONFIG   0x2305

Definition at line 445 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_CHANGE   0x2301

Definition at line 441 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_LIMITS   0x2303

Definition at line 443 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_MASK   0x2302

Definition at line 442 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_STATUS   0x2300

Definition at line 440 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4MOS_CONFIG   0x2240

Definition at line 428 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4MOS_FAIRNESS_MASKING   0x2242

Definition at line 430 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4MOS_MASK   0x2241

Definition at line 429 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4MOS_MAXBURST1   0x2243

Definition at line 431 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4MOS_MAXBURST2   0x2244

Definition at line 432 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4MOS_TRANSFER_SIZE   0x2245

Definition at line 433 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4ODP_CONFIG   0x2280

Definition at line 435 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4ODP_CONFIG_MAX_T   0x2284

Definition at line 438 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4ODP_INTERRUPT   0x2283

Definition at line 437 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PL4ODP_INTERRUPT_MASK   0x2282

Definition at line 436 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_PRODUCT_REVISION   0x0001

Definition at line 68 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_CONFIG   0x20C0

Definition at line 161 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_CONFIG_2   0x20C3

Definition at line 164 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_FIFO_OVERFLOW_COUNT   0x20CB

Definition at line 171 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_FILTER_1_CONFIG   0x20C1

Definition at line 162 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_FILTER_1_MISMATCH_COUNT_LSB   0x20CE

Definition at line 174 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_FILTER_1_MISMATCH_COUNT_MSB   0x20CF

Definition at line 175 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_FILTER_2_CONFIG   0x20C2

Definition at line 163 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_FILTER_2_MISMATCH_COUNT_LSB   0x20D0

Definition at line 176 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_FILTER_2_MISMATCH_COUNT_MSB   0x20D1

Definition at line 177 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_FILTER_MISMATCH_COUNT_LSB   0x20CC

Definition at line 172 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_FILTER_MISMATCH_COUNT_MSB   0x20CD

Definition at line 173 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_FILTER_MISMATCH_THRES_LSB   0x20D6

Definition at line 182 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_FILTER_MISMATCH_THRES_MSB   0x20D7

Definition at line 183 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_HEC_CONFIG   0x20C4

Definition at line 165 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_HEC_ERR_COUNT   0x20CA

Definition at line 170 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_HEC_ERR_THRES   0x20C5

Definition at line 166 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_INTERRUPT_ENABLE   0x20C7

Definition at line 167 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_INTERRUPT_STATUS   0x20C8

Definition at line 168 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_MINI_PACKET_COUNT_LSB   0x20D4

Definition at line 180 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_MINI_PACKET_COUNT_MSB   0x20D5

Definition at line 181 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_OAM_EXTRACT_COUNT_LSB   0x20D2

Definition at line 178 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_OAM_EXTRACT_COUNT_MSB   0x20D3

Definition at line 179 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXOAM_STATUS   0x20C9

Definition at line 169 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_ADDRESS_FILTER_CONTROL_0   0x206E

Definition at line 145 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_ADDRESS_FILTER_CONTROL_1   0x206F

Definition at line 146 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_ADDRESS_FILTER_CONTROL_2   0x2070

Definition at line 147 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_CONFIG_1   0x2040

Definition at line 96 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_CONFIG_2   0x2041

Definition at line 97 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_CONFIG_3   0x2042

Definition at line 98 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_0_HIGH   0x204C

Definition at line 111 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_0_LOW   0x204A

Definition at line 109 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_0_MID   0x204B

Definition at line 110 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_1_HIGH   0x204F

Definition at line 114 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_1_LOW   0x204D

Definition at line 112 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_1_MID   0x204E

Definition at line 113 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_2_HIGH   0x2052

Definition at line 117 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_2_LOW   0x2050

Definition at line 115 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_2_MID   0x2051

Definition at line 116 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_3_HIGH   0x2055

Definition at line 120 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_3_LOW   0x2053

Definition at line 118 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_3_MID   0x2054

Definition at line 119 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_4_HIGH   0x2058

Definition at line 123 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_4_LOW   0x2056

Definition at line 121 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_4_MID   0x2057

Definition at line 122 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_5_HIGH   0x205B

Definition at line 126 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_5_LOW   0x2059

Definition at line 124 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_5_MID   0x205A

Definition at line 125 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_6_HIGH   0x205E

Definition at line 129 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_6_LOW   0x205C

Definition at line 127 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_6_MID   0x205D

Definition at line 128 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_7_HIGH   0x2061

Definition at line 132 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_7_LOW   0x205F

Definition at line 130 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_ADDR_7_MID   0x2060

Definition at line 131 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_0   0x2062

Definition at line 133 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_1   0x2063

Definition at line 134 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_2   0x2064

Definition at line 135 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_3   0x2065

Definition at line 136 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_4   0x2066

Definition at line 137 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_5   0x2067

Definition at line 138 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_6   0x2068

Definition at line 139 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_EXACT_MATCH_VID_7   0x2069

Definition at line 140 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_INTERRUPT   0x2043

Definition at line 99 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_MAX_FRAME_LENGTH   0x2045

Definition at line 100 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_HIGH   0x206D

Definition at line 144 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_LOW   0x206A

Definition at line 141 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_MIDHIGH   0x206C

Definition at line 143 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_MIDLOW   0x206B

Definition at line 142 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_RECEIVE_FIFO_THRESHOLD   0x2049

Definition at line 104 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_SA_15_0   0x2046

Definition at line 101 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_SA_31_16   0x2047

Definition at line 102 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_RXXG_SA_47_32   0x2048

Definition at line 103 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_SERDES_3125_CONFIG_1   0x0100

Definition at line 89 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_SERDES_3125_CONFIG_2   0x0101

Definition at line 90 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_SERDES_3125_INTERRUPT_ENABLE   0x0102

Definition at line 91 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_SERDES_3125_INTERRUPT_STATUS   0x0104

Definition at line 93 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_SERDES_3125_INTERRUPT_VISIBLE   0x0103

Definition at line 92 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_SERDES_3125_TEST_CONFIG   0x0107

Definition at line 94 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_SIZEOF_MAC_FILTER   0x0003

Definition at line 39 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_SIZEOF_MAC_VID_FILTER   0x0001

Definition at line 47 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_SIZEOF_MSTAT_COUNT   0x0004

Definition at line 54 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_COSET   0x30CF

Definition at line 482 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_EMPTY_FIFO_INS_OP_CNT_LSB   0x30D0

Definition at line 483 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_EMPTY_FIFO_INS_OP_CNT_MSB   0x30D1

Definition at line 484 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_INSERT_COUNT_LSB   0x30C8

Definition at line 475 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_INSERT_COUNT_MSB   0x30C9

Definition at line 476 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_INTERRUPT_ENABLE   0x30C6

Definition at line 473 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_INTERRUPT_STATUS   0x30C7

Definition at line 474 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_MINI_GAP_FIFO_CONFIG   0x30C2

Definition at line 469 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_MINI_RATE_CONFIG   0x30C1

Definition at line 468 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_OAM_CONFIG   0x30C0

Definition at line 467 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_OAM_MINI_COUNT_LSB   0x30CA

Definition at line 477 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_OAM_MINI_COUNT_MSB   0x30CB

Definition at line 478 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_P1P2_MINI_MASK   0x30CC

Definition at line 479 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_P1P2_STATIC_VALUES   0x30C3

Definition at line 470 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_P3P4_MINI_MASK   0x30CD

Definition at line 480 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_P3P4_STATIC_VALUES   0x30C4

Definition at line 471 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_P5P6_MINI_MASK   0x30CE

Definition at line 481 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_P5P6_STATIC_VALUES   0x30C5

Definition at line 472 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_STATIC_VALUE_MINI_COUNT_LSB   0x30D2

Definition at line 485 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXOAM_STATIC_VALUE_MINI_COUNT_MSB   0x30D3

Definition at line 486 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_CONFIG_1   0x3040

Definition at line 447 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_CONFIG_2   0x3041

Definition at line 448 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_CONFIG_3   0x3042

Definition at line 449 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_FILTER_ERROR_COUNTER   0x3051

Definition at line 459 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_INTERRUPT   0x3043

Definition at line 450 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_MAX_FRAME_SIZE   0x3045

Definition at line 452 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_MIN_FRAME_SIZE   0x3046

Definition at line 453 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_PAUSE_QUANTUM_CONFIG   0x3052

Definition at line 460 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_PAUSE_TIMER   0x304D

Definition at line 457 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_PAUSE_TIMER_INTERVAL   0x304E

Definition at line 458 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_SA_15_0   0x3047

Definition at line 454 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_SA_31_16   0x3048

Definition at line 455 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_SA_47_32   0x3049

Definition at line 456 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_TXXG_STATUS   0x3044

Definition at line 451 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XRF_8BTB_ERR_COUNT_LANE_0   0x2084

Definition at line 150 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XRF_8BTB_ERR_COUNT_LANE_1   0x2085

Definition at line 151 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XRF_8BTB_ERR_COUNT_LANE_2   0x2086

Definition at line 152 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XRF_8BTB_ERR_COUNT_LANE_3   0x2087

Definition at line 153 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XRF_CODE_ERR_THRES   0x2092

Definition at line 159 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XRF_DIAG_INTERRUPT_ENABLE   0x208B

Definition at line 157 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XRF_DIAG_INTERRUPT_STATUS   0x208C

Definition at line 158 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XRF_ERR_STATUS   0x208A

Definition at line 156 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XRF_INTERRUPT_ENABLE   0x2088

Definition at line 154 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XRF_INTERRUPT_STATUS   0x2089

Definition at line 155 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XRF_MISC_CTRL   0x0011

Definition at line 87 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XRF_PATTERN_GEN_CTRL   0x2081

Definition at line 149 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XTEF_CTRL   0x3080

Definition at line 462 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XTEF_INTERRUPT_ENABLE   0x3085

Definition at line 464 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XTEF_INTERRUPT_STATUS   0x3084

Definition at line 463 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XTEF_MISC_CTRL   0x0010

Definition at line 86 of file suni1x10gexp_regs.h.

#define SUNI1x10GEXP_REG_XTEF_VISIBILITY   0x3086

Definition at line 465 of file suni1x10gexp_regs.h.

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