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7 volatile unsigned char data;
22 #define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2))
23 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
48 #define POINT_HIGH 0x8
49 #define RES_EXT_INT 0x10
50 #define SEND_ABORT 0x18
51 #define RES_RxINT_FC 0x20
54 #define RES_H_IUS 0x38
56 #define RES_Rx_CRC 0x40
57 #define RES_Tx_CRC 0x80
58 #define RES_EOM_L 0xC0
62 #define EXT_INT_ENAB 0x1
63 #define TxINT_ENAB 0x2
67 #define RxINT_FCERR 0x8
68 #define INT_ALL_Rx 0x10
69 #define INT_ERR_Rx 0x18
70 #define RxINT_MASK 0x18
72 #define WT_RDY_RT 0x20
73 #define WT_FN_RDYFN 0x40
74 #define WT_RDY_ENAB 0x80
81 #define SYNC_L_INH 0x2
83 #define RxCRC_ENAB 0x8
85 #define AUTO_ENAB 0x20
111 #define XCLK_MASK 0xC0
115 #define TxCRC_ENAB 0x1
124 #define TxN_MASK 0x60
132 #define AUTO_TxFLAG 1
133 #define AUTO_EOM_RST 2
136 #define nDTRnREQ 0x10
137 #define TxFIFO_LVL 0x20
138 #define EXT_RD_EN 0x40
214 #define Tx_BUF_EMP 0x4
219 #define BRK_ABRT 0x80
239 #define CHB_Tx_EMPTY 0x00
240 #define CHB_EXT_STAT 0x02
241 #define CHB_Rx_AVAIL 0x04
242 #define CHB_SPECIAL 0x06
243 #define CHA_Tx_EMPTY 0x08
244 #define CHA_EXT_STAT 0x0a
245 #define CHA_Rx_AVAIL 0x0c
246 #define CHA_SPECIAL 0x0e
247 #define STATUS_MASK 0x0e
265 #define LOOPSEND 0x10
276 #define ZS_CLEARERR(channel) do { sbus_writeb(ERR_RES, &channel->control); \
277 udelay(5); } while(0)
279 #define ZS_CLEARSTAT(channel) do { sbus_writeb(RES_EXT_INT, &channel->control); \
280 udelay(5); } while(0)
282 #define ZS_CLEARFIFO(channel) do { sbus_readb(&channel->data); \
284 sbus_readb(&channel->data); \
286 sbus_readb(&channel->data); \
287 udelay(2); } while(0)