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Data Structures | Macros | Enumerations
t4fw_ri_api.h File Reference
#include "t4fw_api.h"

Go to the source code of this file.

Data Structures

struct  fw_ri_dsge_pair
 
struct  fw_ri_dsgl
 
struct  fw_ri_sge
 
struct  fw_ri_isgl
 
struct  fw_ri_immd
 
struct  fw_ri_tpte
 
struct  fw_ri_res
 
union  fw_ri_res::fw_ri_restype
 
struct  fw_ri_res::fw_ri_restype::fw_ri_res_sqrq
 
struct  fw_ri_res::fw_ri_restype::fw_ri_res_cq
 
struct  fw_ri_res_wr
 
struct  fw_ri_rdma_write_wr
 
struct  fw_ri_send_wr
 
struct  fw_ri_rdma_read_wr
 
struct  fw_ri_recv_wr
 
struct  fw_ri_bind_mw_wr
 
struct  fw_ri_fr_nsmr_wr
 
struct  fw_ri_inv_lstag_wr
 
struct  fw_ri_wr
 
union  fw_ri_wr::fw_ri
 
struct  fw_ri_wr::fw_ri::fw_ri_init
 
union  fw_ri_wr::fw_ri::fw_ri_init::fw_ri_init_p2p
 
struct  fw_ri_wr::fw_ri::fw_ri_fini
 
struct  fw_ri_wr::fw_ri::fw_ri_terminate
 
struct  tcp_options
 
struct  cpl_pass_accept_req
 
struct  ulptx_idata
 

Macros

#define S_FW_RI_TPTE_VALID   31
 
#define M_FW_RI_TPTE_VALID   0x1
 
#define V_FW_RI_TPTE_VALID(x)   ((x) << S_FW_RI_TPTE_VALID)
 
#define G_FW_RI_TPTE_VALID(x)   (((x) >> S_FW_RI_TPTE_VALID) & M_FW_RI_TPTE_VALID)
 
#define F_FW_RI_TPTE_VALID   V_FW_RI_TPTE_VALID(1U)
 
#define S_FW_RI_TPTE_STAGKEY   23
 
#define M_FW_RI_TPTE_STAGKEY   0xff
 
#define V_FW_RI_TPTE_STAGKEY(x)   ((x) << S_FW_RI_TPTE_STAGKEY)
 
#define G_FW_RI_TPTE_STAGKEY(x)   (((x) >> S_FW_RI_TPTE_STAGKEY) & M_FW_RI_TPTE_STAGKEY)
 
#define S_FW_RI_TPTE_STAGSTATE   22
 
#define M_FW_RI_TPTE_STAGSTATE   0x1
 
#define V_FW_RI_TPTE_STAGSTATE(x)   ((x) << S_FW_RI_TPTE_STAGSTATE)
 
#define G_FW_RI_TPTE_STAGSTATE(x)   (((x) >> S_FW_RI_TPTE_STAGSTATE) & M_FW_RI_TPTE_STAGSTATE)
 
#define F_FW_RI_TPTE_STAGSTATE   V_FW_RI_TPTE_STAGSTATE(1U)
 
#define S_FW_RI_TPTE_STAGTYPE   20
 
#define M_FW_RI_TPTE_STAGTYPE   0x3
 
#define V_FW_RI_TPTE_STAGTYPE(x)   ((x) << S_FW_RI_TPTE_STAGTYPE)
 
#define G_FW_RI_TPTE_STAGTYPE(x)   (((x) >> S_FW_RI_TPTE_STAGTYPE) & M_FW_RI_TPTE_STAGTYPE)
 
#define S_FW_RI_TPTE_PDID   0
 
#define M_FW_RI_TPTE_PDID   0xfffff
 
#define V_FW_RI_TPTE_PDID(x)   ((x) << S_FW_RI_TPTE_PDID)
 
#define G_FW_RI_TPTE_PDID(x)   (((x) >> S_FW_RI_TPTE_PDID) & M_FW_RI_TPTE_PDID)
 
#define S_FW_RI_TPTE_PERM   28
 
#define M_FW_RI_TPTE_PERM   0xf
 
#define V_FW_RI_TPTE_PERM(x)   ((x) << S_FW_RI_TPTE_PERM)
 
#define G_FW_RI_TPTE_PERM(x)   (((x) >> S_FW_RI_TPTE_PERM) & M_FW_RI_TPTE_PERM)
 
#define S_FW_RI_TPTE_REMINVDIS   27
 
#define M_FW_RI_TPTE_REMINVDIS   0x1
 
#define V_FW_RI_TPTE_REMINVDIS(x)   ((x) << S_FW_RI_TPTE_REMINVDIS)
 
#define G_FW_RI_TPTE_REMINVDIS(x)   (((x) >> S_FW_RI_TPTE_REMINVDIS) & M_FW_RI_TPTE_REMINVDIS)
 
#define F_FW_RI_TPTE_REMINVDIS   V_FW_RI_TPTE_REMINVDIS(1U)
 
#define S_FW_RI_TPTE_ADDRTYPE   26
 
#define M_FW_RI_TPTE_ADDRTYPE   1
 
#define V_FW_RI_TPTE_ADDRTYPE(x)   ((x) << S_FW_RI_TPTE_ADDRTYPE)
 
#define G_FW_RI_TPTE_ADDRTYPE(x)   (((x) >> S_FW_RI_TPTE_ADDRTYPE) & M_FW_RI_TPTE_ADDRTYPE)
 
#define F_FW_RI_TPTE_ADDRTYPE   V_FW_RI_TPTE_ADDRTYPE(1U)
 
#define S_FW_RI_TPTE_MWBINDEN   25
 
#define M_FW_RI_TPTE_MWBINDEN   0x1
 
#define V_FW_RI_TPTE_MWBINDEN(x)   ((x) << S_FW_RI_TPTE_MWBINDEN)
 
#define G_FW_RI_TPTE_MWBINDEN(x)   (((x) >> S_FW_RI_TPTE_MWBINDEN) & M_FW_RI_TPTE_MWBINDEN)
 
#define F_FW_RI_TPTE_MWBINDEN   V_FW_RI_TPTE_MWBINDEN(1U)
 
#define S_FW_RI_TPTE_PS   20
 
#define M_FW_RI_TPTE_PS   0x1f
 
#define V_FW_RI_TPTE_PS(x)   ((x) << S_FW_RI_TPTE_PS)
 
#define G_FW_RI_TPTE_PS(x)   (((x) >> S_FW_RI_TPTE_PS) & M_FW_RI_TPTE_PS)
 
#define S_FW_RI_TPTE_QPID   0
 
#define M_FW_RI_TPTE_QPID   0xfffff
 
#define V_FW_RI_TPTE_QPID(x)   ((x) << S_FW_RI_TPTE_QPID)
 
#define G_FW_RI_TPTE_QPID(x)   (((x) >> S_FW_RI_TPTE_QPID) & M_FW_RI_TPTE_QPID)
 
#define S_FW_RI_TPTE_NOSNOOP   30
 
#define M_FW_RI_TPTE_NOSNOOP   0x1
 
#define V_FW_RI_TPTE_NOSNOOP(x)   ((x) << S_FW_RI_TPTE_NOSNOOP)
 
#define G_FW_RI_TPTE_NOSNOOP(x)   (((x) >> S_FW_RI_TPTE_NOSNOOP) & M_FW_RI_TPTE_NOSNOOP)
 
#define F_FW_RI_TPTE_NOSNOOP   V_FW_RI_TPTE_NOSNOOP(1U)
 
#define S_FW_RI_TPTE_PBLADDR   0
 
#define M_FW_RI_TPTE_PBLADDR   0x1fffffff
 
#define V_FW_RI_TPTE_PBLADDR(x)   ((x) << S_FW_RI_TPTE_PBLADDR)
 
#define G_FW_RI_TPTE_PBLADDR(x)   (((x) >> S_FW_RI_TPTE_PBLADDR) & M_FW_RI_TPTE_PBLADDR)
 
#define S_FW_RI_TPTE_DCA   24
 
#define M_FW_RI_TPTE_DCA   0x1f
 
#define V_FW_RI_TPTE_DCA(x)   ((x) << S_FW_RI_TPTE_DCA)
 
#define G_FW_RI_TPTE_DCA(x)   (((x) >> S_FW_RI_TPTE_DCA) & M_FW_RI_TPTE_DCA)
 
#define S_FW_RI_TPTE_MWBCNT_PSTAG   0
 
#define M_FW_RI_TPTE_MWBCNT_PSTAG   0xffffff
 
#define V_FW_RI_TPTE_MWBCNT_PSTAT(x)   ((x) << S_FW_RI_TPTE_MWBCNT_PSTAG)
 
#define G_FW_RI_TPTE_MWBCNT_PSTAG(x)   (((x) >> S_FW_RI_TPTE_MWBCNT_PSTAG) & M_FW_RI_TPTE_MWBCNT_PSTAG)
 
#define S_FW_RI_RES_WR_NRES   0
 
#define M_FW_RI_RES_WR_NRES   0xff
 
#define V_FW_RI_RES_WR_NRES(x)   ((x) << S_FW_RI_RES_WR_NRES)
 
#define G_FW_RI_RES_WR_NRES(x)   (((x) >> S_FW_RI_RES_WR_NRES) & M_FW_RI_RES_WR_NRES)
 
#define S_FW_RI_RES_WR_FETCHSZM   26
 
#define M_FW_RI_RES_WR_FETCHSZM   0x1
 
#define V_FW_RI_RES_WR_FETCHSZM(x)   ((x) << S_FW_RI_RES_WR_FETCHSZM)
 
#define G_FW_RI_RES_WR_FETCHSZM(x)   (((x) >> S_FW_RI_RES_WR_FETCHSZM) & M_FW_RI_RES_WR_FETCHSZM)
 
#define F_FW_RI_RES_WR_FETCHSZM   V_FW_RI_RES_WR_FETCHSZM(1U)
 
#define S_FW_RI_RES_WR_STATUSPGNS   25
 
#define M_FW_RI_RES_WR_STATUSPGNS   0x1
 
#define V_FW_RI_RES_WR_STATUSPGNS(x)   ((x) << S_FW_RI_RES_WR_STATUSPGNS)
 
#define G_FW_RI_RES_WR_STATUSPGNS(x)   (((x) >> S_FW_RI_RES_WR_STATUSPGNS) & M_FW_RI_RES_WR_STATUSPGNS)
 
#define F_FW_RI_RES_WR_STATUSPGNS   V_FW_RI_RES_WR_STATUSPGNS(1U)
 
#define S_FW_RI_RES_WR_STATUSPGRO   24
 
#define M_FW_RI_RES_WR_STATUSPGRO   0x1
 
#define V_FW_RI_RES_WR_STATUSPGRO(x)   ((x) << S_FW_RI_RES_WR_STATUSPGRO)
 
#define G_FW_RI_RES_WR_STATUSPGRO(x)   (((x) >> S_FW_RI_RES_WR_STATUSPGRO) & M_FW_RI_RES_WR_STATUSPGRO)
 
#define F_FW_RI_RES_WR_STATUSPGRO   V_FW_RI_RES_WR_STATUSPGRO(1U)
 
#define S_FW_RI_RES_WR_FETCHNS   23
 
#define M_FW_RI_RES_WR_FETCHNS   0x1
 
#define V_FW_RI_RES_WR_FETCHNS(x)   ((x) << S_FW_RI_RES_WR_FETCHNS)
 
#define G_FW_RI_RES_WR_FETCHNS(x)   (((x) >> S_FW_RI_RES_WR_FETCHNS) & M_FW_RI_RES_WR_FETCHNS)
 
#define F_FW_RI_RES_WR_FETCHNS   V_FW_RI_RES_WR_FETCHNS(1U)
 
#define S_FW_RI_RES_WR_FETCHRO   22
 
#define M_FW_RI_RES_WR_FETCHRO   0x1
 
#define V_FW_RI_RES_WR_FETCHRO(x)   ((x) << S_FW_RI_RES_WR_FETCHRO)
 
#define G_FW_RI_RES_WR_FETCHRO(x)   (((x) >> S_FW_RI_RES_WR_FETCHRO) & M_FW_RI_RES_WR_FETCHRO)
 
#define F_FW_RI_RES_WR_FETCHRO   V_FW_RI_RES_WR_FETCHRO(1U)
 
#define S_FW_RI_RES_WR_HOSTFCMODE   20
 
#define M_FW_RI_RES_WR_HOSTFCMODE   0x3
 
#define V_FW_RI_RES_WR_HOSTFCMODE(x)   ((x) << S_FW_RI_RES_WR_HOSTFCMODE)
 
#define G_FW_RI_RES_WR_HOSTFCMODE(x)   (((x) >> S_FW_RI_RES_WR_HOSTFCMODE) & M_FW_RI_RES_WR_HOSTFCMODE)
 
#define S_FW_RI_RES_WR_CPRIO   19
 
#define M_FW_RI_RES_WR_CPRIO   0x1
 
#define V_FW_RI_RES_WR_CPRIO(x)   ((x) << S_FW_RI_RES_WR_CPRIO)
 
#define G_FW_RI_RES_WR_CPRIO(x)   (((x) >> S_FW_RI_RES_WR_CPRIO) & M_FW_RI_RES_WR_CPRIO)
 
#define F_FW_RI_RES_WR_CPRIO   V_FW_RI_RES_WR_CPRIO(1U)
 
#define S_FW_RI_RES_WR_ONCHIP   18
 
#define M_FW_RI_RES_WR_ONCHIP   0x1
 
#define V_FW_RI_RES_WR_ONCHIP(x)   ((x) << S_FW_RI_RES_WR_ONCHIP)
 
#define G_FW_RI_RES_WR_ONCHIP(x)   (((x) >> S_FW_RI_RES_WR_ONCHIP) & M_FW_RI_RES_WR_ONCHIP)
 
#define F_FW_RI_RES_WR_ONCHIP   V_FW_RI_RES_WR_ONCHIP(1U)
 
#define S_FW_RI_RES_WR_PCIECHN   16
 
#define M_FW_RI_RES_WR_PCIECHN   0x3
 
#define V_FW_RI_RES_WR_PCIECHN(x)   ((x) << S_FW_RI_RES_WR_PCIECHN)
 
#define G_FW_RI_RES_WR_PCIECHN(x)   (((x) >> S_FW_RI_RES_WR_PCIECHN) & M_FW_RI_RES_WR_PCIECHN)
 
#define S_FW_RI_RES_WR_IQID   0
 
#define M_FW_RI_RES_WR_IQID   0xffff
 
#define V_FW_RI_RES_WR_IQID(x)   ((x) << S_FW_RI_RES_WR_IQID)
 
#define G_FW_RI_RES_WR_IQID(x)   (((x) >> S_FW_RI_RES_WR_IQID) & M_FW_RI_RES_WR_IQID)
 
#define S_FW_RI_RES_WR_DCAEN   31
 
#define M_FW_RI_RES_WR_DCAEN   0x1
 
#define V_FW_RI_RES_WR_DCAEN(x)   ((x) << S_FW_RI_RES_WR_DCAEN)
 
#define G_FW_RI_RES_WR_DCAEN(x)   (((x) >> S_FW_RI_RES_WR_DCAEN) & M_FW_RI_RES_WR_DCAEN)
 
#define F_FW_RI_RES_WR_DCAEN   V_FW_RI_RES_WR_DCAEN(1U)
 
#define S_FW_RI_RES_WR_DCACPU   26
 
#define M_FW_RI_RES_WR_DCACPU   0x1f
 
#define V_FW_RI_RES_WR_DCACPU(x)   ((x) << S_FW_RI_RES_WR_DCACPU)
 
#define G_FW_RI_RES_WR_DCACPU(x)   (((x) >> S_FW_RI_RES_WR_DCACPU) & M_FW_RI_RES_WR_DCACPU)
 
#define S_FW_RI_RES_WR_FBMIN   23
 
#define M_FW_RI_RES_WR_FBMIN   0x7
 
#define V_FW_RI_RES_WR_FBMIN(x)   ((x) << S_FW_RI_RES_WR_FBMIN)
 
#define G_FW_RI_RES_WR_FBMIN(x)   (((x) >> S_FW_RI_RES_WR_FBMIN) & M_FW_RI_RES_WR_FBMIN)
 
#define S_FW_RI_RES_WR_FBMAX   20
 
#define M_FW_RI_RES_WR_FBMAX   0x7
 
#define V_FW_RI_RES_WR_FBMAX(x)   ((x) << S_FW_RI_RES_WR_FBMAX)
 
#define G_FW_RI_RES_WR_FBMAX(x)   (((x) >> S_FW_RI_RES_WR_FBMAX) & M_FW_RI_RES_WR_FBMAX)
 
#define S_FW_RI_RES_WR_CIDXFTHRESHO   19
 
#define M_FW_RI_RES_WR_CIDXFTHRESHO   0x1
 
#define V_FW_RI_RES_WR_CIDXFTHRESHO(x)   ((x) << S_FW_RI_RES_WR_CIDXFTHRESHO)
 
#define G_FW_RI_RES_WR_CIDXFTHRESHO(x)   (((x) >> S_FW_RI_RES_WR_CIDXFTHRESHO) & M_FW_RI_RES_WR_CIDXFTHRESHO)
 
#define F_FW_RI_RES_WR_CIDXFTHRESHO   V_FW_RI_RES_WR_CIDXFTHRESHO(1U)
 
#define S_FW_RI_RES_WR_CIDXFTHRESH   16
 
#define M_FW_RI_RES_WR_CIDXFTHRESH   0x7
 
#define V_FW_RI_RES_WR_CIDXFTHRESH(x)   ((x) << S_FW_RI_RES_WR_CIDXFTHRESH)
 
#define G_FW_RI_RES_WR_CIDXFTHRESH(x)   (((x) >> S_FW_RI_RES_WR_CIDXFTHRESH) & M_FW_RI_RES_WR_CIDXFTHRESH)
 
#define S_FW_RI_RES_WR_EQSIZE   0
 
#define M_FW_RI_RES_WR_EQSIZE   0xffff
 
#define V_FW_RI_RES_WR_EQSIZE(x)   ((x) << S_FW_RI_RES_WR_EQSIZE)
 
#define G_FW_RI_RES_WR_EQSIZE(x)   (((x) >> S_FW_RI_RES_WR_EQSIZE) & M_FW_RI_RES_WR_EQSIZE)
 
#define S_FW_RI_RES_WR_IQANDST   15
 
#define M_FW_RI_RES_WR_IQANDST   0x1
 
#define V_FW_RI_RES_WR_IQANDST(x)   ((x) << S_FW_RI_RES_WR_IQANDST)
 
#define G_FW_RI_RES_WR_IQANDST(x)   (((x) >> S_FW_RI_RES_WR_IQANDST) & M_FW_RI_RES_WR_IQANDST)
 
#define F_FW_RI_RES_WR_IQANDST   V_FW_RI_RES_WR_IQANDST(1U)
 
#define S_FW_RI_RES_WR_IQANUS   14
 
#define M_FW_RI_RES_WR_IQANUS   0x1
 
#define V_FW_RI_RES_WR_IQANUS(x)   ((x) << S_FW_RI_RES_WR_IQANUS)
 
#define G_FW_RI_RES_WR_IQANUS(x)   (((x) >> S_FW_RI_RES_WR_IQANUS) & M_FW_RI_RES_WR_IQANUS)
 
#define F_FW_RI_RES_WR_IQANUS   V_FW_RI_RES_WR_IQANUS(1U)
 
#define S_FW_RI_RES_WR_IQANUD   12
 
#define M_FW_RI_RES_WR_IQANUD   0x3
 
#define V_FW_RI_RES_WR_IQANUD(x)   ((x) << S_FW_RI_RES_WR_IQANUD)
 
#define G_FW_RI_RES_WR_IQANUD(x)   (((x) >> S_FW_RI_RES_WR_IQANUD) & M_FW_RI_RES_WR_IQANUD)
 
#define S_FW_RI_RES_WR_IQANDSTINDEX   0
 
#define M_FW_RI_RES_WR_IQANDSTINDEX   0xfff
 
#define V_FW_RI_RES_WR_IQANDSTINDEX(x)   ((x) << S_FW_RI_RES_WR_IQANDSTINDEX)
 
#define G_FW_RI_RES_WR_IQANDSTINDEX(x)   (((x) >> S_FW_RI_RES_WR_IQANDSTINDEX) & M_FW_RI_RES_WR_IQANDSTINDEX)
 
#define S_FW_RI_RES_WR_IQDROPRSS   15
 
#define M_FW_RI_RES_WR_IQDROPRSS   0x1
 
#define V_FW_RI_RES_WR_IQDROPRSS(x)   ((x) << S_FW_RI_RES_WR_IQDROPRSS)
 
#define G_FW_RI_RES_WR_IQDROPRSS(x)   (((x) >> S_FW_RI_RES_WR_IQDROPRSS) & M_FW_RI_RES_WR_IQDROPRSS)
 
#define F_FW_RI_RES_WR_IQDROPRSS   V_FW_RI_RES_WR_IQDROPRSS(1U)
 
#define S_FW_RI_RES_WR_IQGTSMODE   14
 
#define M_FW_RI_RES_WR_IQGTSMODE   0x1
 
#define V_FW_RI_RES_WR_IQGTSMODE(x)   ((x) << S_FW_RI_RES_WR_IQGTSMODE)
 
#define G_FW_RI_RES_WR_IQGTSMODE(x)   (((x) >> S_FW_RI_RES_WR_IQGTSMODE) & M_FW_RI_RES_WR_IQGTSMODE)
 
#define F_FW_RI_RES_WR_IQGTSMODE   V_FW_RI_RES_WR_IQGTSMODE(1U)
 
#define S_FW_RI_RES_WR_IQPCIECH   12
 
#define M_FW_RI_RES_WR_IQPCIECH   0x3
 
#define V_FW_RI_RES_WR_IQPCIECH(x)   ((x) << S_FW_RI_RES_WR_IQPCIECH)
 
#define G_FW_RI_RES_WR_IQPCIECH(x)   (((x) >> S_FW_RI_RES_WR_IQPCIECH) & M_FW_RI_RES_WR_IQPCIECH)
 
#define S_FW_RI_RES_WR_IQDCAEN   11
 
#define M_FW_RI_RES_WR_IQDCAEN   0x1
 
#define V_FW_RI_RES_WR_IQDCAEN(x)   ((x) << S_FW_RI_RES_WR_IQDCAEN)
 
#define G_FW_RI_RES_WR_IQDCAEN(x)   (((x) >> S_FW_RI_RES_WR_IQDCAEN) & M_FW_RI_RES_WR_IQDCAEN)
 
#define F_FW_RI_RES_WR_IQDCAEN   V_FW_RI_RES_WR_IQDCAEN(1U)
 
#define S_FW_RI_RES_WR_IQDCACPU   6
 
#define M_FW_RI_RES_WR_IQDCACPU   0x1f
 
#define V_FW_RI_RES_WR_IQDCACPU(x)   ((x) << S_FW_RI_RES_WR_IQDCACPU)
 
#define G_FW_RI_RES_WR_IQDCACPU(x)   (((x) >> S_FW_RI_RES_WR_IQDCACPU) & M_FW_RI_RES_WR_IQDCACPU)
 
#define S_FW_RI_RES_WR_IQINTCNTTHRESH   4
 
#define M_FW_RI_RES_WR_IQINTCNTTHRESH   0x3
 
#define V_FW_RI_RES_WR_IQINTCNTTHRESH(x)   ((x) << S_FW_RI_RES_WR_IQINTCNTTHRESH)
 
#define G_FW_RI_RES_WR_IQINTCNTTHRESH(x)   (((x) >> S_FW_RI_RES_WR_IQINTCNTTHRESH) & M_FW_RI_RES_WR_IQINTCNTTHRESH)
 
#define S_FW_RI_RES_WR_IQO   3
 
#define M_FW_RI_RES_WR_IQO   0x1
 
#define V_FW_RI_RES_WR_IQO(x)   ((x) << S_FW_RI_RES_WR_IQO)
 
#define G_FW_RI_RES_WR_IQO(x)   (((x) >> S_FW_RI_RES_WR_IQO) & M_FW_RI_RES_WR_IQO)
 
#define F_FW_RI_RES_WR_IQO   V_FW_RI_RES_WR_IQO(1U)
 
#define S_FW_RI_RES_WR_IQCPRIO   2
 
#define M_FW_RI_RES_WR_IQCPRIO   0x1
 
#define V_FW_RI_RES_WR_IQCPRIO(x)   ((x) << S_FW_RI_RES_WR_IQCPRIO)
 
#define G_FW_RI_RES_WR_IQCPRIO(x)   (((x) >> S_FW_RI_RES_WR_IQCPRIO) & M_FW_RI_RES_WR_IQCPRIO)
 
#define F_FW_RI_RES_WR_IQCPRIO   V_FW_RI_RES_WR_IQCPRIO(1U)
 
#define S_FW_RI_RES_WR_IQESIZE   0
 
#define M_FW_RI_RES_WR_IQESIZE   0x3
 
#define V_FW_RI_RES_WR_IQESIZE(x)   ((x) << S_FW_RI_RES_WR_IQESIZE)
 
#define G_FW_RI_RES_WR_IQESIZE(x)   (((x) >> S_FW_RI_RES_WR_IQESIZE) & M_FW_RI_RES_WR_IQESIZE)
 
#define S_FW_RI_RES_WR_IQNS   31
 
#define M_FW_RI_RES_WR_IQNS   0x1
 
#define V_FW_RI_RES_WR_IQNS(x)   ((x) << S_FW_RI_RES_WR_IQNS)
 
#define G_FW_RI_RES_WR_IQNS(x)   (((x) >> S_FW_RI_RES_WR_IQNS) & M_FW_RI_RES_WR_IQNS)
 
#define F_FW_RI_RES_WR_IQNS   V_FW_RI_RES_WR_IQNS(1U)
 
#define S_FW_RI_RES_WR_IQRO   30
 
#define M_FW_RI_RES_WR_IQRO   0x1
 
#define V_FW_RI_RES_WR_IQRO(x)   ((x) << S_FW_RI_RES_WR_IQRO)
 
#define G_FW_RI_RES_WR_IQRO(x)   (((x) >> S_FW_RI_RES_WR_IQRO) & M_FW_RI_RES_WR_IQRO)
 
#define F_FW_RI_RES_WR_IQRO   V_FW_RI_RES_WR_IQRO(1U)
 
#define S_FW_RI_SEND_WR_SENDOP   0
 
#define M_FW_RI_SEND_WR_SENDOP   0xf
 
#define V_FW_RI_SEND_WR_SENDOP(x)   ((x) << S_FW_RI_SEND_WR_SENDOP)
 
#define G_FW_RI_SEND_WR_SENDOP(x)   (((x) >> S_FW_RI_SEND_WR_SENDOP) & M_FW_RI_SEND_WR_SENDOP)
 
#define S_FW_RI_BIND_MW_WR_QPBINDE   6
 
#define M_FW_RI_BIND_MW_WR_QPBINDE   0x1
 
#define V_FW_RI_BIND_MW_WR_QPBINDE(x)   ((x) << S_FW_RI_BIND_MW_WR_QPBINDE)
 
#define G_FW_RI_BIND_MW_WR_QPBINDE(x)   (((x) >> S_FW_RI_BIND_MW_WR_QPBINDE) & M_FW_RI_BIND_MW_WR_QPBINDE)
 
#define F_FW_RI_BIND_MW_WR_QPBINDE   V_FW_RI_BIND_MW_WR_QPBINDE(1U)
 
#define S_FW_RI_BIND_MW_WR_NS   5
 
#define M_FW_RI_BIND_MW_WR_NS   0x1
 
#define V_FW_RI_BIND_MW_WR_NS(x)   ((x) << S_FW_RI_BIND_MW_WR_NS)
 
#define G_FW_RI_BIND_MW_WR_NS(x)   (((x) >> S_FW_RI_BIND_MW_WR_NS) & M_FW_RI_BIND_MW_WR_NS)
 
#define F_FW_RI_BIND_MW_WR_NS   V_FW_RI_BIND_MW_WR_NS(1U)
 
#define S_FW_RI_BIND_MW_WR_DCACPU   0
 
#define M_FW_RI_BIND_MW_WR_DCACPU   0x1f
 
#define V_FW_RI_BIND_MW_WR_DCACPU(x)   ((x) << S_FW_RI_BIND_MW_WR_DCACPU)
 
#define G_FW_RI_BIND_MW_WR_DCACPU(x)   (((x) >> S_FW_RI_BIND_MW_WR_DCACPU) & M_FW_RI_BIND_MW_WR_DCACPU)
 
#define S_FW_RI_FR_NSMR_WR_QPBINDE   6
 
#define M_FW_RI_FR_NSMR_WR_QPBINDE   0x1
 
#define V_FW_RI_FR_NSMR_WR_QPBINDE(x)   ((x) << S_FW_RI_FR_NSMR_WR_QPBINDE)
 
#define G_FW_RI_FR_NSMR_WR_QPBINDE(x)   (((x) >> S_FW_RI_FR_NSMR_WR_QPBINDE) & M_FW_RI_FR_NSMR_WR_QPBINDE)
 
#define F_FW_RI_FR_NSMR_WR_QPBINDE   V_FW_RI_FR_NSMR_WR_QPBINDE(1U)
 
#define S_FW_RI_FR_NSMR_WR_NS   5
 
#define M_FW_RI_FR_NSMR_WR_NS   0x1
 
#define V_FW_RI_FR_NSMR_WR_NS(x)   ((x) << S_FW_RI_FR_NSMR_WR_NS)
 
#define G_FW_RI_FR_NSMR_WR_NS(x)   (((x) >> S_FW_RI_FR_NSMR_WR_NS) & M_FW_RI_FR_NSMR_WR_NS)
 
#define F_FW_RI_FR_NSMR_WR_NS   V_FW_RI_FR_NSMR_WR_NS(1U)
 
#define S_FW_RI_FR_NSMR_WR_DCACPU   0
 
#define M_FW_RI_FR_NSMR_WR_DCACPU   0x1f
 
#define V_FW_RI_FR_NSMR_WR_DCACPU(x)   ((x) << S_FW_RI_FR_NSMR_WR_DCACPU)
 
#define G_FW_RI_FR_NSMR_WR_DCACPU(x)   (((x) >> S_FW_RI_FR_NSMR_WR_DCACPU) & M_FW_RI_FR_NSMR_WR_DCACPU)
 
#define S_FW_RI_WR_MPAREQBIT   7
 
#define M_FW_RI_WR_MPAREQBIT   0x1
 
#define V_FW_RI_WR_MPAREQBIT(x)   ((x) << S_FW_RI_WR_MPAREQBIT)
 
#define G_FW_RI_WR_MPAREQBIT(x)   (((x) >> S_FW_RI_WR_MPAREQBIT) & M_FW_RI_WR_MPAREQBIT)
 
#define F_FW_RI_WR_MPAREQBIT   V_FW_RI_WR_MPAREQBIT(1U)
 
#define S_FW_RI_WR_P2PTYPE   0
 
#define M_FW_RI_WR_P2PTYPE   0xf
 
#define V_FW_RI_WR_P2PTYPE(x)   ((x) << S_FW_RI_WR_P2PTYPE)
 
#define G_FW_RI_WR_P2PTYPE(x)   (((x) >> S_FW_RI_WR_P2PTYPE) & M_FW_RI_WR_P2PTYPE)
 
#define S_SYN_RX_CHAN   0
 
#define M_SYN_RX_CHAN   0xF
 
#define V_SYN_RX_CHAN(x)   ((x) << S_SYN_RX_CHAN)
 
#define G_SYN_RX_CHAN(x)   (((x) >> S_SYN_RX_CHAN) & M_SYN_RX_CHAN)
 
#define S_TCP_HDR_LEN   10
 
#define M_TCP_HDR_LEN   0x3F
 
#define V_TCP_HDR_LEN(x)   ((x) << S_TCP_HDR_LEN)
 
#define G_TCP_HDR_LEN(x)   (((x) >> S_TCP_HDR_LEN) & M_TCP_HDR_LEN)
 
#define S_IP_HDR_LEN   16
 
#define M_IP_HDR_LEN   0x3FF
 
#define V_IP_HDR_LEN(x)   ((x) << S_IP_HDR_LEN)
 
#define G_IP_HDR_LEN(x)   (((x) >> S_IP_HDR_LEN) & M_IP_HDR_LEN)
 
#define S_ETH_HDR_LEN   26
 
#define M_ETH_HDR_LEN   0x1F
 
#define V_ETH_HDR_LEN(x)   ((x) << S_ETH_HDR_LEN)
 
#define G_ETH_HDR_LEN(x)   (((x) >> S_ETH_HDR_LEN) & M_ETH_HDR_LEN)
 
#define S_SYN_MAC_IDX   0
 
#define M_SYN_MAC_IDX   0x1FF
 
#define V_SYN_MAC_IDX(x)   ((x) << S_SYN_MAC_IDX)
 
#define G_SYN_MAC_IDX(x)   (((x) >> S_SYN_MAC_IDX) & M_SYN_MAC_IDX)
 
#define S_SYN_XACT_MATCH   9
 
#define V_SYN_XACT_MATCH(x)   ((x) << S_SYN_XACT_MATCH)
 
#define F_SYN_XACT_MATCH   V_SYN_XACT_MATCH(1U)
 
#define S_SYN_INTF   12
 
#define M_SYN_INTF   0xF
 
#define V_SYN_INTF(x)   ((x) << S_SYN_INTF)
 
#define G_SYN_INTF(x)   (((x) >> S_SYN_INTF) & M_SYN_INTF)
 
#define S_ULPTX_NSGE   0
 
#define M_ULPTX_NSGE   0xFFFF
 
#define V_ULPTX_NSGE(x)   ((x) << S_ULPTX_NSGE)
 
#define S_RX_DACK_MODE   29
 
#define M_RX_DACK_MODE   0x3
 
#define V_RX_DACK_MODE(x)   ((x) << S_RX_DACK_MODE)
 
#define G_RX_DACK_MODE(x)   (((x) >> S_RX_DACK_MODE) & M_RX_DACK_MODE)
 
#define S_RX_DACK_CHANGE   31
 
#define V_RX_DACK_CHANGE(x)   ((x) << S_RX_DACK_CHANGE)
 
#define F_RX_DACK_CHANGE   V_RX_DACK_CHANGE(1U)
 

Enumerations

enum  fw_ri_wr_opcode {
  FW_RI_RDMA_WRITE = 0x0, FW_RI_READ_REQ = 0x1, FW_RI_READ_RESP = 0x2, FW_RI_SEND = 0x3,
  FW_RI_SEND_WITH_INV = 0x4, FW_RI_SEND_WITH_SE = 0x5, FW_RI_SEND_WITH_SE_INV = 0x6, FW_RI_TERMINATE = 0x7,
  FW_RI_RDMA_INIT = 0x8, FW_RI_BIND_MW = 0x9, FW_RI_FAST_REGISTER = 0xa, FW_RI_LOCAL_INV = 0xb,
  FW_RI_QP_MODIFY = 0xc, FW_RI_BYPASS = 0xd, FW_RI_RECEIVE = 0xe, FW_RI_SGE_EC_CR_RETURN = 0xf
}
 
enum  fw_ri_wr_flags {
  FW_RI_COMPLETION_FLAG = 0x01, FW_RI_NOTIFICATION_FLAG = 0x02, FW_RI_SOLICITED_EVENT_FLAG = 0x04, FW_RI_READ_FENCE_FLAG = 0x08,
  FW_RI_LOCAL_FENCE_FLAG = 0x10, FW_RI_RDMA_READ_INVALIDATE = 0x20
}
 
enum  fw_ri_mpa_attrs { FW_RI_MPA_RX_MARKER_ENABLE = 0x01, FW_RI_MPA_TX_MARKER_ENABLE = 0x02, FW_RI_MPA_CRC_ENABLE = 0x04, FW_RI_MPA_IETF_ENABLE = 0x08 }
 
enum  fw_ri_qp_caps {
  FW_RI_QP_RDMA_READ_ENABLE = 0x01, FW_RI_QP_RDMA_WRITE_ENABLE = 0x02, FW_RI_QP_BIND_ENABLE = 0x04, FW_RI_QP_FAST_REGISTER_ENABLE = 0x08,
  FW_RI_QP_STAG0_ENABLE = 0x10
}
 
enum  fw_ri_addr_type { FW_RI_ZERO_BASED_TO = 0x00, FW_RI_VA_BASED_TO = 0x01 }
 
enum  fw_ri_mem_perms {
  FW_RI_MEM_ACCESS_REM_WRITE = 0x01, FW_RI_MEM_ACCESS_REM_READ = 0x02, FW_RI_MEM_ACCESS_REM = 0x03, FW_RI_MEM_ACCESS_LOCAL_WRITE = 0x04,
  FW_RI_MEM_ACCESS_LOCAL_READ = 0x08, FW_RI_MEM_ACCESS_LOCAL = 0x0C
}
 
enum  fw_ri_stag_type { FW_RI_STAG_NSMR = 0x00, FW_RI_STAG_SMR = 0x01, FW_RI_STAG_MW = 0x02, FW_RI_STAG_MW_RELAXED = 0x03 }
 
enum  fw_ri_data_op { FW_RI_DATA_IMMD = 0x81, FW_RI_DATA_DSGL = 0x82, FW_RI_DATA_ISGL = 0x83 }
 
enum  fw_ri_sgl_depth { FW_RI_SGL_DEPTH_MAX_SQ = 16, FW_RI_SGL_DEPTH_MAX_RQ = 4 }
 
enum  fw_ri_res_type { FW_RI_RES_TYPE_SQ, FW_RI_RES_TYPE_RQ, FW_RI_RES_TYPE_CQ }
 
enum  fw_ri_res_op { FW_RI_RES_OP_WRITE, FW_RI_RES_OP_RESET }
 
enum  fw_ri_type { FW_RI_TYPE_INIT, FW_RI_TYPE_FINI, FW_RI_TYPE_TERMINATE }
 
enum  fw_ri_init_p2ptype {
  FW_RI_INIT_P2PTYPE_RDMA_WRITE = FW_RI_RDMA_WRITE, FW_RI_INIT_P2PTYPE_READ_REQ = FW_RI_READ_REQ, FW_RI_INIT_P2PTYPE_SEND = FW_RI_SEND, FW_RI_INIT_P2PTYPE_SEND_WITH_INV = FW_RI_SEND_WITH_INV,
  FW_RI_INIT_P2PTYPE_SEND_WITH_SE = FW_RI_SEND_WITH_SE, FW_RI_INIT_P2PTYPE_SEND_WITH_SE_INV = FW_RI_SEND_WITH_SE_INV, FW_RI_INIT_P2PTYPE_DISABLED = 0xf
}
 

Macro Definition Documentation

#define F_FW_RI_BIND_MW_WR_NS   V_FW_RI_BIND_MW_WR_NS(1U)

Definition at line 627 of file t4fw_ri_api.h.

#define F_FW_RI_BIND_MW_WR_QPBINDE   V_FW_RI_BIND_MW_WR_QPBINDE(1U)

Definition at line 620 of file t4fw_ri_api.h.

#define F_FW_RI_FR_NSMR_WR_NS   V_FW_RI_FR_NSMR_WR_NS(1U)

Definition at line 664 of file t4fw_ri_api.h.

#define F_FW_RI_FR_NSMR_WR_QPBINDE   V_FW_RI_FR_NSMR_WR_QPBINDE(1U)

Definition at line 657 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_CIDXFTHRESHO   V_FW_RI_RES_WR_CIDXFTHRESHO(1U)

Definition at line 414 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_CPRIO   V_FW_RI_RES_WR_CPRIO(1U)

Definition at line 363 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_DCAEN   V_FW_RI_RES_WR_DCAEN(1U)

Definition at line 389 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_FETCHNS   V_FW_RI_RES_WR_FETCHNS(1U)

Definition at line 343 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_FETCHRO   V_FW_RI_RES_WR_FETCHRO(1U)

Definition at line 350 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_FETCHSZM   V_FW_RI_RES_WR_FETCHSZM(1U)

Definition at line 322 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_IQANDST   V_FW_RI_RES_WR_IQANDST(1U)

Definition at line 433 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_IQANUS   V_FW_RI_RES_WR_IQANUS(1U)

Definition at line 440 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_IQCPRIO   V_FW_RI_RES_WR_IQCPRIO(1U)

Definition at line 506 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_IQDCAEN   V_FW_RI_RES_WR_IQDCAEN(1U)

Definition at line 479 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_IQDROPRSS   V_FW_RI_RES_WR_IQDROPRSS(1U)

Definition at line 459 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_IQGTSMODE   V_FW_RI_RES_WR_IQGTSMODE(1U)

Definition at line 466 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_IQNS   V_FW_RI_RES_WR_IQNS(1U)

Definition at line 519 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_IQO   V_FW_RI_RES_WR_IQO(1U)

Definition at line 499 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_IQRO   V_FW_RI_RES_WR_IQRO(1U)

Definition at line 526 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_ONCHIP   V_FW_RI_RES_WR_ONCHIP(1U)

Definition at line 370 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_STATUSPGNS   V_FW_RI_RES_WR_STATUSPGNS(1U)

Definition at line 329 of file t4fw_ri_api.h.

#define F_FW_RI_RES_WR_STATUSPGRO   V_FW_RI_RES_WR_STATUSPGRO(1U)

Definition at line 336 of file t4fw_ri_api.h.

#define F_FW_RI_TPTE_ADDRTYPE   V_FW_RI_TPTE_ADDRTYPE(1U)

Definition at line 215 of file t4fw_ri_api.h.

#define F_FW_RI_TPTE_MWBINDEN   V_FW_RI_TPTE_MWBINDEN(1U)

Definition at line 222 of file t4fw_ri_api.h.

#define F_FW_RI_TPTE_NOSNOOP   V_FW_RI_TPTE_NOSNOOP(1U)

Definition at line 241 of file t4fw_ri_api.h.

#define F_FW_RI_TPTE_REMINVDIS   V_FW_RI_TPTE_REMINVDIS(1U)

Definition at line 208 of file t4fw_ri_api.h.

#define F_FW_RI_TPTE_STAGSTATE   V_FW_RI_TPTE_STAGSTATE(1U)

Definition at line 183 of file t4fw_ri_api.h.

#define F_FW_RI_TPTE_VALID   V_FW_RI_TPTE_VALID(1U)

Definition at line 170 of file t4fw_ri_api.h.

#define F_FW_RI_WR_MPAREQBIT   V_FW_RI_WR_MPAREQBIT(1U)

Definition at line 748 of file t4fw_ri_api.h.

#define F_RX_DACK_CHANGE   V_RX_DACK_CHANGE(1U)

Definition at line 837 of file t4fw_ri_api.h.

#define F_SYN_XACT_MATCH   V_SYN_XACT_MATCH(1U)

Definition at line 814 of file t4fw_ri_api.h.

#define G_ETH_HDR_LEN (   x)    (((x) >> S_ETH_HDR_LEN) & M_ETH_HDR_LEN)

Definition at line 804 of file t4fw_ri_api.h.

#define G_FW_RI_BIND_MW_WR_DCACPU (   x)    (((x) >> S_FW_RI_BIND_MW_WR_DCACPU) & M_FW_RI_BIND_MW_WR_DCACPU)

Definition at line 632 of file t4fw_ri_api.h.

#define G_FW_RI_BIND_MW_WR_NS (   x)    (((x) >> S_FW_RI_BIND_MW_WR_NS) & M_FW_RI_BIND_MW_WR_NS)

Definition at line 625 of file t4fw_ri_api.h.

#define G_FW_RI_BIND_MW_WR_QPBINDE (   x)    (((x) >> S_FW_RI_BIND_MW_WR_QPBINDE) & M_FW_RI_BIND_MW_WR_QPBINDE)

Definition at line 618 of file t4fw_ri_api.h.

#define G_FW_RI_FR_NSMR_WR_DCACPU (   x)    (((x) >> S_FW_RI_FR_NSMR_WR_DCACPU) & M_FW_RI_FR_NSMR_WR_DCACPU)

Definition at line 669 of file t4fw_ri_api.h.

#define G_FW_RI_FR_NSMR_WR_NS (   x)    (((x) >> S_FW_RI_FR_NSMR_WR_NS) & M_FW_RI_FR_NSMR_WR_NS)

Definition at line 662 of file t4fw_ri_api.h.

#define G_FW_RI_FR_NSMR_WR_QPBINDE (   x)    (((x) >> S_FW_RI_FR_NSMR_WR_QPBINDE) & M_FW_RI_FR_NSMR_WR_QPBINDE)

Definition at line 655 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_CIDXFTHRESH (   x)    (((x) >> S_FW_RI_RES_WR_CIDXFTHRESH) & M_FW_RI_RES_WR_CIDXFTHRESH)

Definition at line 419 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_CIDXFTHRESHO (   x)    (((x) >> S_FW_RI_RES_WR_CIDXFTHRESHO) & M_FW_RI_RES_WR_CIDXFTHRESHO)

Definition at line 412 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_CPRIO (   x)    (((x) >> S_FW_RI_RES_WR_CPRIO) & M_FW_RI_RES_WR_CPRIO)

Definition at line 361 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_DCACPU (   x)    (((x) >> S_FW_RI_RES_WR_DCACPU) & M_FW_RI_RES_WR_DCACPU)

Definition at line 394 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_DCAEN (   x)    (((x) >> S_FW_RI_RES_WR_DCAEN) & M_FW_RI_RES_WR_DCAEN)

Definition at line 387 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_EQSIZE (   x)    (((x) >> S_FW_RI_RES_WR_EQSIZE) & M_FW_RI_RES_WR_EQSIZE)

Definition at line 425 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_FBMAX (   x)    (((x) >> S_FW_RI_RES_WR_FBMAX) & M_FW_RI_RES_WR_FBMAX)

Definition at line 406 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_FBMIN (   x)    (((x) >> S_FW_RI_RES_WR_FBMIN) & M_FW_RI_RES_WR_FBMIN)

Definition at line 400 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_FETCHNS (   x)    (((x) >> S_FW_RI_RES_WR_FETCHNS) & M_FW_RI_RES_WR_FETCHNS)

Definition at line 341 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_FETCHRO (   x)    (((x) >> S_FW_RI_RES_WR_FETCHRO) & M_FW_RI_RES_WR_FETCHRO)

Definition at line 348 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_FETCHSZM (   x)    (((x) >> S_FW_RI_RES_WR_FETCHSZM) & M_FW_RI_RES_WR_FETCHSZM)

Definition at line 320 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_HOSTFCMODE (   x)    (((x) >> S_FW_RI_RES_WR_HOSTFCMODE) & M_FW_RI_RES_WR_HOSTFCMODE)

Definition at line 355 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQANDST (   x)    (((x) >> S_FW_RI_RES_WR_IQANDST) & M_FW_RI_RES_WR_IQANDST)

Definition at line 431 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQANDSTINDEX (   x)    (((x) >> S_FW_RI_RES_WR_IQANDSTINDEX) & M_FW_RI_RES_WR_IQANDSTINDEX)

Definition at line 451 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQANUD (   x)    (((x) >> S_FW_RI_RES_WR_IQANUD) & M_FW_RI_RES_WR_IQANUD)

Definition at line 445 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQANUS (   x)    (((x) >> S_FW_RI_RES_WR_IQANUS) & M_FW_RI_RES_WR_IQANUS)

Definition at line 438 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQCPRIO (   x)    (((x) >> S_FW_RI_RES_WR_IQCPRIO) & M_FW_RI_RES_WR_IQCPRIO)

Definition at line 504 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQDCACPU (   x)    (((x) >> S_FW_RI_RES_WR_IQDCACPU) & M_FW_RI_RES_WR_IQDCACPU)

Definition at line 484 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQDCAEN (   x)    (((x) >> S_FW_RI_RES_WR_IQDCAEN) & M_FW_RI_RES_WR_IQDCAEN)

Definition at line 477 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQDROPRSS (   x)    (((x) >> S_FW_RI_RES_WR_IQDROPRSS) & M_FW_RI_RES_WR_IQDROPRSS)

Definition at line 457 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQESIZE (   x)    (((x) >> S_FW_RI_RES_WR_IQESIZE) & M_FW_RI_RES_WR_IQESIZE)

Definition at line 511 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQGTSMODE (   x)    (((x) >> S_FW_RI_RES_WR_IQGTSMODE) & M_FW_RI_RES_WR_IQGTSMODE)

Definition at line 464 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQID (   x)    (((x) >> S_FW_RI_RES_WR_IQID) & M_FW_RI_RES_WR_IQID)

Definition at line 381 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQINTCNTTHRESH (   x)    (((x) >> S_FW_RI_RES_WR_IQINTCNTTHRESH) & M_FW_RI_RES_WR_IQINTCNTTHRESH)

Definition at line 491 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQNS (   x)    (((x) >> S_FW_RI_RES_WR_IQNS) & M_FW_RI_RES_WR_IQNS)

Definition at line 517 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQO (   x)    (((x) >> S_FW_RI_RES_WR_IQO) & M_FW_RI_RES_WR_IQO)

Definition at line 497 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQPCIECH (   x)    (((x) >> S_FW_RI_RES_WR_IQPCIECH) & M_FW_RI_RES_WR_IQPCIECH)

Definition at line 471 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_IQRO (   x)    (((x) >> S_FW_RI_RES_WR_IQRO) & M_FW_RI_RES_WR_IQRO)

Definition at line 524 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_NRES (   x)    (((x) >> S_FW_RI_RES_WR_NRES) & M_FW_RI_RES_WR_NRES)

Definition at line 314 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_ONCHIP (   x)    (((x) >> S_FW_RI_RES_WR_ONCHIP) & M_FW_RI_RES_WR_ONCHIP)

Definition at line 368 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_PCIECHN (   x)    (((x) >> S_FW_RI_RES_WR_PCIECHN) & M_FW_RI_RES_WR_PCIECHN)

Definition at line 375 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_STATUSPGNS (   x)    (((x) >> S_FW_RI_RES_WR_STATUSPGNS) & M_FW_RI_RES_WR_STATUSPGNS)

Definition at line 327 of file t4fw_ri_api.h.

#define G_FW_RI_RES_WR_STATUSPGRO (   x)    (((x) >> S_FW_RI_RES_WR_STATUSPGRO) & M_FW_RI_RES_WR_STATUSPGRO)

Definition at line 334 of file t4fw_ri_api.h.

#define G_FW_RI_SEND_WR_SENDOP (   x)    (((x) >> S_FW_RI_SEND_WR_SENDOP) & M_FW_RI_SEND_WR_SENDOP)

Definition at line 568 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_ADDRTYPE (   x)    (((x) >> S_FW_RI_TPTE_ADDRTYPE) & M_FW_RI_TPTE_ADDRTYPE)

Definition at line 213 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_DCA (   x)    (((x) >> S_FW_RI_TPTE_DCA) & M_FW_RI_TPTE_DCA)

Definition at line 252 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_MWBCNT_PSTAG (   x)    (((x) >> S_FW_RI_TPTE_MWBCNT_PSTAG) & M_FW_RI_TPTE_MWBCNT_PSTAG)

Definition at line 259 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_MWBINDEN (   x)    (((x) >> S_FW_RI_TPTE_MWBINDEN) & M_FW_RI_TPTE_MWBINDEN)

Definition at line 220 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_NOSNOOP (   x)    (((x) >> S_FW_RI_TPTE_NOSNOOP) & M_FW_RI_TPTE_NOSNOOP)

Definition at line 239 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_PBLADDR (   x)    (((x) >> S_FW_RI_TPTE_PBLADDR) & M_FW_RI_TPTE_PBLADDR)

Definition at line 246 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_PDID (   x)    (((x) >> S_FW_RI_TPTE_PDID) & M_FW_RI_TPTE_PDID)

Definition at line 194 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_PERM (   x)    (((x) >> S_FW_RI_TPTE_PERM) & M_FW_RI_TPTE_PERM)

Definition at line 200 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_PS (   x)    (((x) >> S_FW_RI_TPTE_PS) & M_FW_RI_TPTE_PS)

Definition at line 227 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_QPID (   x)    (((x) >> S_FW_RI_TPTE_QPID) & M_FW_RI_TPTE_QPID)

Definition at line 233 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_REMINVDIS (   x)    (((x) >> S_FW_RI_TPTE_REMINVDIS) & M_FW_RI_TPTE_REMINVDIS)

Definition at line 206 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_STAGKEY (   x)    (((x) >> S_FW_RI_TPTE_STAGKEY) & M_FW_RI_TPTE_STAGKEY)

Definition at line 175 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_STAGSTATE (   x)    (((x) >> S_FW_RI_TPTE_STAGSTATE) & M_FW_RI_TPTE_STAGSTATE)

Definition at line 181 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_STAGTYPE (   x)    (((x) >> S_FW_RI_TPTE_STAGTYPE) & M_FW_RI_TPTE_STAGTYPE)

Definition at line 188 of file t4fw_ri_api.h.

#define G_FW_RI_TPTE_VALID (   x)    (((x) >> S_FW_RI_TPTE_VALID) & M_FW_RI_TPTE_VALID)

Definition at line 168 of file t4fw_ri_api.h.

#define G_FW_RI_WR_MPAREQBIT (   x)    (((x) >> S_FW_RI_WR_MPAREQBIT) & M_FW_RI_WR_MPAREQBIT)

Definition at line 746 of file t4fw_ri_api.h.

#define G_FW_RI_WR_P2PTYPE (   x)    (((x) >> S_FW_RI_WR_P2PTYPE) & M_FW_RI_WR_P2PTYPE)

Definition at line 753 of file t4fw_ri_api.h.

#define G_IP_HDR_LEN (   x)    (((x) >> S_IP_HDR_LEN) & M_IP_HDR_LEN)

Definition at line 799 of file t4fw_ri_api.h.

#define G_RX_DACK_MODE (   x)    (((x) >> S_RX_DACK_MODE) & M_RX_DACK_MODE)

Definition at line 833 of file t4fw_ri_api.h.

#define G_SYN_INTF (   x)    (((x) >> S_SYN_INTF) & M_SYN_INTF)

Definition at line 819 of file t4fw_ri_api.h.

#define G_SYN_MAC_IDX (   x)    (((x) >> S_SYN_MAC_IDX) & M_SYN_MAC_IDX)

Definition at line 810 of file t4fw_ri_api.h.

#define G_SYN_RX_CHAN (   x)    (((x) >> S_SYN_RX_CHAN) & M_SYN_RX_CHAN)

Definition at line 789 of file t4fw_ri_api.h.

#define G_TCP_HDR_LEN (   x)    (((x) >> S_TCP_HDR_LEN) & M_TCP_HDR_LEN)

Definition at line 794 of file t4fw_ri_api.h.

#define M_ETH_HDR_LEN   0x1F

Definition at line 802 of file t4fw_ri_api.h.

#define M_FW_RI_BIND_MW_WR_DCACPU   0x1f

Definition at line 630 of file t4fw_ri_api.h.

#define M_FW_RI_BIND_MW_WR_NS   0x1

Definition at line 623 of file t4fw_ri_api.h.

#define M_FW_RI_BIND_MW_WR_QPBINDE   0x1

Definition at line 616 of file t4fw_ri_api.h.

#define M_FW_RI_FR_NSMR_WR_DCACPU   0x1f

Definition at line 667 of file t4fw_ri_api.h.

#define M_FW_RI_FR_NSMR_WR_NS   0x1

Definition at line 660 of file t4fw_ri_api.h.

#define M_FW_RI_FR_NSMR_WR_QPBINDE   0x1

Definition at line 653 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_CIDXFTHRESH   0x7

Definition at line 417 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_CIDXFTHRESHO   0x1

Definition at line 410 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_CPRIO   0x1

Definition at line 359 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_DCACPU   0x1f

Definition at line 392 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_DCAEN   0x1

Definition at line 385 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_EQSIZE   0xffff

Definition at line 423 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_FBMAX   0x7

Definition at line 404 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_FBMIN   0x7

Definition at line 398 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_FETCHNS   0x1

Definition at line 339 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_FETCHRO   0x1

Definition at line 346 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_FETCHSZM   0x1

Definition at line 318 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_HOSTFCMODE   0x3

Definition at line 353 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQANDST   0x1

Definition at line 429 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQANDSTINDEX   0xfff

Definition at line 449 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQANUD   0x3

Definition at line 443 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQANUS   0x1

Definition at line 436 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQCPRIO   0x1

Definition at line 502 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQDCACPU   0x1f

Definition at line 482 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQDCAEN   0x1

Definition at line 475 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQDROPRSS   0x1

Definition at line 455 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQESIZE   0x3

Definition at line 509 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQGTSMODE   0x1

Definition at line 462 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQID   0xffff

Definition at line 379 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQINTCNTTHRESH   0x3

Definition at line 488 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQNS   0x1

Definition at line 515 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQO   0x1

Definition at line 495 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQPCIECH   0x3

Definition at line 469 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_IQRO   0x1

Definition at line 522 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_NRES   0xff

Definition at line 312 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_ONCHIP   0x1

Definition at line 366 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_PCIECHN   0x3

Definition at line 373 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_STATUSPGNS   0x1

Definition at line 325 of file t4fw_ri_api.h.

#define M_FW_RI_RES_WR_STATUSPGRO   0x1

Definition at line 332 of file t4fw_ri_api.h.

#define M_FW_RI_SEND_WR_SENDOP   0xf

Definition at line 566 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_ADDRTYPE   1

Definition at line 211 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_DCA   0x1f

Definition at line 250 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_MWBCNT_PSTAG   0xffffff

Definition at line 256 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_MWBINDEN   0x1

Definition at line 218 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_NOSNOOP   0x1

Definition at line 237 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_PBLADDR   0x1fffffff

Definition at line 244 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_PDID   0xfffff

Definition at line 192 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_PERM   0xf

Definition at line 198 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_PS   0x1f

Definition at line 225 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_QPID   0xfffff

Definition at line 231 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_REMINVDIS   0x1

Definition at line 204 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_STAGKEY   0xff

Definition at line 173 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_STAGSTATE   0x1

Definition at line 179 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_STAGTYPE   0x3

Definition at line 186 of file t4fw_ri_api.h.

#define M_FW_RI_TPTE_VALID   0x1

Definition at line 166 of file t4fw_ri_api.h.

#define M_FW_RI_WR_MPAREQBIT   0x1

Definition at line 744 of file t4fw_ri_api.h.

#define M_FW_RI_WR_P2PTYPE   0xf

Definition at line 751 of file t4fw_ri_api.h.

#define M_IP_HDR_LEN   0x3FF

Definition at line 797 of file t4fw_ri_api.h.

#define M_RX_DACK_MODE   0x3

Definition at line 831 of file t4fw_ri_api.h.

#define M_SYN_INTF   0xF

Definition at line 817 of file t4fw_ri_api.h.

#define M_SYN_MAC_IDX   0x1FF

Definition at line 808 of file t4fw_ri_api.h.

#define M_SYN_RX_CHAN   0xF

Definition at line 787 of file t4fw_ri_api.h.

#define M_TCP_HDR_LEN   0x3F

Definition at line 792 of file t4fw_ri_api.h.

#define M_ULPTX_NSGE   0xFFFF

Definition at line 827 of file t4fw_ri_api.h.

#define S_ETH_HDR_LEN   26

Definition at line 801 of file t4fw_ri_api.h.

#define S_FW_RI_BIND_MW_WR_DCACPU   0

Definition at line 629 of file t4fw_ri_api.h.

#define S_FW_RI_BIND_MW_WR_NS   5

Definition at line 622 of file t4fw_ri_api.h.

#define S_FW_RI_BIND_MW_WR_QPBINDE   6

Definition at line 615 of file t4fw_ri_api.h.

#define S_FW_RI_FR_NSMR_WR_DCACPU   0

Definition at line 666 of file t4fw_ri_api.h.

#define S_FW_RI_FR_NSMR_WR_NS   5

Definition at line 659 of file t4fw_ri_api.h.

#define S_FW_RI_FR_NSMR_WR_QPBINDE   6

Definition at line 652 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_CIDXFTHRESH   16

Definition at line 416 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_CIDXFTHRESHO   19

Definition at line 409 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_CPRIO   19

Definition at line 358 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_DCACPU   26

Definition at line 391 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_DCAEN   31

Definition at line 384 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_EQSIZE   0

Definition at line 422 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_FBMAX   20

Definition at line 403 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_FBMIN   23

Definition at line 397 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_FETCHNS   23

Definition at line 338 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_FETCHRO   22

Definition at line 345 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_FETCHSZM   26

Definition at line 317 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_HOSTFCMODE   20

Definition at line 352 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQANDST   15

Definition at line 428 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQANDSTINDEX   0

Definition at line 448 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQANUD   12

Definition at line 442 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQANUS   14

Definition at line 435 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQCPRIO   2

Definition at line 501 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQDCACPU   6

Definition at line 481 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQDCAEN   11

Definition at line 474 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQDROPRSS   15

Definition at line 454 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQESIZE   0

Definition at line 508 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQGTSMODE   14

Definition at line 461 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQID   0

Definition at line 378 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQINTCNTTHRESH   4

Definition at line 487 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQNS   31

Definition at line 514 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQO   3

Definition at line 494 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQPCIECH   12

Definition at line 468 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_IQRO   30

Definition at line 521 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_NRES   0

Definition at line 311 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_ONCHIP   18

Definition at line 365 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_PCIECHN   16

Definition at line 372 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_STATUSPGNS   25

Definition at line 324 of file t4fw_ri_api.h.

#define S_FW_RI_RES_WR_STATUSPGRO   24

Definition at line 331 of file t4fw_ri_api.h.

#define S_FW_RI_SEND_WR_SENDOP   0

Definition at line 565 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_ADDRTYPE   26

Definition at line 210 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_DCA   24

Definition at line 249 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_MWBCNT_PSTAG   0

Definition at line 255 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_MWBINDEN   25

Definition at line 217 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_NOSNOOP   30

Definition at line 236 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_PBLADDR   0

Definition at line 243 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_PDID   0

Definition at line 191 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_PERM   28

Definition at line 197 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_PS   20

Definition at line 224 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_QPID   0

Definition at line 230 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_REMINVDIS   27

Definition at line 203 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_STAGKEY   23

Definition at line 172 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_STAGSTATE   22

Definition at line 178 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_STAGTYPE   20

Definition at line 185 of file t4fw_ri_api.h.

#define S_FW_RI_TPTE_VALID   31

Definition at line 165 of file t4fw_ri_api.h.

#define S_FW_RI_WR_MPAREQBIT   7

Definition at line 743 of file t4fw_ri_api.h.

#define S_FW_RI_WR_P2PTYPE   0

Definition at line 750 of file t4fw_ri_api.h.

#define S_IP_HDR_LEN   16

Definition at line 796 of file t4fw_ri_api.h.

#define S_RX_DACK_CHANGE   31

Definition at line 835 of file t4fw_ri_api.h.

#define S_RX_DACK_MODE   29

Definition at line 830 of file t4fw_ri_api.h.

#define S_SYN_INTF   12

Definition at line 816 of file t4fw_ri_api.h.

#define S_SYN_MAC_IDX   0

Definition at line 807 of file t4fw_ri_api.h.

#define S_SYN_RX_CHAN   0

Definition at line 786 of file t4fw_ri_api.h.

#define S_SYN_XACT_MATCH   9

Definition at line 812 of file t4fw_ri_api.h.

#define S_TCP_HDR_LEN   10

Definition at line 791 of file t4fw_ri_api.h.

#define S_ULPTX_NSGE   0

Definition at line 826 of file t4fw_ri_api.h.

#define V_ETH_HDR_LEN (   x)    ((x) << S_ETH_HDR_LEN)

Definition at line 803 of file t4fw_ri_api.h.

#define V_FW_RI_BIND_MW_WR_DCACPU (   x)    ((x) << S_FW_RI_BIND_MW_WR_DCACPU)

Definition at line 631 of file t4fw_ri_api.h.

#define V_FW_RI_BIND_MW_WR_NS (   x)    ((x) << S_FW_RI_BIND_MW_WR_NS)

Definition at line 624 of file t4fw_ri_api.h.

#define V_FW_RI_BIND_MW_WR_QPBINDE (   x)    ((x) << S_FW_RI_BIND_MW_WR_QPBINDE)

Definition at line 617 of file t4fw_ri_api.h.

#define V_FW_RI_FR_NSMR_WR_DCACPU (   x)    ((x) << S_FW_RI_FR_NSMR_WR_DCACPU)

Definition at line 668 of file t4fw_ri_api.h.

#define V_FW_RI_FR_NSMR_WR_NS (   x)    ((x) << S_FW_RI_FR_NSMR_WR_NS)

Definition at line 661 of file t4fw_ri_api.h.

#define V_FW_RI_FR_NSMR_WR_QPBINDE (   x)    ((x) << S_FW_RI_FR_NSMR_WR_QPBINDE)

Definition at line 654 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_CIDXFTHRESH (   x)    ((x) << S_FW_RI_RES_WR_CIDXFTHRESH)

Definition at line 418 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_CIDXFTHRESHO (   x)    ((x) << S_FW_RI_RES_WR_CIDXFTHRESHO)

Definition at line 411 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_CPRIO (   x)    ((x) << S_FW_RI_RES_WR_CPRIO)

Definition at line 360 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_DCACPU (   x)    ((x) << S_FW_RI_RES_WR_DCACPU)

Definition at line 393 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_DCAEN (   x)    ((x) << S_FW_RI_RES_WR_DCAEN)

Definition at line 386 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_EQSIZE (   x)    ((x) << S_FW_RI_RES_WR_EQSIZE)

Definition at line 424 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_FBMAX (   x)    ((x) << S_FW_RI_RES_WR_FBMAX)

Definition at line 405 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_FBMIN (   x)    ((x) << S_FW_RI_RES_WR_FBMIN)

Definition at line 399 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_FETCHNS (   x)    ((x) << S_FW_RI_RES_WR_FETCHNS)

Definition at line 340 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_FETCHRO (   x)    ((x) << S_FW_RI_RES_WR_FETCHRO)

Definition at line 347 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_FETCHSZM (   x)    ((x) << S_FW_RI_RES_WR_FETCHSZM)

Definition at line 319 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_HOSTFCMODE (   x)    ((x) << S_FW_RI_RES_WR_HOSTFCMODE)

Definition at line 354 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQANDST (   x)    ((x) << S_FW_RI_RES_WR_IQANDST)

Definition at line 430 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQANDSTINDEX (   x)    ((x) << S_FW_RI_RES_WR_IQANDSTINDEX)

Definition at line 450 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQANUD (   x)    ((x) << S_FW_RI_RES_WR_IQANUD)

Definition at line 444 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQANUS (   x)    ((x) << S_FW_RI_RES_WR_IQANUS)

Definition at line 437 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQCPRIO (   x)    ((x) << S_FW_RI_RES_WR_IQCPRIO)

Definition at line 503 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQDCACPU (   x)    ((x) << S_FW_RI_RES_WR_IQDCACPU)

Definition at line 483 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQDCAEN (   x)    ((x) << S_FW_RI_RES_WR_IQDCAEN)

Definition at line 476 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQDROPRSS (   x)    ((x) << S_FW_RI_RES_WR_IQDROPRSS)

Definition at line 456 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQESIZE (   x)    ((x) << S_FW_RI_RES_WR_IQESIZE)

Definition at line 510 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQGTSMODE (   x)    ((x) << S_FW_RI_RES_WR_IQGTSMODE)

Definition at line 463 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQID (   x)    ((x) << S_FW_RI_RES_WR_IQID)

Definition at line 380 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQINTCNTTHRESH (   x)    ((x) << S_FW_RI_RES_WR_IQINTCNTTHRESH)

Definition at line 489 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQNS (   x)    ((x) << S_FW_RI_RES_WR_IQNS)

Definition at line 516 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQO (   x)    ((x) << S_FW_RI_RES_WR_IQO)

Definition at line 496 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQPCIECH (   x)    ((x) << S_FW_RI_RES_WR_IQPCIECH)

Definition at line 470 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_IQRO (   x)    ((x) << S_FW_RI_RES_WR_IQRO)

Definition at line 523 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_NRES (   x)    ((x) << S_FW_RI_RES_WR_NRES)

Definition at line 313 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_ONCHIP (   x)    ((x) << S_FW_RI_RES_WR_ONCHIP)

Definition at line 367 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_PCIECHN (   x)    ((x) << S_FW_RI_RES_WR_PCIECHN)

Definition at line 374 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_STATUSPGNS (   x)    ((x) << S_FW_RI_RES_WR_STATUSPGNS)

Definition at line 326 of file t4fw_ri_api.h.

#define V_FW_RI_RES_WR_STATUSPGRO (   x)    ((x) << S_FW_RI_RES_WR_STATUSPGRO)

Definition at line 333 of file t4fw_ri_api.h.

#define V_FW_RI_SEND_WR_SENDOP (   x)    ((x) << S_FW_RI_SEND_WR_SENDOP)

Definition at line 567 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_ADDRTYPE (   x)    ((x) << S_FW_RI_TPTE_ADDRTYPE)

Definition at line 212 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_DCA (   x)    ((x) << S_FW_RI_TPTE_DCA)

Definition at line 251 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_MWBCNT_PSTAT (   x)    ((x) << S_FW_RI_TPTE_MWBCNT_PSTAG)

Definition at line 257 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_MWBINDEN (   x)    ((x) << S_FW_RI_TPTE_MWBINDEN)

Definition at line 219 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_NOSNOOP (   x)    ((x) << S_FW_RI_TPTE_NOSNOOP)

Definition at line 238 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_PBLADDR (   x)    ((x) << S_FW_RI_TPTE_PBLADDR)

Definition at line 245 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_PDID (   x)    ((x) << S_FW_RI_TPTE_PDID)

Definition at line 193 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_PERM (   x)    ((x) << S_FW_RI_TPTE_PERM)

Definition at line 199 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_PS (   x)    ((x) << S_FW_RI_TPTE_PS)

Definition at line 226 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_QPID (   x)    ((x) << S_FW_RI_TPTE_QPID)

Definition at line 232 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_REMINVDIS (   x)    ((x) << S_FW_RI_TPTE_REMINVDIS)

Definition at line 205 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_STAGKEY (   x)    ((x) << S_FW_RI_TPTE_STAGKEY)

Definition at line 174 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_STAGSTATE (   x)    ((x) << S_FW_RI_TPTE_STAGSTATE)

Definition at line 180 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_STAGTYPE (   x)    ((x) << S_FW_RI_TPTE_STAGTYPE)

Definition at line 187 of file t4fw_ri_api.h.

#define V_FW_RI_TPTE_VALID (   x)    ((x) << S_FW_RI_TPTE_VALID)

Definition at line 167 of file t4fw_ri_api.h.

#define V_FW_RI_WR_MPAREQBIT (   x)    ((x) << S_FW_RI_WR_MPAREQBIT)

Definition at line 745 of file t4fw_ri_api.h.

#define V_FW_RI_WR_P2PTYPE (   x)    ((x) << S_FW_RI_WR_P2PTYPE)

Definition at line 752 of file t4fw_ri_api.h.

#define V_IP_HDR_LEN (   x)    ((x) << S_IP_HDR_LEN)

Definition at line 798 of file t4fw_ri_api.h.

#define V_RX_DACK_CHANGE (   x)    ((x) << S_RX_DACK_CHANGE)

Definition at line 836 of file t4fw_ri_api.h.

#define V_RX_DACK_MODE (   x)    ((x) << S_RX_DACK_MODE)

Definition at line 832 of file t4fw_ri_api.h.

#define V_SYN_INTF (   x)    ((x) << S_SYN_INTF)

Definition at line 818 of file t4fw_ri_api.h.

#define V_SYN_MAC_IDX (   x)    ((x) << S_SYN_MAC_IDX)

Definition at line 809 of file t4fw_ri_api.h.

#define V_SYN_RX_CHAN (   x)    ((x) << S_SYN_RX_CHAN)

Definition at line 788 of file t4fw_ri_api.h.

#define V_SYN_XACT_MATCH (   x)    ((x) << S_SYN_XACT_MATCH)

Definition at line 813 of file t4fw_ri_api.h.

#define V_TCP_HDR_LEN (   x)    ((x) << S_TCP_HDR_LEN)

Definition at line 793 of file t4fw_ri_api.h.

#define V_ULPTX_NSGE (   x)    ((x) << S_ULPTX_NSGE)

Definition at line 828 of file t4fw_ri_api.h.

Enumeration Type Documentation

enum fw_ri_addr_type
Enumerator:
FW_RI_ZERO_BASED_TO 
FW_RI_VA_BASED_TO 

Definition at line 80 of file t4fw_ri_api.h.

enum fw_ri_data_op
Enumerator:
FW_RI_DATA_IMMD 
FW_RI_DATA_DSGL 
FW_RI_DATA_ISGL 

Definition at line 101 of file t4fw_ri_api.h.

enum fw_ri_init_p2ptype
Enumerator:
FW_RI_INIT_P2PTYPE_RDMA_WRITE 
FW_RI_INIT_P2PTYPE_READ_REQ 
FW_RI_INIT_P2PTYPE_SEND 
FW_RI_INIT_P2PTYPE_SEND_WITH_INV 
FW_RI_INIT_P2PTYPE_SEND_WITH_SE 
FW_RI_INIT_P2PTYPE_SEND_WITH_SE_INV 
FW_RI_INIT_P2PTYPE_DISABLED 

Definition at line 688 of file t4fw_ri_api.h.

enum fw_ri_mem_perms
Enumerator:
FW_RI_MEM_ACCESS_REM_WRITE 
FW_RI_MEM_ACCESS_REM_READ 
FW_RI_MEM_ACCESS_REM 
FW_RI_MEM_ACCESS_LOCAL_WRITE 
FW_RI_MEM_ACCESS_LOCAL_READ 
FW_RI_MEM_ACCESS_LOCAL 

Definition at line 85 of file t4fw_ri_api.h.

enum fw_ri_mpa_attrs
Enumerator:
FW_RI_MPA_RX_MARKER_ENABLE 
FW_RI_MPA_TX_MARKER_ENABLE 
FW_RI_MPA_CRC_ENABLE 
FW_RI_MPA_IETF_ENABLE 

Definition at line 65 of file t4fw_ri_api.h.

enum fw_ri_qp_caps
Enumerator:
FW_RI_QP_RDMA_READ_ENABLE 
FW_RI_QP_RDMA_WRITE_ENABLE 
FW_RI_QP_BIND_ENABLE 
FW_RI_QP_FAST_REGISTER_ENABLE 
FW_RI_QP_STAG0_ENABLE 

Definition at line 72 of file t4fw_ri_api.h.

enum fw_ri_res_op
Enumerator:
FW_RI_RES_OP_WRITE 
FW_RI_RES_OP_RESET 

Definition at line 268 of file t4fw_ri_api.h.

enum fw_ri_res_type
Enumerator:
FW_RI_RES_TYPE_SQ 
FW_RI_RES_TYPE_RQ 
FW_RI_RES_TYPE_CQ 

Definition at line 262 of file t4fw_ri_api.h.

enum fw_ri_sgl_depth
Enumerator:
FW_RI_SGL_DEPTH_MAX_SQ 
FW_RI_SGL_DEPTH_MAX_RQ 

Definition at line 107 of file t4fw_ri_api.h.

enum fw_ri_stag_type
Enumerator:
FW_RI_STAG_NSMR 
FW_RI_STAG_SMR 
FW_RI_STAG_MW 
FW_RI_STAG_MW_RELAXED 

Definition at line 94 of file t4fw_ri_api.h.

enum fw_ri_type
Enumerator:
FW_RI_TYPE_INIT 
FW_RI_TYPE_FINI 
FW_RI_TYPE_TERMINATE 

Definition at line 682 of file t4fw_ri_api.h.

enum fw_ri_wr_flags
Enumerator:
FW_RI_COMPLETION_FLAG 
FW_RI_NOTIFICATION_FLAG 
FW_RI_SOLICITED_EVENT_FLAG 
FW_RI_READ_FENCE_FLAG 
FW_RI_LOCAL_FENCE_FLAG 
FW_RI_RDMA_READ_INVALIDATE 

Definition at line 56 of file t4fw_ri_api.h.

enum fw_ri_wr_opcode
Enumerator:
FW_RI_RDMA_WRITE 
FW_RI_READ_REQ 
FW_RI_READ_RESP 
FW_RI_SEND 
FW_RI_SEND_WITH_INV 
FW_RI_SEND_WITH_SE 
FW_RI_SEND_WITH_SE_INV 
FW_RI_TERMINATE 
FW_RI_RDMA_INIT 
FW_RI_BIND_MW 
FW_RI_FAST_REGISTER 
FW_RI_LOCAL_INV 
FW_RI_QP_MODIFY 
FW_RI_BYPASS 
FW_RI_RECEIVE 
FW_RI_SGE_EC_CR_RETURN 

Definition at line 36 of file t4fw_ri_api.h.

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