Linux Kernel
3.7.1
|
#include <linux/types.h>
Go to the source code of this file.
Data Structures | |
struct | cyclades_monitor |
struct | cyclades_idle_stats |
struct | CYZ_BOOT_CTRL |
struct | CUSTOM_REG |
struct | RUNTIME_9060 |
struct | FIRM_ID |
struct | CH_CTRL |
struct | BUF_CTRL |
struct | BOARD_CTRL |
struct | INT_QUEUE |
struct | ZFW_CTRL |
Macros | |
#define | CYCLADES_MAGIC 0x4359 |
#define | CYGETMON 0x435901 |
#define | CYGETTHRESH 0x435902 |
#define | CYSETTHRESH 0x435903 |
#define | CYGETDEFTHRESH 0x435904 |
#define | CYSETDEFTHRESH 0x435905 |
#define | CYGETTIMEOUT 0x435906 |
#define | CYSETTIMEOUT 0x435907 |
#define | CYGETDEFTIMEOUT 0x435908 |
#define | CYSETDEFTIMEOUT 0x435909 |
#define | CYSETRFLOW 0x43590a |
#define | CYGETRFLOW 0x43590b |
#define | CYSETRTSDTR_INV 0x43590c |
#define | CYGETRTSDTR_INV 0x43590d |
#define | CYZSETPOLLCYCLE 0x43590e |
#define | CYZGETPOLLCYCLE 0x43590f |
#define | CYGETCD1400VER 0x435910 |
#define | CYSETWAIT 0x435912 |
#define | CYGETWAIT 0x435913 |
#define | CZIOC ('M' << 8) |
#define | CZ_NBOARDS (CZIOC|0xfa) |
#define | CZ_BOOT_START (CZIOC|0xfb) |
#define | CZ_BOOT_DATA (CZIOC|0xfc) |
#define | CZ_BOOT_END (CZIOC|0xfd) |
#define | CZ_TEST (CZIOC|0xfe) |
#define | CZ_DEF_POLL (HZ/25) |
#define | MAX_BOARD 4 /* Max number of boards */ |
#define | MAX_DEV 256 /* Max number of ports total */ |
#define | CYZ_MAX_SPEED 921600 |
#define | CYZ_FIFO_SIZE 16 |
#define | CYZ_BOOT_NWORDS 0x100 |
#define | DP_WINDOW_SIZE (0x00080000) /* window size 512 Kb */ |
#define | ZE_DP_WINDOW_SIZE |
#define | CTRL_WINDOW_SIZE (0x00000080) /* runtime regs 128 bytes */ |
#define | WIN_RAM 0x00000001L /* set the sliding window to RAM */ |
#define | WIN_CREG 0x14000001L /* set the window to custom Registers */ |
#define | TIMER_BY_1M 0x00 /* clock divided by 1M */ |
#define | TIMER_BY_256K 0x01 /* clock divided by 256k */ |
#define | TIMER_BY_128K 0x02 /* clock divided by 128k */ |
#define | TIMER_BY_32K 0x03 /* clock divided by 32k */ |
#define | MAX_CHAN 64 /* max number of channels per board */ |
#define | ID_ADDRESS 0x00000180L /* signature/pointer address */ |
#define | ZFIRM_ID 0x5557465AL /* ZFIRM/U signature */ |
#define | ZFIRM_HLT 0x59505B5CL /* ZFIRM needs external power supply */ |
#define | ZFIRM_RST 0x56040674L /* RST signal (due to FW reset) */ |
#define | ZF_TINACT_DEF |
#define | ZF_TINACT ZF_TINACT_DEF |
#define | C_OS_LINUX 0x00000030 /* generic Linux system */ |
#define | C_CH_DISABLE 0x00000000 /* channel is disabled */ |
#define | C_CH_TXENABLE 0x00000001 /* channel Tx enabled */ |
#define | C_CH_RXENABLE 0x00000002 /* channel Rx enabled */ |
#define | C_CH_ENABLE 0x00000003 /* channel Tx/Rx enabled */ |
#define | C_CH_LOOPBACK 0x00000004 /* Loopback mode */ |
#define | C_PR_NONE 0x00000000 /* None */ |
#define | C_PR_ODD 0x00000001 /* Odd */ |
#define | C_PR_EVEN 0x00000002 /* Even */ |
#define | C_PR_MARK 0x00000004 /* Mark */ |
#define | C_PR_SPACE 0x00000008 /* Space */ |
#define | C_PR_PARITY 0x000000ff |
#define | C_PR_DISCARD 0x00000100 /* discard char with frame/par error */ |
#define | C_PR_IGNORE 0x00000200 /* ignore frame/par error */ |
#define | C_DL_CS5 0x00000001 |
#define | C_DL_CS6 0x00000002 |
#define | C_DL_CS7 0x00000004 |
#define | C_DL_CS8 0x00000008 |
#define | C_DL_CS 0x0000000f |
#define | C_DL_1STOP 0x00000010 |
#define | C_DL_15STOP 0x00000020 |
#define | C_DL_2STOP 0x00000040 |
#define | C_DL_STOP 0x000000f0 |
#define | C_IN_DISABLE 0x00000000 /* zero, disable interrupts */ |
#define | C_IN_TXBEMPTY 0x00000001 /* tx buffer empty */ |
#define | C_IN_TXLOWWM 0x00000002 /* tx buffer below LWM */ |
#define | C_IN_RXHIWM 0x00000010 /* rx buffer above HWM */ |
#define | C_IN_RXNNDT 0x00000020 /* rx no new data timeout */ |
#define | C_IN_MDCD 0x00000100 /* modem DCD change */ |
#define | C_IN_MDSR 0x00000200 /* modem DSR change */ |
#define | C_IN_MRI 0x00000400 /* modem RI change */ |
#define | C_IN_MCTS 0x00000800 /* modem CTS change */ |
#define | C_IN_RXBRK 0x00001000 /* Break received */ |
#define | C_IN_PR_ERROR 0x00002000 /* parity error */ |
#define | C_IN_FR_ERROR 0x00004000 /* frame error */ |
#define | C_IN_OVR_ERROR 0x00008000 /* overrun error */ |
#define | C_IN_RXOFL 0x00010000 /* RX buffer overflow */ |
#define | C_IN_IOCTLW 0x00020000 /* I/O control w/ wait */ |
#define | C_IN_MRTS 0x00040000 /* modem RTS drop */ |
#define | C_IN_ICHAR 0x00080000 |
#define | C_FL_OXX 0x00000001 /* output Xon/Xoff flow control */ |
#define | C_FL_IXX 0x00000002 /* output Xon/Xoff flow control */ |
#define | C_FL_OIXANY 0x00000004 /* output Xon/Xoff (any xon) */ |
#define | C_FL_SWFLOW 0x0000000f |
#define | C_FS_TXIDLE 0x00000000 /* no Tx data in the buffer or UART */ |
#define | C_FS_SENDING 0x00000001 /* UART is sending data */ |
#define | C_FS_SWFLOW 0x00000002 /* Tx is stopped by received Xoff */ |
#define | C_RS_PARAM |
#define | C_RS_RTS 0x00000001 /* RTS */ |
#define | C_RS_DTR 0x00000004 /* DTR */ |
#define | C_RS_DCD 0x00000100 /* CD */ |
#define | C_RS_DSR 0x00000200 /* DSR */ |
#define | C_RS_RI 0x00000400 /* RI */ |
#define | C_RS_CTS 0x00000800 /* CTS */ |
#define | C_CM_RESET 0x01 /* reset/flush buffers */ |
#define | C_CM_IOCTL 0x02 /* re-read CH_CTRL */ |
#define | C_CM_IOCTLW 0x03 /* re-read CH_CTRL, intr when done */ |
#define | C_CM_IOCTLM 0x04 /* RS-232 outputs change */ |
#define | C_CM_SENDXOFF 0x10 /* send Xoff */ |
#define | C_CM_SENDXON 0x11 /* send Xon */ |
#define | C_CM_CLFLOW 0x12 /* Clear flow control (resume) */ |
#define | C_CM_SENDBRK 0x41 /* send break */ |
#define | C_CM_INTBACK 0x42 /* Interrupt back */ |
#define | C_CM_SET_BREAK 0x43 /* Tx break on */ |
#define | C_CM_CLR_BREAK 0x44 /* Tx break off */ |
#define | C_CM_CMD_DONE 0x45 /* Previous command done */ |
#define | C_CM_INTBACK2 0x46 /* Alternate Interrupt back */ |
#define | C_CM_TINACT 0x51 /* set inactivity detection */ |
#define | C_CM_IRQ_ENBL 0x52 /* enable generation of interrupts */ |
#define | C_CM_IRQ_DSBL 0x53 /* disable generation of interrupts */ |
#define | C_CM_ACK_ENBL 0x54 /* enable acknowledged interrupt mode */ |
#define | C_CM_ACK_DSBL 0x55 /* disable acknowledged intr mode */ |
#define | C_CM_FLUSH_RX 0x56 /* flushes Rx buffer */ |
#define | C_CM_FLUSH_TX 0x57 /* flushes Tx buffer */ |
#define | C_CM_Q_ENABLE |
#define | C_CM_Q_DISABLE |
#define | C_CM_TXBEMPTY 0x60 /* Tx buffer is empty */ |
#define | C_CM_TXLOWWM 0x61 /* Tx buffer low water mark */ |
#define | C_CM_RXHIWM 0x62 /* Rx buffer high water mark */ |
#define | C_CM_RXNNDT 0x63 /* rx no new data timeout */ |
#define | C_CM_TXFEMPTY 0x64 |
#define | C_CM_ICHAR 0x65 |
#define | C_CM_MDCD 0x70 /* modem DCD change */ |
#define | C_CM_MDSR 0x71 /* modem DSR change */ |
#define | C_CM_MRI 0x72 /* modem RI change */ |
#define | C_CM_MCTS 0x73 /* modem CTS change */ |
#define | C_CM_MRTS 0x74 /* modem RTS drop */ |
#define | C_CM_RXBRK 0x84 /* Break received */ |
#define | C_CM_PR_ERROR 0x85 /* Parity error */ |
#define | C_CM_FR_ERROR 0x86 /* Frame error */ |
#define | C_CM_OVR_ERROR 0x87 /* Overrun error */ |
#define | C_CM_RXOFL 0x88 /* RX buffer overflow */ |
#define | C_CM_CMDERROR 0x90 /* command error */ |
#define | C_CM_FATAL 0x91 /* fatal error */ |
#define | C_CM_HW_RESET 0x92 /* reset board */ |
#define | QUEUE_SIZE (10*MAX_CHAN) |
#define C_CH_DISABLE 0x00000000 /* channel is disabled */ |
Definition at line 265 of file cyclades.h.
#define C_CH_ENABLE 0x00000003 /* channel Tx/Rx enabled */ |
Definition at line 268 of file cyclades.h.
#define C_CH_LOOPBACK 0x00000004 /* Loopback mode */ |
Definition at line 269 of file cyclades.h.
#define C_CH_RXENABLE 0x00000002 /* channel Rx enabled */ |
Definition at line 267 of file cyclades.h.
#define C_CH_TXENABLE 0x00000001 /* channel Tx enabled */ |
Definition at line 266 of file cyclades.h.
#define C_CM_ACK_DSBL 0x55 /* disable acknowledged intr mode */ |
Definition at line 357 of file cyclades.h.
#define C_CM_ACK_ENBL 0x54 /* enable acknowledged interrupt mode */ |
Definition at line 356 of file cyclades.h.
#define C_CM_CLFLOW 0x12 /* Clear flow control (resume) */ |
Definition at line 346 of file cyclades.h.
#define C_CM_CLR_BREAK 0x44 /* Tx break off */ |
Definition at line 350 of file cyclades.h.
#define C_CM_CMD_DONE 0x45 /* Previous command done */ |
Definition at line 351 of file cyclades.h.
#define C_CM_CMDERROR 0x90 /* command error */ |
Definition at line 379 of file cyclades.h.
#define C_CM_FATAL 0x91 /* fatal error */ |
Definition at line 380 of file cyclades.h.
#define C_CM_FLUSH_RX 0x56 /* flushes Rx buffer */ |
Definition at line 358 of file cyclades.h.
#define C_CM_FLUSH_TX 0x57 /* flushes Tx buffer */ |
Definition at line 359 of file cyclades.h.
#define C_CM_FR_ERROR 0x86 /* Frame error */ |
Definition at line 376 of file cyclades.h.
#define C_CM_HW_RESET 0x92 /* reset board */ |
Definition at line 381 of file cyclades.h.
#define C_CM_ICHAR 0x65 |
Definition at line 368 of file cyclades.h.
#define C_CM_INTBACK 0x42 /* Interrupt back */ |
Definition at line 348 of file cyclades.h.
#define C_CM_INTBACK2 0x46 /* Alternate Interrupt back */ |
Definition at line 352 of file cyclades.h.
#define C_CM_IOCTL 0x02 /* re-read CH_CTRL */ |
Definition at line 341 of file cyclades.h.
#define C_CM_IOCTLM 0x04 /* RS-232 outputs change */ |
Definition at line 343 of file cyclades.h.
#define C_CM_IOCTLW 0x03 /* re-read CH_CTRL, intr when done */ |
Definition at line 342 of file cyclades.h.
#define C_CM_IRQ_DSBL 0x53 /* disable generation of interrupts */ |
Definition at line 355 of file cyclades.h.
#define C_CM_IRQ_ENBL 0x52 /* enable generation of interrupts */ |
Definition at line 354 of file cyclades.h.
#define C_CM_MCTS 0x73 /* modem CTS change */ |
Definition at line 372 of file cyclades.h.
#define C_CM_MDCD 0x70 /* modem DCD change */ |
Definition at line 369 of file cyclades.h.
#define C_CM_MDSR 0x71 /* modem DSR change */ |
Definition at line 370 of file cyclades.h.
#define C_CM_MRI 0x72 /* modem RI change */ |
Definition at line 371 of file cyclades.h.
#define C_CM_MRTS 0x74 /* modem RTS drop */ |
Definition at line 373 of file cyclades.h.
#define C_CM_OVR_ERROR 0x87 /* Overrun error */ |
Definition at line 377 of file cyclades.h.
#define C_CM_PR_ERROR 0x85 /* Parity error */ |
Definition at line 375 of file cyclades.h.
#define C_CM_Q_DISABLE |
Definition at line 361 of file cyclades.h.
#define C_CM_Q_ENABLE |
Definition at line 360 of file cyclades.h.
#define C_CM_RESET 0x01 /* reset/flush buffers */ |
Definition at line 340 of file cyclades.h.
#define C_CM_RXBRK 0x84 /* Break received */ |
Definition at line 374 of file cyclades.h.
#define C_CM_RXHIWM 0x62 /* Rx buffer high water mark */ |
Definition at line 365 of file cyclades.h.
#define C_CM_RXNNDT 0x63 /* rx no new data timeout */ |
Definition at line 366 of file cyclades.h.
#define C_CM_RXOFL 0x88 /* RX buffer overflow */ |
Definition at line 378 of file cyclades.h.
#define C_CM_SENDBRK 0x41 /* send break */ |
Definition at line 347 of file cyclades.h.
#define C_CM_SENDXOFF 0x10 /* send Xoff */ |
Definition at line 344 of file cyclades.h.
#define C_CM_SENDXON 0x11 /* send Xon */ |
Definition at line 345 of file cyclades.h.
#define C_CM_SET_BREAK 0x43 /* Tx break on */ |
Definition at line 349 of file cyclades.h.
#define C_CM_TINACT 0x51 /* set inactivity detection */ |
Definition at line 353 of file cyclades.h.
#define C_CM_TXBEMPTY 0x60 /* Tx buffer is empty */ |
Definition at line 363 of file cyclades.h.
#define C_CM_TXFEMPTY 0x64 |
Definition at line 367 of file cyclades.h.
#define C_CM_TXLOWWM 0x61 /* Tx buffer low water mark */ |
Definition at line 364 of file cyclades.h.
#define C_DL_15STOP 0x00000020 |
Definition at line 291 of file cyclades.h.
#define C_DL_1STOP 0x00000010 |
Definition at line 290 of file cyclades.h.
#define C_DL_2STOP 0x00000040 |
Definition at line 292 of file cyclades.h.
#define C_DL_CS 0x0000000f |
Definition at line 289 of file cyclades.h.
#define C_DL_CS5 0x00000001 |
Definition at line 285 of file cyclades.h.
#define C_DL_CS6 0x00000002 |
Definition at line 286 of file cyclades.h.
#define C_DL_CS7 0x00000004 |
Definition at line 287 of file cyclades.h.
#define C_DL_CS8 0x00000008 |
Definition at line 288 of file cyclades.h.
#define C_DL_STOP 0x000000f0 |
Definition at line 293 of file cyclades.h.
#define C_FL_IXX 0x00000002 /* output Xon/Xoff flow control */ |
Definition at line 318 of file cyclades.h.
#define C_FL_OIXANY 0x00000004 /* output Xon/Xoff (any xon) */ |
Definition at line 319 of file cyclades.h.
#define C_FL_OXX 0x00000001 /* output Xon/Xoff flow control */ |
Definition at line 317 of file cyclades.h.
#define C_FL_SWFLOW 0x0000000f |
Definition at line 320 of file cyclades.h.
#define C_FS_SENDING 0x00000001 /* UART is sending data */ |
Definition at line 325 of file cyclades.h.
#define C_FS_SWFLOW 0x00000002 /* Tx is stopped by received Xoff */ |
Definition at line 326 of file cyclades.h.
#define C_FS_TXIDLE 0x00000000 /* no Tx data in the buffer or UART */ |
Definition at line 324 of file cyclades.h.
#define C_IN_DISABLE 0x00000000 /* zero, disable interrupts */ |
Definition at line 297 of file cyclades.h.
#define C_IN_FR_ERROR 0x00004000 /* frame error */ |
Definition at line 308 of file cyclades.h.
#define C_IN_ICHAR 0x00080000 |
Definition at line 313 of file cyclades.h.
#define C_IN_IOCTLW 0x00020000 /* I/O control w/ wait */ |
Definition at line 311 of file cyclades.h.
#define C_IN_MCTS 0x00000800 /* modem CTS change */ |
Definition at line 305 of file cyclades.h.
#define C_IN_MDCD 0x00000100 /* modem DCD change */ |
Definition at line 302 of file cyclades.h.
#define C_IN_MDSR 0x00000200 /* modem DSR change */ |
Definition at line 303 of file cyclades.h.
#define C_IN_MRI 0x00000400 /* modem RI change */ |
Definition at line 304 of file cyclades.h.
#define C_IN_MRTS 0x00040000 /* modem RTS drop */ |
Definition at line 312 of file cyclades.h.
#define C_IN_OVR_ERROR 0x00008000 /* overrun error */ |
Definition at line 309 of file cyclades.h.
#define C_IN_PR_ERROR 0x00002000 /* parity error */ |
Definition at line 307 of file cyclades.h.
#define C_IN_RXBRK 0x00001000 /* Break received */ |
Definition at line 306 of file cyclades.h.
#define C_IN_RXHIWM 0x00000010 /* rx buffer above HWM */ |
Definition at line 300 of file cyclades.h.
#define C_IN_RXNNDT 0x00000020 /* rx no new data timeout */ |
Definition at line 301 of file cyclades.h.
#define C_IN_RXOFL 0x00010000 /* RX buffer overflow */ |
Definition at line 310 of file cyclades.h.
#define C_IN_TXBEMPTY 0x00000001 /* tx buffer empty */ |
Definition at line 298 of file cyclades.h.
#define C_IN_TXLOWWM 0x00000002 /* tx buffer below LWM */ |
Definition at line 299 of file cyclades.h.
#define C_OS_LINUX 0x00000030 /* generic Linux system */ |
Definition at line 261 of file cyclades.h.
#define C_PR_DISCARD 0x00000100 /* discard char with frame/par error */ |
Definition at line 280 of file cyclades.h.
#define C_PR_EVEN 0x00000002 /* Even */ |
Definition at line 275 of file cyclades.h.
#define C_PR_IGNORE 0x00000200 /* ignore frame/par error */ |
Definition at line 281 of file cyclades.h.
#define C_PR_MARK 0x00000004 /* Mark */ |
Definition at line 276 of file cyclades.h.
#define C_PR_NONE 0x00000000 /* None */ |
Definition at line 273 of file cyclades.h.
#define C_PR_ODD 0x00000001 /* Odd */ |
Definition at line 274 of file cyclades.h.
#define C_PR_PARITY 0x000000ff |
Definition at line 278 of file cyclades.h.
#define C_PR_SPACE 0x00000008 /* Space */ |
Definition at line 277 of file cyclades.h.
#define C_RS_CTS 0x00000800 /* CTS */ |
Definition at line 336 of file cyclades.h.
#define C_RS_DCD 0x00000100 /* CD */ |
Definition at line 333 of file cyclades.h.
#define C_RS_DSR 0x00000200 /* DSR */ |
Definition at line 334 of file cyclades.h.
#define C_RS_DTR 0x00000004 /* DTR */ |
Definition at line 332 of file cyclades.h.
#define C_RS_PARAM |
Definition at line 330 of file cyclades.h.
#define C_RS_RI 0x00000400 /* RI */ |
Definition at line 335 of file cyclades.h.
#define C_RS_RTS 0x00000001 /* RTS */ |
Definition at line 331 of file cyclades.h.
#define CTRL_WINDOW_SIZE (0x00000080) /* runtime regs 128 bytes */ |
Definition at line 151 of file cyclades.h.
#define CYCLADES_MAGIC 0x4359 |
Definition at line 95 of file cyclades.h.
#define CYGETCD1400VER 0x435910 |
Definition at line 112 of file cyclades.h.
#define CYGETDEFTHRESH 0x435904 |
Definition at line 100 of file cyclades.h.
#define CYGETDEFTIMEOUT 0x435908 |
Definition at line 104 of file cyclades.h.
#define CYGETMON 0x435901 |
Definition at line 97 of file cyclades.h.
#define CYGETRFLOW 0x43590b |
Definition at line 107 of file cyclades.h.
#define CYGETRTSDTR_INV 0x43590d |
Definition at line 109 of file cyclades.h.
#define CYGETTHRESH 0x435902 |
Definition at line 98 of file cyclades.h.
#define CYGETTIMEOUT 0x435906 |
Definition at line 102 of file cyclades.h.
#define CYGETWAIT 0x435913 |
Definition at line 114 of file cyclades.h.
#define CYSETDEFTHRESH 0x435905 |
Definition at line 101 of file cyclades.h.
#define CYSETDEFTIMEOUT 0x435909 |
Definition at line 105 of file cyclades.h.
#define CYSETRFLOW 0x43590a |
Definition at line 106 of file cyclades.h.
#define CYSETRTSDTR_INV 0x43590c |
Definition at line 108 of file cyclades.h.
#define CYSETTHRESH 0x435903 |
Definition at line 99 of file cyclades.h.
#define CYSETTIMEOUT 0x435907 |
Definition at line 103 of file cyclades.h.
#define CYSETWAIT 0x435912 |
Definition at line 113 of file cyclades.h.
#define CYZ_BOOT_NWORDS 0x100 |
Definition at line 133 of file cyclades.h.
#define CYZ_FIFO_SIZE 16 |
Definition at line 131 of file cyclades.h.
#define CYZ_MAX_SPEED 921600 |
Definition at line 129 of file cyclades.h.
#define CYZGETPOLLCYCLE 0x43590f |
Definition at line 111 of file cyclades.h.
#define CYZSETPOLLCYCLE 0x43590e |
Definition at line 110 of file cyclades.h.
#define CZ_BOOT_DATA (CZIOC|0xfc) |
Definition at line 121 of file cyclades.h.
#define CZ_BOOT_END (CZIOC|0xfd) |
Definition at line 122 of file cyclades.h.
#define CZ_BOOT_START (CZIOC|0xfb) |
Definition at line 120 of file cyclades.h.
#define CZ_DEF_POLL (HZ/25) |
Definition at line 125 of file cyclades.h.
#define CZ_NBOARDS (CZIOC|0xfa) |
Definition at line 119 of file cyclades.h.
#define CZ_TEST (CZIOC|0xfe) |
Definition at line 123 of file cyclades.h.
#define CZIOC ('M' << 8) |
Definition at line 118 of file cyclades.h.
#define DP_WINDOW_SIZE (0x00080000) /* window size 512 Kb */ |
Definition at line 149 of file cyclades.h.
#define ID_ADDRESS 0x00000180L /* signature/pointer address */ |
Definition at line 246 of file cyclades.h.
#define MAX_BOARD 4 /* Max number of boards */ |
Definition at line 127 of file cyclades.h.
Definition at line 242 of file cyclades.h.
Definition at line 128 of file cyclades.h.
#define QUEUE_SIZE (10*MAX_CHAN) |
Definition at line 464 of file cyclades.h.
#define TIMER_BY_128K 0x02 /* clock divided by 128k */ |
Definition at line 226 of file cyclades.h.
#define TIMER_BY_1M 0x00 /* clock divided by 1M */ |
Definition at line 224 of file cyclades.h.
#define TIMER_BY_256K 0x01 /* clock divided by 256k */ |
Definition at line 225 of file cyclades.h.
#define TIMER_BY_32K 0x03 /* clock divided by 32k */ |
Definition at line 227 of file cyclades.h.
#define WIN_CREG 0x14000001L /* set the window to custom Registers */ |
Definition at line 220 of file cyclades.h.
#define WIN_RAM 0x00000001L /* set the sliding window to RAM */ |
Definition at line 219 of file cyclades.h.
#define ZE_DP_WINDOW_SIZE |
Definition at line 150 of file cyclades.h.
#define ZF_TINACT ZF_TINACT_DEF |
Definition at line 252 of file cyclades.h.
#define ZF_TINACT_DEF |
Definition at line 251 of file cyclades.h.
#define ZFIRM_HLT 0x59505B5CL /* ZFIRM needs external power supply */ |
Definition at line 248 of file cyclades.h.
#define ZFIRM_ID 0x5557465AL /* ZFIRM/U signature */ |
Definition at line 247 of file cyclades.h.
#define ZFIRM_RST 0x56040674L /* RST signal (due to FW reset) */ |
Definition at line 249 of file cyclades.h.