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#define HDLCDRV_PARMASK_DMA (1<<2) |
#define HDLCDRV_PARMASK_DMA2 (1<<3) |
#define HDLCDRV_PARMASK_IOBASE (1<<0) |
#define HDLCDRV_PARMASK_IRQ (1<<1) |
#define HDLCDRV_PARMASK_MIDIIOBASE (1<<6) |
#define HDLCDRV_PARMASK_PARIOBASE (1<<5) |
#define HDLCDRV_PARMASK_SERIOBASE (1<<4) |
#define HDLCDRVCTL_CALIBRATE 21 |
#define HDLCDRVCTL_DRIVERNAME 43 |
#define HDLCDRVCTL_GETBITS 31 |
#define HDLCDRVCTL_GETCHANNELPAR 10 |
#define HDLCDRVCTL_GETMODE 40 |
#define HDLCDRVCTL_GETMODEMPAR 0 |
#define HDLCDRVCTL_GETSAMPLES 30 |
#define HDLCDRVCTL_GETSTAT 22 |
#define HDLCDRVCTL_MODELIST 42 |
#define HDLCDRVCTL_MODEMPARMASK 2 /* not handled by hdlcdrv */ |
#define HDLCDRVCTL_OLDGETSTAT 20 |
#define HDLCDRVCTL_SETCHANNELPAR 11 |
#define HDLCDRVCTL_SETMODE 41 |
#define HDLCDRVCTL_SETMODEMPAR 1 |