20 static u8 mt352_clock_config[] = { 0x89, 0xb8, 0x2d };
21 static u8 mt352_reset[] = { 0x50, 0x80 };
22 static u8 mt352_mclk_ratio[] = { 0x8b, 0x00 };
23 static u8 mt352_adc_ctl_1_cfg[] = { 0x8E, 0x40 };
24 static u8 mt352_agc_cfg[] = { 0x67, 0x10, 0xa0 };
26 static u8 mt352_sec_agc_cfg1[] = { 0x6a, 0xff };
27 static u8 mt352_sec_agc_cfg2[] = { 0x6d, 0xff };
28 static u8 mt352_sec_agc_cfg3[] = { 0x70, 0x40 };
29 static u8 mt352_sec_agc_cfg4[] = { 0x7b, 0x03 };
30 static u8 mt352_sec_agc_cfg5[] = { 0x7d, 0x0f };
32 static u8 mt352_acq_ctl[] = { 0x53, 0x50 };
33 static u8 mt352_input_freq_1[] = { 0x56, 0x31, 0x06 };
35 mt352_write(fe, mt352_clock_config,
sizeof(mt352_clock_config));
37 mt352_write(fe, mt352_reset,
sizeof(mt352_reset));
38 mt352_write(fe, mt352_mclk_ratio,
sizeof(mt352_mclk_ratio));
40 mt352_write(fe, mt352_adc_ctl_1_cfg,
sizeof(mt352_adc_ctl_1_cfg));
41 mt352_write(fe, mt352_agc_cfg,
sizeof(mt352_agc_cfg));
43 mt352_write(fe, mt352_sec_agc_cfg1,
sizeof(mt352_sec_agc_cfg1));
44 mt352_write(fe, mt352_sec_agc_cfg2,
sizeof(mt352_sec_agc_cfg2));
45 mt352_write(fe, mt352_sec_agc_cfg3,
sizeof(mt352_sec_agc_cfg3));
46 mt352_write(fe, mt352_sec_agc_cfg4,
sizeof(mt352_sec_agc_cfg4));
47 mt352_write(fe, mt352_sec_agc_cfg5,
sizeof(mt352_sec_agc_cfg5));
49 mt352_write(fe, mt352_acq_ctl,
sizeof(mt352_acq_ctl));
50 mt352_write(fe, mt352_input_freq_1,
sizeof(mt352_input_freq_1));
60 umt_config.demod_init = umt_mt352_demod_init;
61 umt_config.demod_address = 0xf;
98 .firmware =
"dvb-usb-umt-010-02.fw",
106 .frontend_attach = umt_mt352_frontend_attach,
107 .tuner_attach = umt_tuner_attach,
128 .generic_bulk_ctrl_endpoint = 0x01,
130 .num_device_descs = 1,
132 {
"Hanftek UMT-010 DVB-T USB2.0",
133 { &umt_table[0],
NULL },
134 { &umt_table[1],
NULL },
139 static struct usb_driver umt_driver = {
140 .name =
"dvb_usb_umt_010",
143 .id_table = umt_table,