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arch
unicore32
mm
flush.c
Go to the documentation of this file.
1
/*
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* linux/arch/unicore32/mm/flush.c
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*
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* Code specific to PKUnity SoC and UniCore ISA
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*
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* Copyright (C) 2001-2010 GUAN Xue-tao
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <
linux/mm.h
>
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#include <
linux/pagemap.h
>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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void
flush_cache_mm
(
struct
mm_struct
*mm)
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{
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}
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void
flush_cache_range
(
struct
vm_area_struct
*vma,
unsigned
long
start
,
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unsigned
long
end
)
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{
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if
(vma->
vm_flags
& VM_EXEC)
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__flush_icache_all();
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}
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void
flush_cache_page
(
struct
vm_area_struct
*vma,
unsigned
long
user_addr,
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unsigned
long
pfn)
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{
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}
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static
void
flush_ptrace_access
(
struct
vm_area_struct
*vma,
struct
page
*
page
,
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unsigned
long
uaddr
,
void
*kaddr,
unsigned
long
len)
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{
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/* VIPT non-aliasing D-cache */
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if
(vma->
vm_flags
& VM_EXEC) {
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unsigned
long
addr
= (
unsigned
long
)kaddr;
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__cpuc_coherent_kern_range
(addr, addr + len);
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}
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}
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/*
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* Copy user data from/to a page which is mapped into a different
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* processes address space. Really, we want to allow our "user
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* space" model to handle this.
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*
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* Note that this code needs to run on the current CPU.
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*/
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void
copy_to_user_page
(
struct
vm_area_struct
*vma,
struct
page *page,
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unsigned
long
uaddr,
void
*
dst
,
const
void
*
src
,
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unsigned
long
len)
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{
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memcpy
(dst, src, len);
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flush_ptrace_access
(vma, page, uaddr, dst, len);
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}
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void
__flush_dcache_page
(
struct
address_space
*
mapping
,
struct
page *page)
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{
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/*
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* Writeback any data associated with the kernel mapping of this
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* page. This ensures that data in the physical page is mutually
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* coherent with the kernels mapping.
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*/
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__cpuc_flush_kern_dcache_area
(
page_address
(page),
PAGE_SIZE
);
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}
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/*
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* Ensure cache coherency between kernel mapping and userspace mapping
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* of this page.
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*/
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void
flush_dcache_page
(
struct
page *page)
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{
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struct
address_space
*
mapping
;
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/*
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* The zero page is never written to, so never has any dirty
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* cache lines, and therefore never needs to be flushed.
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*/
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if
(page ==
ZERO_PAGE
(0))
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return
;
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mapping = page_mapping(page);
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if
(mapping && !mapping_mapped(mapping))
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clear_bit
(
PG_dcache_clean
, &page->
flags
);
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else
{
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__flush_dcache_page
(mapping, page);
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if
(mapping)
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__flush_icache_all();
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set_bit
(
PG_dcache_clean
, &page->
flags
);
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}
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}
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EXPORT_SYMBOL
(
flush_dcache_page
);
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