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11 #ifndef __ASM_ARCH_USB_H
12 #define __ASM_ARCH_USB_H
15 #define CFGCHIP2_PHYCLKGD (1 << 17)
16 #define CFGCHIP2_VBUSSENSE (1 << 16)
17 #define CFGCHIP2_RESET (1 << 15)
18 #define CFGCHIP2_OTGMODE (3 << 13)
19 #define CFGCHIP2_NO_OVERRIDE (0 << 13)
20 #define CFGCHIP2_FORCE_HOST (1 << 13)
21 #define CFGCHIP2_FORCE_DEVICE (2 << 13)
22 #define CFGCHIP2_FORCE_HOST_VBUS_LOW (3 << 13)
23 #define CFGCHIP2_USB1PHYCLKMUX (1 << 12)
24 #define CFGCHIP2_USB2PHYCLKMUX (1 << 11)
25 #define CFGCHIP2_PHYPWRDN (1 << 10)
26 #define CFGCHIP2_OTGPWRDN (1 << 9)
27 #define CFGCHIP2_DATPOL (1 << 8)
28 #define CFGCHIP2_USB1SUSPENDM (1 << 7)
29 #define CFGCHIP2_PHY_PLLON (1 << 6)
30 #define CFGCHIP2_SESENDEN (1 << 5)
31 #define CFGCHIP2_VBDTCTEN (1 << 4)
32 #define CFGCHIP2_REFFREQ (0xf << 0)
33 #define CFGCHIP2_REFFREQ_12MHZ (1 << 0)
34 #define CFGCHIP2_REFFREQ_24MHZ (2 << 0)
35 #define CFGCHIP2_REFFREQ_48MHZ (3 << 0)