#include "i915_reg.h"
#include "intel_bios.h"
#include "intel_ringbuffer.h"
#include <linux/io-mapping.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-bit.h>
#include <drm/intel-gtt.h>
#include <linux/backlight.h>
#include <linux/intel-iommu.h>
#include <linux/kref.h>
#include "i915_trace.h"

Data Structures
struct	intel_pch_pll

struct	drm_i915_gem_phys_object

struct	mem_block

struct	intel_opregion

struct	drm_i915_master_private

struct	drm_i915_fence_reg

struct	sdvo_device_mapping

struct	drm_i915_error_state

struct	drm_i915_error_state::drm_i915_error_ring

struct	drm_i915_error_state::drm_i915_error_ring::drm_i915_error_object

struct	drm_i915_error_state::drm_i915_error_ring::drm_i915_error_request

struct	drm_i915_error_state::drm_i915_error_buffer

struct	drm_i915_display_funcs

struct	drm_i915_gt_funcs

struct	intel_device_info

struct	i915_hw_ppgtt

struct	i915_hw_context

struct	intel_gmbus

struct	drm_i915_private

struct	drm_i915_gem_object_ops

struct	drm_i915_gem_object

struct	drm_i915_gem_request

struct	drm_i915_file_private

Macros
#define	DRIVER_AUTHOR "Tungsten Graphics, Inc."

#define	DRIVER_NAME "i915"

#define	DRIVER_DESC "Intel Graphics"

#define	DRIVER_DATE "20080730"

#define	pipe_name(p) ((p) + 'A')

#define	plane_name(p) ((p) + 'A')

#define	port_name(p) ((p) + 'A')

#define	I915_GEM_GPU_DOMAINS (~(I915_GEM_DOMAIN_CPU \| I915_GEM_DOMAIN_GTT))

#define	for_each_pipe(p) for ((p) = 0; (p) < dev_priv->num_pipe; (p)++)

#define	for_each_encoder_on_crtc(dev, __crtc, intel_encoder)

#define	I915_NUM_PLLS 2

#define	DRIVER_MAJOR 1

#define	DRIVER_MINOR 6

#define	DRIVER_PATCHLEVEL 0

#define	WATCH_COHERENCY 0

#define	WATCH_LISTS 0

#define	WATCH_GTT 0

#define	I915_GEM_PHYS_CURSOR_0 1

#define	I915_GEM_PHYS_CURSOR_1 2

#define	I915_GEM_PHYS_OVERLAY_REGS 3

#define	I915_MAX_PHYS_OBJECT (I915_GEM_PHYS_OVERLAY_REGS)

#define	OPREGION_SIZE (8*1024)

#define	I915_FENCE_REG_NONE -1

#define	I915_MAX_NUM_FENCES 16

#define	I915_MAX_NUM_FENCE_BITS 5

#define	DEV_INFO_FLAGS

#define	I915_PPGTT_PD_ENTRIES 512

#define	I915_PPGTT_PT_ENTRIES 1024

#define	DEFAULT_CONTEXT_ID 0

#define	QUIRK_PIPEA_FORCE (1<<0)

#define	QUIRK_LVDS_SSC_DISABLE (1<<1)

#define	QUIRK_INVERT_BRIGHTNESS (1<<2)

#define	DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */

#define	for_each_ring(ring__, dev_priv__, i__)

#define	DRM_I915_GEM_OBJECT_MAX_PIN_COUNT 0xf

#define	to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base)

#define	INTEL_INFO(dev) (((struct drm_i915_private *) (dev)->dev_private)->info)

#define	IS_I830(dev) ((dev)->pci_device == 0x3577)

#define	IS_845G(dev) ((dev)->pci_device == 0x2562)

#define	IS_I85X(dev) (INTEL_INFO(dev)->is_i85x)

#define	IS_I865G(dev) ((dev)->pci_device == 0x2572)

#define	IS_I915G(dev) (INTEL_INFO(dev)->is_i915g)

#define	IS_I915GM(dev) ((dev)->pci_device == 0x2592)

#define	IS_I945G(dev) ((dev)->pci_device == 0x2772)

#define	IS_I945GM(dev) (INTEL_INFO(dev)->is_i945gm)

#define	IS_BROADWATER(dev) (INTEL_INFO(dev)->is_broadwater)

#define	IS_CRESTLINE(dev) (INTEL_INFO(dev)->is_crestline)

#define	IS_GM45(dev) ((dev)->pci_device == 0x2A42)

#define	IS_G4X(dev) (INTEL_INFO(dev)->is_g4x)

#define	IS_PINEVIEW_G(dev) ((dev)->pci_device == 0xa001)

#define	IS_PINEVIEW_M(dev) ((dev)->pci_device == 0xa011)

#define	IS_PINEVIEW(dev) (INTEL_INFO(dev)->is_pineview)

#define	IS_G33(dev) (INTEL_INFO(dev)->is_g33)

#define	IS_IRONLAKE_D(dev) ((dev)->pci_device == 0x0042)

#define	IS_IRONLAKE_M(dev) ((dev)->pci_device == 0x0046)

#define	IS_IVYBRIDGE(dev) (INTEL_INFO(dev)->is_ivybridge)

#define	IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview)

#define	IS_HASWELL(dev) (INTEL_INFO(dev)->is_haswell)

#define	IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)

#define	IS_GEN2(dev) (INTEL_INFO(dev)->gen == 2)

#define	IS_GEN3(dev) (INTEL_INFO(dev)->gen == 3)

#define	IS_GEN4(dev) (INTEL_INFO(dev)->gen == 4)

#define	IS_GEN5(dev) (INTEL_INFO(dev)->gen == 5)

#define	IS_GEN6(dev) (INTEL_INFO(dev)->gen == 6)

#define	IS_GEN7(dev) (INTEL_INFO(dev)->gen == 7)

#define	HAS_BSD(dev) (INTEL_INFO(dev)->has_bsd_ring)

#define	HAS_BLT(dev) (INTEL_INFO(dev)->has_blt_ring)

#define	HAS_LLC(dev) (INTEL_INFO(dev)->has_llc)

#define	I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)

#define	HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 6)

#define	HAS_ALIASING_PPGTT(dev) (INTEL_INFO(dev)->gen >=6 && !IS_VALLEYVIEW(dev))

#define	HAS_OVERLAY(dev) (INTEL_INFO(dev)->has_overlay)

#define	OVERLAY_NEEDS_PHYSICAL(dev) (INTEL_INFO(dev)->overlay_needs_physical)

#define	HAS_128_BYTE_Y_TILING(dev)

#define	SUPPORTS_DIGITAL_OUTPUTS(dev) (!IS_GEN2(dev) && !IS_PINEVIEW(dev))

#define	SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) \|\| IS_GEN5(dev))

#define	SUPPORTS_INTEGRATED_DP(dev) (IS_G4X(dev) \|\| IS_GEN5(dev))

#define	SUPPORTS_EDP(dev) (IS_IRONLAKE_M(dev))

#define	SUPPORTS_TV(dev) (INTEL_INFO(dev)->supports_tv)

#define	I915_HAS_HOTPLUG(dev) (INTEL_INFO(dev)->has_hotplug)

#define	DSPARB_HWCONTROL(dev) (IS_G4X(dev) \|\| IS_IRONLAKE(dev))

#define	HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2)

#define	HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)

#define	I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)

#define	HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5)

#define	INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)->dev_private)->pch_type)

#define	HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT)

#define	HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)

#define	HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)

#define	HAS_PCH_SPLIT(dev) (INTEL_PCH_TYPE(dev) != PCH_NONE)

#define	HAS_FORCE_WAKE(dev) (INTEL_INFO(dev)->has_force_wake)

#define	HAS_L3_GPU_CACHE(dev) (IS_IVYBRIDGE(dev) \|\| IS_HASWELL(dev))

#define	GT_FREQUENCY_MULTIPLIER 50

#define	INTEL_RC6_ENABLE (1<<0)

#define	INTEL_RC6p_ENABLE (1<<1)

#define	INTEL_RC6pp_ENABLE (1<<2)

#define	i915_destroy_error_state(x)

#define	i915_verify_lists(dev) 0

#define	__i915_read(x, y) u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg);

#define	__i915_write(x, y) void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val);

#define	I915_READ8(reg) i915_read8(dev_priv, (reg))

#define	I915_WRITE8(reg, val) i915_write8(dev_priv, (reg), (val))

#define	I915_READ16(reg) i915_read16(dev_priv, (reg))

#define	I915_WRITE16(reg, val) i915_write16(dev_priv, (reg), (val))

#define	I915_READ16_NOTRACE(reg) readw(dev_priv->regs + (reg))

#define	I915_WRITE16_NOTRACE(reg, val) writew(val, dev_priv->regs + (reg))

#define	I915_READ(reg) i915_read32(dev_priv, (reg))

#define	I915_WRITE(reg, val) i915_write32(dev_priv, (reg), (val))

#define	I915_READ_NOTRACE(reg) readl(dev_priv->regs + (reg))

#define	I915_WRITE_NOTRACE(reg, val) writel(val, dev_priv->regs + (reg))

#define	I915_WRITE64(reg, val) i915_write64(dev_priv, (reg), (val))

#define	I915_READ64(reg) i915_read64(dev_priv, (reg))

#define	POSTING_READ(reg) (void)I915_READ_NOTRACE(reg)

#define	POSTING_READ16(reg) (void)I915_READ16_NOTRACE(reg)

Typedefs
typedef struct drm_i915_private	drm_i915_private_t

Enumerations
enum	pipe { PIPE_A = 0, PIPE_B, PIPE_C, I915_MAX_PIPES }

enum	plane { PLANE_A = 0, PLANE_B, PLANE_C }

enum	port { PORT_A = 0, PORT_B, PORT_C, PORT_D, PORT_E, I915_MAX_PORTS, CX25821_UNDEFINED = 0, CX25821_RAW, CX25821_264, software_reset = 0x0000, selftest = 0x0001, selective_reset = 0x0002 }

enum	no_fbc_reason { FBC_NO_OUTPUT, FBC_STOLEN_TOO_SMALL, FBC_UNSUPPORTED_MODE, FBC_MODE_TOO_LARGE, FBC_BAD_PLANE, FBC_NOT_TILED, FBC_MULTIPLE_PIPES, FBC_MODULE_PARAM }

enum	intel_pch { PCH_NONE = 0, PCH_IBX, PCH_CPT, PCH_LPT }

enum	hdmi_force_audio { HDMI_AUDIO_OFF_DVI = -2, HDMI_AUDIO_OFF, HDMI_AUDIO_AUTO, HDMI_AUDIO_ON }

enum	i915_cache_level { I915_CACHE_NONE = 0, I915_CACHE_LLC, I915_CACHE_LLC_MLC }

Functions
int	i915_suspend (struct drm_device *dev, pm_message_t state)

int	i915_resume (struct drm_device *dev)

int	i915_master_create (struct drm_device dev, struct drm_master master)

void	i915_master_destroy (struct drm_device dev, struct drm_master master)

void	i915_update_dri1_breadcrumb (struct drm_device *dev)

void	i915_kernel_lost_context (struct drm_device *dev)

int	i915_driver_load (struct drm_device *, unsigned long flags)

int	i915_driver_unload (struct drm_device *)

int	i915_driver_open (struct drm_device dev, struct drm_file file_priv)

void	i915_driver_lastclose (struct drm_device *dev)

void	i915_driver_preclose (struct drm_device dev, struct drm_file file_priv)

void	i915_driver_postclose (struct drm_device dev, struct drm_file file_priv)

int	i915_driver_device_is_agp (struct drm_device *dev)

int	i915_emit_box (struct drm_device dev, struct drm_clip_rect box, int DR1, int DR4)

int	intel_gpu_reset (struct drm_device *dev)

int	i915_reset (struct drm_device *dev)

unsigned long	i915_chipset_val (struct drm_i915_private *dev_priv)

unsigned long	i915_mch_val (struct drm_i915_private *dev_priv)

unsigned long	i915_gfx_val (struct drm_i915_private *dev_priv)

void	i915_update_gfx_val (struct drm_i915_private *dev_priv)

void	i915_hangcheck_elapsed (unsigned long data)

void	i915_handle_error (struct drm_device *dev, bool wedged)

void	intel_irq_init (struct drm_device *dev)

void	intel_gt_init (struct drm_device *dev)

void	i915_error_state_free (struct kref *error_ref)

void	i915_enable_pipestat (drm_i915_private_t *dev_priv, int pipe, u32 mask)

void	i915_disable_pipestat (drm_i915_private_t *dev_priv, int pipe, u32 mask)

void	intel_enable_asle (struct drm_device *dev)

int	i915_gem_init_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_create_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_pread_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_pwrite_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_mmap_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_mmap_gtt_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_set_domain_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_sw_finish_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_execbuffer (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_execbuffer2 (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_pin_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_unpin_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_busy_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_get_caching_ioctl (struct drm_device dev, void data, struct drm_file *file)

int	i915_gem_set_caching_ioctl (struct drm_device dev, void data, struct drm_file *file)

int	i915_gem_throttle_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_madvise_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_entervt_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_leavevt_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_set_tiling (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_get_tiling (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_get_aperture_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

int	i915_gem_wait_ioctl (struct drm_device dev, void data, struct drm_file *file_priv)

void	i915_gem_load (struct drm_device *dev)

int	i915_gem_init_object (struct drm_gem_object *obj)

void	i915_gem_object_init (struct drm_i915_gem_object obj, const struct drm_i915_gem_object_ops ops)

struct drm_i915_gem_object *	i915_gem_alloc_object (struct drm_device *dev, size_t size)

void	i915_gem_free_object (struct drm_gem_object *obj)

int __must_check	i915_gem_object_pin (struct drm_i915_gem_object *obj, uint32_t alignment, bool map_and_fenceable, bool nonblocking)

void	i915_gem_object_unpin (struct drm_i915_gem_object *obj)

int __must_check	i915_gem_object_unbind (struct drm_i915_gem_object *obj)

void	i915_gem_release_mmap (struct drm_i915_gem_object *obj)

void	i915_gem_lastclose (struct drm_device *dev)

int __must_check	i915_gem_object_get_pages (struct drm_i915_gem_object *obj)

int __must_check	i915_mutex_lock_interruptible (struct drm_device *dev)

int	i915_gem_object_sync (struct drm_i915_gem_object obj, struct intel_ring_buffer to)

void	i915_gem_object_move_to_active (struct drm_i915_gem_object obj, struct intel_ring_buffer ring, u32 seqno)

int	i915_gem_dumb_create (struct drm_file file_priv, struct drm_device dev, struct drm_mode_create_dumb *args)

int	i915_gem_mmap_gtt (struct drm_file file_priv, struct drm_device dev, uint32_t handle, uint64_t *offset)

int	i915_gem_dumb_destroy (struct drm_file file_priv, struct drm_device dev, uint32_t handle)

u32	i915_gem_next_request_seqno (struct intel_ring_buffer *ring)

int __must_check	i915_gem_object_get_fence (struct drm_i915_gem_object *obj)

int __must_check	i915_gem_object_put_fence (struct drm_i915_gem_object *obj)

void	i915_gem_retire_requests (struct drm_device *dev)

void	i915_gem_retire_requests_ring (struct intel_ring_buffer *ring)

int __must_check	i915_gem_check_wedge (struct drm_i915_private *dev_priv, bool interruptible)

void	i915_gem_reset (struct drm_device *dev)

void	i915_gem_clflush_object (struct drm_i915_gem_object *obj)

int __must_check	i915_gem_object_set_domain (struct drm_i915_gem_object *obj, uint32_t read_domains, uint32_t write_domain)

int __must_check	i915_gem_object_finish_gpu (struct drm_i915_gem_object *obj)

int __must_check	i915_gem_init (struct drm_device *dev)

int __must_check	i915_gem_init_hw (struct drm_device *dev)

void	i915_gem_l3_remap (struct drm_device *dev)

void	i915_gem_init_swizzling (struct drm_device *dev)

void	i915_gem_init_ppgtt (struct drm_device *dev)

void	i915_gem_cleanup_ringbuffer (struct drm_device *dev)

int __must_check	i915_gpu_idle (struct drm_device *dev)

int __must_check	i915_gem_idle (struct drm_device *dev)

int	i915_add_request (struct intel_ring_buffer ring, struct drm_file file, u32 *seqno)

int __must_check	i915_wait_seqno (struct intel_ring_buffer *ring, uint32_t seqno)

int	i915_gem_fault (struct vm_area_struct vma, struct vm_fault vmf)

int __must_check	i915_gem_object_set_to_gtt_domain (struct drm_i915_gem_object *obj, bool write)

int __must_check	i915_gem_object_set_to_cpu_domain (struct drm_i915_gem_object *obj, bool write)

int __must_check	i915_gem_object_pin_to_display_plane (struct drm_i915_gem_object obj, u32 alignment, struct intel_ring_buffer pipelined)

int	i915_gem_attach_phys_object (struct drm_device dev, struct drm_i915_gem_object obj, int id, int align)

void	i915_gem_detach_phys_object (struct drm_device dev, struct drm_i915_gem_object obj)

void	i915_gem_free_all_phys_object (struct drm_device *dev)

void	i915_gem_release (struct drm_device dev, struct drm_file file)

uint32_t	i915_gem_get_unfenced_gtt_alignment (struct drm_device *dev, uint32_t size, int tiling_mode)

int	i915_gem_object_set_cache_level (struct drm_i915_gem_object *obj, enum i915_cache_level cache_level)

struct drm_gem_object *	i915_gem_prime_import (struct drm_device dev, struct dma_buf dma_buf)

struct dma_buf *	i915_gem_prime_export (struct drm_device dev, struct drm_gem_object gem_obj, int flags)

void	i915_gem_context_init (struct drm_device *dev)

void	i915_gem_context_fini (struct drm_device *dev)

void	i915_gem_context_close (struct drm_device dev, struct drm_file file)

int	i915_switch_context (struct intel_ring_buffer ring, struct drm_file file, int to_id)

int	i915_gem_context_create_ioctl (struct drm_device dev, void data, struct drm_file *file)

int	i915_gem_context_destroy_ioctl (struct drm_device dev, void data, struct drm_file *file)

int __must_check	i915_gem_init_aliasing_ppgtt (struct drm_device *dev)

void	i915_gem_cleanup_aliasing_ppgtt (struct drm_device *dev)

void	i915_ppgtt_bind_object (struct i915_hw_ppgtt ppgtt, struct drm_i915_gem_object obj, enum i915_cache_level cache_level)

void	i915_ppgtt_unbind_object (struct i915_hw_ppgtt ppgtt, struct drm_i915_gem_object obj)

void	i915_gem_restore_gtt_mappings (struct drm_device *dev)

int __must_check	i915_gem_gtt_prepare_object (struct drm_i915_gem_object *obj)

void	i915_gem_gtt_bind_object (struct drm_i915_gem_object *obj, enum i915_cache_level cache_level)

void	i915_gem_gtt_unbind_object (struct drm_i915_gem_object *obj)

void	i915_gem_gtt_finish_object (struct drm_i915_gem_object *obj)

void	i915_gem_init_global_gtt (struct drm_device *dev, unsigned long start, unsigned long mappable_end, unsigned long end)

int __must_check	i915_gem_evict_something (struct drm_device *dev, int min_size, unsigned alignment, unsigned cache_level, bool mappable, bool nonblock)

int	i915_gem_evict_everything (struct drm_device *dev)

int	i915_gem_init_stolen (struct drm_device *dev)

void	i915_gem_cleanup_stolen (struct drm_device *dev)

void	i915_gem_detect_bit_6_swizzle (struct drm_device *dev)

void	i915_gem_object_do_bit_17_swizzle (struct drm_i915_gem_object *obj)

void	i915_gem_object_save_bit_17_swizzle (struct drm_i915_gem_object *obj)

void	i915_gem_dump_object (struct drm_i915_gem_object obj, int len, const char where, uint32_t mark)

void	i915_gem_object_check_coherency (struct drm_i915_gem_object *obj, int handle)

int	i915_debugfs_init (struct drm_minor *minor)

void	i915_debugfs_cleanup (struct drm_minor *minor)

int	i915_save_state (struct drm_device *dev)

int	i915_restore_state (struct drm_device *dev)

void	i915_setup_sysfs (struct drm_device *dev_priv)

void	i915_teardown_sysfs (struct drm_device *dev_priv)

int	intel_setup_gmbus (struct drm_device *dev)

void	intel_teardown_gmbus (struct drm_device *dev)

bool	intel_gmbus_is_port_valid (unsigned port)

struct i2c_adapter *	intel_gmbus_get_adapter (struct drm_i915_private *dev_priv, unsigned port)

void	intel_gmbus_set_speed (struct i2c_adapter *adapter, int speed)

void	intel_gmbus_force_bit (struct i2c_adapter *adapter, bool force_bit)

bool	intel_gmbus_is_forced_bit (struct i2c_adapter *adapter)

void	intel_i2c_reset (struct drm_device *dev)

int	intel_opregion_setup (struct drm_device *dev)

void	intel_modeset_init_hw (struct drm_device *dev)

void	intel_modeset_init (struct drm_device *dev)

void	intel_modeset_gem_init (struct drm_device *dev)

void	intel_modeset_cleanup (struct drm_device *dev)

int	intel_modeset_vga_set_state (struct drm_device *dev, bool state)

void	intel_modeset_setup_hw_state (struct drm_device *dev)

bool	intel_fbc_enabled (struct drm_device *dev)

void	intel_disable_fbc (struct drm_device *dev)

bool	ironlake_set_drps (struct drm_device *dev, u8 val)

void	ironlake_init_pch_refclk (struct drm_device *dev)

void	gen6_set_rps (struct drm_device *dev, u8 val)

void	intel_detect_pch (struct drm_device *dev)

int	intel_trans_dp_port_sel (struct drm_crtc *crtc)

int	intel_enable_rc6 (const struct drm_device *dev)

bool	i915_semaphore_is_enabled (struct drm_device *dev)

int	i915_reg_read_ioctl (struct drm_device dev, void data, struct drm_file *file)

void	gen6_gt_force_wake_get (struct drm_i915_private *dev_priv)

void	gen6_gt_force_wake_put (struct drm_i915_private *dev_priv)

int	__gen6_gt_wait_for_fifo (struct drm_i915_private *dev_priv)

	__i915_read (8, b) __i915_read(16

w	__i915_read (32, l) __i915_read(64

	__i915_write (8, b) __i915_write(16

w	__i915_write (32, l) __i915_write(64

Variables
struct drm_ioctl_desc	i915_ioctls []

int	i915_max_ioctl

unsigned int i915_fbpercrtc	__always_unused

int i915_panel_ignore_lid	__read_mostly

Macro Definition Documentation

#define __i915_read	(	x,
		y
	)	u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg);

Definition at line 1631 of file i915_drv.h.

#define __i915_write	(	x,
		y
	)	void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val);

Definition at line 1640 of file i915_drv.h.

#define DEFAULT_CONTEXT_ID 0

Definition at line 350 of file i915_drv.h.

#define DEV_INFO_FLAGS

Value:

DEV_INFO_FLAG(is_mobile) DEV_INFO_SEP \
    DEV_INFO_FLAG(is_i85x) DEV_INFO_SEP \
    DEV_INFO_FLAG(is_i915g) DEV_INFO_SEP \
    DEV_INFO_FLAG(is_i945gm) DEV_INFO_SEP \
    DEV_INFO_FLAG(is_g33) DEV_INFO_SEP \
    DEV_INFO_FLAG(need_gfx_hws) DEV_INFO_SEP \
    DEV_INFO_FLAG(is_g4x) DEV_INFO_SEP \
    DEV_INFO_FLAG(is_pineview) DEV_INFO_SEP \
    DEV_INFO_FLAG(is_broadwater) DEV_INFO_SEP \
    DEV_INFO_FLAG(is_crestline) DEV_INFO_SEP \
    DEV_INFO_FLAG(is_ivybridge) DEV_INFO_SEP \
    DEV_INFO_FLAG(is_valleyview) DEV_INFO_SEP \
    DEV_INFO_FLAG(is_haswell) DEV_INFO_SEP \
    DEV_INFO_FLAG(has_force_wake) DEV_INFO_SEP \
    DEV_INFO_FLAG(has_fbc) DEV_INFO_SEP \
    DEV_INFO_FLAG(has_pipe_cxsr) DEV_INFO_SEP \
    DEV_INFO_FLAG(has_hotplug) DEV_INFO_SEP \
    DEV_INFO_FLAG(cursor_needs_physical) DEV_INFO_SEP \
    DEV_INFO_FLAG(has_overlay) DEV_INFO_SEP \
    DEV_INFO_FLAG(overlay_needs_physical) DEV_INFO_SEP \
    DEV_INFO_FLAG(supports_tv) DEV_INFO_SEP \
    DEV_INFO_FLAG(has_bsd_ring) DEV_INFO_SEP \
    DEV_INFO_FLAG(has_blt_ring) DEV_INFO_SEP \
    DEV_INFO_FLAG(has_llc)

Definition at line 284 of file i915_drv.h.

#define DRIVER_AUTHOR "Tungsten Graphics, Inc."

Definition at line 47 of file i915_drv.h.

#define DRIVER_DATE "20080730"

Definition at line 51 of file i915_drv.h.

#define DRIVER_DESC "Intel Graphics"

Definition at line 50 of file i915_drv.h.

#define DRIVER_MAJOR 1

Definition at line 106 of file i915_drv.h.

#define DRIVER_MINOR 6

Definition at line 107 of file i915_drv.h.

#define DRIVER_NAME "i915"

Definition at line 49 of file i915_drv.h.

#define DRIVER_PATCHLEVEL 0

Definition at line 108 of file i915_drv.h.

#define DRM_I915_GEM_OBJECT_MAX_PIN_COUNT 0xf

Definition at line 983 of file i915_drv.h.

#define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */

Definition at line 454 of file i915_drv.h.

#define DSPARB_HWCONTROL ( dev ) (IS_G4X(dev) || IS_IRONLAKE(dev))

Definition at line 1163 of file i915_drv.h.

#define for_each_encoder_on_crtc	(	dev,
		__crtc,
		intel_encoder
	)

Value:

list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \

if ((intel_encoder)->base.crtc == (__crtc))

Definition at line 82 of file i915_drv.h.

#define for_each_pipe ( p ) for ((p) = 0; (p) < dev_priv->num_pipe; (p)++)

Definition at line 80 of file i915_drv.h.

#define for_each_ring	(	ring__,
		dev_priv__,
		i__
	)

Value:

for ((i__) = 0; (i__) < I915_NUM_RINGS; (i__)++) \

if (((ring__) = &(dev_priv__)->ring[(i__)]), intel_ring_initialized((ring__)))

Definition at line 885 of file i915_drv.h.

#define GT_FREQUENCY_MULTIPLIER 50

Definition at line 1181 of file i915_drv.h.

#define HAS_128_BYTE_Y_TILING ( dev )

Value:

(!IS_GEN2(dev) && !(IS_I915G(dev) || \

IS_I915GM(dev)))

Definition at line 1154 of file i915_drv.h.

#define HAS_ALIASING_PPGTT ( dev ) (INTEL_INFO(dev)->gen >=6 && !IS_VALLEYVIEW(dev))

Definition at line 1146 of file i915_drv.h.

#define HAS_BLT ( dev ) (INTEL_INFO(dev)->has_blt_ring)

Definition at line 1141 of file i915_drv.h.

#define HAS_BSD ( dev ) (INTEL_INFO(dev)->has_bsd_ring)

Definition at line 1140 of file i915_drv.h.

#define HAS_FORCE_WAKE ( dev ) (INTEL_INFO(dev)->has_force_wake)

Definition at line 1177 of file i915_drv.h.

#define HAS_FW_BLC ( dev ) (INTEL_INFO(dev)->gen > 2)

Definition at line 1165 of file i915_drv.h.

#define HAS_HW_CONTEXTS ( dev ) (INTEL_INFO(dev)->gen >= 6)

Definition at line 1145 of file i915_drv.h.

#define HAS_L3_GPU_CACHE ( dev ) (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))

Definition at line 1179 of file i915_drv.h.

#define HAS_LLC ( dev ) (INTEL_INFO(dev)->has_llc)

Definition at line 1142 of file i915_drv.h.

#define HAS_OVERLAY ( dev ) (INTEL_INFO(dev)->has_overlay)

Definition at line 1148 of file i915_drv.h.

#define HAS_PCH_CPT ( dev ) (INTEL_PCH_TYPE(dev) == PCH_CPT)

Definition at line 1173 of file i915_drv.h.

#define HAS_PCH_IBX ( dev ) (INTEL_PCH_TYPE(dev) == PCH_IBX)

Definition at line 1174 of file i915_drv.h.

#define HAS_PCH_LPT ( dev ) (INTEL_PCH_TYPE(dev) == PCH_LPT)

Definition at line 1172 of file i915_drv.h.

#define HAS_PCH_SPLIT ( dev ) (INTEL_PCH_TYPE(dev) != PCH_NONE)

Definition at line 1175 of file i915_drv.h.

#define HAS_PIPE_CONTROL ( dev ) (INTEL_INFO(dev)->gen >= 5)

Definition at line 1169 of file i915_drv.h.

#define HAS_PIPE_CXSR ( dev ) (INTEL_INFO(dev)->has_pipe_cxsr)

Definition at line 1166 of file i915_drv.h.

#define i915_destroy_error_state ( x )

Definition at line 1274 of file i915_drv.h.

#define I915_FENCE_REG_NONE -1

Definition at line 157 of file i915_drv.h.

#define I915_GEM_GPU_DOMAINS (~(I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT))

Definition at line 78 of file i915_drv.h.

#define I915_GEM_PHYS_CURSOR_0 1

Definition at line 114 of file i915_drv.h.

#define I915_GEM_PHYS_CURSOR_1 2

Definition at line 115 of file i915_drv.h.

#define I915_GEM_PHYS_OVERLAY_REGS 3

Definition at line 116 of file i915_drv.h.

#define I915_HAS_FBC ( dev ) (INTEL_INFO(dev)->has_fbc)

Definition at line 1167 of file i915_drv.h.

#define I915_HAS_HOTPLUG ( dev ) (INTEL_INFO(dev)->has_hotplug)

Definition at line 1161 of file i915_drv.h.

#define I915_MAX_NUM_FENCE_BITS 5

Definition at line 160 of file i915_drv.h.

#define I915_MAX_NUM_FENCES 16

Definition at line 158 of file i915_drv.h.

#define I915_MAX_PHYS_OBJECT (I915_GEM_PHYS_OVERLAY_REGS)

Definition at line 117 of file i915_drv.h.

#define I915_NEED_GFX_HWS ( dev ) (INTEL_INFO(dev)->need_gfx_hws)

Definition at line 1143 of file i915_drv.h.

#define I915_NUM_PLLS 2

Definition at line 94 of file i915_drv.h.

#define I915_PPGTT_PD_ENTRIES 512

Definition at line 338 of file i915_drv.h.

#define I915_PPGTT_PT_ENTRIES 1024

Definition at line 339 of file i915_drv.h.

#define I915_READ ( reg ) i915_read32(dev_priv, (reg))

Definition at line 1657 of file i915_drv.h.

#define I915_READ16 ( reg ) i915_read16(dev_priv, (reg))

Definition at line 1652 of file i915_drv.h.

#define I915_READ16_NOTRACE ( reg ) readw(dev_priv->regs + (reg))

Definition at line 1654 of file i915_drv.h.

#define I915_READ64 ( reg ) i915_read64(dev_priv, (reg))

Definition at line 1663 of file i915_drv.h.

#define I915_READ8 ( reg ) i915_read8(dev_priv, (reg))

Definition at line 1649 of file i915_drv.h.

#define I915_READ_NOTRACE ( reg ) readl(dev_priv->regs + (reg))

Definition at line 1659 of file i915_drv.h.

#define i915_verify_lists ( dev ) 0

Definition at line 1526 of file i915_drv.h.

#define I915_WRITE	(	reg,
		val
	)	i915_write32(dev_priv, (reg), (val))

Definition at line 1658 of file i915_drv.h.

#define I915_WRITE16	(	reg,
		val
	)	i915_write16(dev_priv, (reg), (val))

Definition at line 1653 of file i915_drv.h.

#define I915_WRITE16_NOTRACE	(	reg,
		val
	)	writew(val, dev_priv->regs + (reg))

Definition at line 1655 of file i915_drv.h.

#define I915_WRITE64	(	reg,
		val
	)	i915_write64(dev_priv, (reg), (val))

Definition at line 1662 of file i915_drv.h.

#define I915_WRITE8	(	reg,
		val
	)	i915_write8(dev_priv, (reg), (val))

Definition at line 1650 of file i915_drv.h.

#define I915_WRITE_NOTRACE	(	reg,
		val
	)	writel(val, dev_priv->regs + (reg))

Definition at line 1660 of file i915_drv.h.

#define INTEL_INFO ( dev ) (((struct drm_i915_private *) (dev)->dev_private)->info)

Definition at line 1102 of file i915_drv.h.

#define INTEL_PCH_TYPE ( dev ) (((struct drm_i915_private *)(dev)->dev_private)->pch_type)

Definition at line 1171 of file i915_drv.h.

#define INTEL_RC6_ENABLE (1<<0)

RC6 is a special power stage which allows the GPU to enter an very low-voltage mode when idle, using down to 0V while at this stage. This stage is entered automatically when the GPU is idle when RC6 support is enabled, and as soon as new workload arises GPU wakes up automatically as well.

There are different RC6 modes available in Intel GPU, which differentiate among each other with the latency required to enter and leave RC6 and voltage consumed by the GPU in different states.

The combination of the following flags define which states GPU is allowed to enter, while RC6 is the normal RC6 state, RC6p is the deep RC6, and RC6pp is deepest RC6. Their support by hardware varies according to the GPU, BIOS, chipset and platform. RC6 is usually the safest one and the one which brings the most power savings; deeper states save more power, but require higher latency to switch to and wake up.

Definition at line 1202 of file i915_drv.h.

#define INTEL_RC6p_ENABLE (1<<1)

Definition at line 1203 of file i915_drv.h.

#define INTEL_RC6pp_ENABLE (1<<2)

Definition at line 1204 of file i915_drv.h.

#define IS_845G ( dev ) ((dev)->pci_device == 0x2562)

Definition at line 1105 of file i915_drv.h.

#define IS_BROADWATER ( dev ) (INTEL_INFO(dev)->is_broadwater)

Definition at line 1112 of file i915_drv.h.

#define IS_CRESTLINE ( dev ) (INTEL_INFO(dev)->is_crestline)

Definition at line 1113 of file i915_drv.h.

#define IS_G33 ( dev ) (INTEL_INFO(dev)->is_g33)

Definition at line 1119 of file i915_drv.h.

#define IS_G4X ( dev ) (INTEL_INFO(dev)->is_g4x)

Definition at line 1115 of file i915_drv.h.

#define IS_GEN2 ( dev ) (INTEL_INFO(dev)->gen == 2)

Definition at line 1133 of file i915_drv.h.

#define IS_GEN3 ( dev ) (INTEL_INFO(dev)->gen == 3)

Definition at line 1134 of file i915_drv.h.

#define IS_GEN4 ( dev ) (INTEL_INFO(dev)->gen == 4)

Definition at line 1135 of file i915_drv.h.

#define IS_GEN5 ( dev ) (INTEL_INFO(dev)->gen == 5)

Definition at line 1136 of file i915_drv.h.

#define IS_GEN6 ( dev ) (INTEL_INFO(dev)->gen == 6)

Definition at line 1137 of file i915_drv.h.

#define IS_GEN7 ( dev ) (INTEL_INFO(dev)->gen == 7)

Definition at line 1138 of file i915_drv.h.

#define IS_GM45 ( dev ) ((dev)->pci_device == 0x2A42)

Definition at line 1114 of file i915_drv.h.

#define IS_HASWELL ( dev ) (INTEL_INFO(dev)->is_haswell)

Definition at line 1124 of file i915_drv.h.

#define IS_I830 ( dev ) ((dev)->pci_device == 0x3577)

Definition at line 1104 of file i915_drv.h.

#define IS_I85X ( dev ) (INTEL_INFO(dev)->is_i85x)

Definition at line 1106 of file i915_drv.h.

#define IS_I865G ( dev ) ((dev)->pci_device == 0x2572)

Definition at line 1107 of file i915_drv.h.

#define IS_I915G ( dev ) (INTEL_INFO(dev)->is_i915g)

Definition at line 1108 of file i915_drv.h.

#define IS_I915GM ( dev ) ((dev)->pci_device == 0x2592)

Definition at line 1109 of file i915_drv.h.

#define IS_I945G ( dev ) ((dev)->pci_device == 0x2772)

Definition at line 1110 of file i915_drv.h.

#define IS_I945GM ( dev ) (INTEL_INFO(dev)->is_i945gm)

Definition at line 1111 of file i915_drv.h.

#define IS_IRONLAKE_D ( dev ) ((dev)->pci_device == 0x0042)

Definition at line 1120 of file i915_drv.h.

#define IS_IRONLAKE_M ( dev ) ((dev)->pci_device == 0x0046)

Definition at line 1121 of file i915_drv.h.

#define IS_IVYBRIDGE ( dev ) (INTEL_INFO(dev)->is_ivybridge)

Definition at line 1122 of file i915_drv.h.

#define IS_MOBILE ( dev ) (INTEL_INFO(dev)->is_mobile)

Definition at line 1125 of file i915_drv.h.

#define IS_PINEVIEW ( dev ) (INTEL_INFO(dev)->is_pineview)

Definition at line 1118 of file i915_drv.h.

#define IS_PINEVIEW_G ( dev ) ((dev)->pci_device == 0xa001)

Definition at line 1116 of file i915_drv.h.

#define IS_PINEVIEW_M ( dev ) ((dev)->pci_device == 0xa011)

Definition at line 1117 of file i915_drv.h.

#define IS_VALLEYVIEW ( dev ) (INTEL_INFO(dev)->is_valleyview)

Definition at line 1123 of file i915_drv.h.

#define OPREGION_SIZE (8*1024)

Definition at line 148 of file i915_drv.h.

#define OVERLAY_NEEDS_PHYSICAL ( dev ) (INTEL_INFO(dev)->overlay_needs_physical)

Definition at line 1149 of file i915_drv.h.

#define pipe_name ( p ) ((p) + 'A')

Definition at line 59 of file i915_drv.h.

#define plane_name ( p ) ((p) + 'A')

Definition at line 66 of file i915_drv.h.

#define port_name ( p ) ((p) + 'A')

Definition at line 76 of file i915_drv.h.

#define POSTING_READ ( reg ) (void)I915_READ_NOTRACE(reg)

Definition at line 1665 of file i915_drv.h.

#define POSTING_READ16 ( reg ) (void)I915_READ16_NOTRACE(reg)

Definition at line 1666 of file i915_drv.h.

#define QUIRK_INVERT_BRIGHTNESS (1<<2)

Definition at line 379 of file i915_drv.h.

#define QUIRK_LVDS_SSC_DISABLE (1<<1)

Definition at line 378 of file i915_drv.h.

#define QUIRK_PIPEA_FORCE (1<<0)

Definition at line 377 of file i915_drv.h.

#define SUPPORTS_DIGITAL_OUTPUTS ( dev ) (!IS_GEN2(dev) && !IS_PINEVIEW(dev))

Definition at line 1156 of file i915_drv.h.

#define SUPPORTS_EDP ( dev ) (IS_IRONLAKE_M(dev))

Definition at line 1159 of file i915_drv.h.

#define SUPPORTS_INTEGRATED_DP ( dev ) (IS_G4X(dev) || IS_GEN5(dev))

Definition at line 1158 of file i915_drv.h.

#define SUPPORTS_INTEGRATED_HDMI ( dev ) (IS_G4X(dev) || IS_GEN5(dev))

Definition at line 1157 of file i915_drv.h.

#define SUPPORTS_TV ( dev ) (INTEL_INFO(dev)->supports_tv)

Definition at line 1160 of file i915_drv.h.

#define to_intel_bo ( x ) container_of(x, struct drm_i915_gem_object, base)

Definition at line 1061 of file i915_drv.h.

#define WATCH_COHERENCY 0

Definition at line 110 of file i915_drv.h.

#define WATCH_GTT 0

Definition at line 112 of file i915_drv.h.

#define WATCH_LISTS 0

Definition at line 111 of file i915_drv.h.

Typedef Documentation

typedef struct drm_i915_private drm_i915_private_t

Enumeration Type Documentation

enum hdmi_force_audio

Enumerator:

HDMI_AUDIO_OFF_DVI
HDMI_AUDIO_OFF
HDMI_AUDIO_AUTO
HDMI_AUDIO_ON

Definition at line 889 of file i915_drv.h.

enum i915_cache_level

Enumerator:

I915_CACHE_NONE
I915_CACHE_LLC
I915_CACHE_LLC_MLC

Definition at line 896 of file i915_drv.h.

enum intel_pch

Enumerator:

PCH_NONE
PCH_IBX
PCH_CPT
PCH_LPT

Definition at line 370 of file i915_drv.h.

enum no_fbc_reason

Enumerator:

FBC_NO_OUTPUT
FBC_STOLEN_TOO_SMALL
FBC_UNSUPPORTED_MODE
FBC_MODE_TOO_LARGE
FBC_BAD_PLANE
FBC_NOT_TILED
FBC_MULTIPLE_PIPES
FBC_MODULE_PARAM

Definition at line 359 of file i915_drv.h.

enum pipe

Enumerator:

PIPE_A
PIPE_B
PIPE_C
I915_MAX_PIPES

Definition at line 53 of file i915_drv.h.

enum plane

Enumerator:

PLANE_A
PLANE_B
PLANE_C

Definition at line 61 of file i915_drv.h.

enum struct fc_fdmi_port_name port

Enumerator:

PORT_A
PORT_B
PORT_C
PORT_D
PORT_E
I915_MAX_PORTS
CX25821_UNDEFINED
CX25821_RAW
CX25821_264
software_reset
selftest
selective_reset

Definition at line 68 of file i915_drv.h.

Function Documentation

int __gen6_gt_wait_for_fifo ( struct drm_i915_private * dev_priv )

Definition at line 4094 of file intel_pm.c.

__i915_read	(	8	,
		b
	)

w __i915_read	(	32	,
		l
	)

__i915_write	(	8	,
		b
	)

w __i915_write	(	32	,
		l
	)

void gen6_gt_force_wake_get ( struct drm_i915_private * dev_priv )

Definition at line 4048 of file intel_pm.c.

void gen6_gt_force_wake_put ( struct drm_i915_private * dev_priv )

Definition at line 4084 of file intel_pm.c.

void gen6_set_rps	(	struct drm_device *	dev,
		u8	val
	)

Definition at line 2321 of file intel_pm.c.

int i915_add_request	(	struct intel_ring_buffer *	ring,
		struct drm_file *	file,
		u32 *	seqno
	)

Definition at line 1959 of file i915_gem.c.

unsigned long i915_chipset_val ( struct drm_i915_private * dev_priv )

Definition at line 2785 of file intel_pm.c.

void i915_debugfs_cleanup ( struct drm_minor * minor )

int i915_debugfs_init ( struct drm_minor * minor )

void i915_disable_pipestat	(	drm_i915_private_t *	dev_priv,
		int	pipe,
		u32	mask
	)

Definition at line 74 of file i915_irq.c.

int i915_driver_device_is_agp ( struct drm_device * dev )

Definition at line 1905 of file i915_dma.c.

void i915_driver_lastclose ( struct drm_device * dev )

i915_driver_lastclose - clean up after all DRM clients have exited : DRM device

Take care of cleaning up after all DRM clients have exited. In the mode setting case, we want to restore the kernel's initial mode (just in case the last client left us in a bad state).

Additionally, in the non-mode setting case, we'll tear down the GTT and DMA structures, since the kernel won't be using them, and clea up any GEM state.

Definition at line 1813 of file i915_dma.c.

int i915_driver_load	(	struct drm_device *	dev,
		unsigned long	flags
	)

i915_driver_load - setup chip and create an initial config : DRM device : startup flags

The driver load routine has to do several things:

drive output discovery via intel_modeset_init()
initialize the memory manager
allocate initial config memory
setup the DRM framebuffer with the allocated memory

Definition at line 1459 of file i915_dma.c.

int i915_driver_open	(	struct drm_device *	dev,
		struct drm_file *	file_priv
	)

Definition at line 1782 of file i915_dma.c.

void i915_driver_postclose	(	struct drm_device *	dev,
		struct drm_file *	file_priv
	)

Definition at line 1840 of file i915_dma.c.

void i915_driver_preclose	(	struct drm_device *	dev,
		struct drm_file *	file_priv
	)

Definition at line 1834 of file i915_dma.c.

int i915_driver_unload ( struct drm_device * )

Definition at line 1689 of file i915_dma.c.

int i915_emit_box	(	struct drm_device *	dev,
		struct drm_clip_rect *	box,
		int	DR1,
		int	DR4
	)

Definition at line 405 of file i915_dma.c.

void i915_enable_pipestat	(	drm_i915_private_t *	dev_priv,
		int	pipe,
		u32	mask
	)

Definition at line 61 of file i915_irq.c.

void i915_error_state_free ( struct kref * error_ref )

struct drm_i915_gem_object* i915_gem_alloc_object	(	struct drm_device *	dev,
		size_t	size
	)

read

Definition at line 3685 of file i915_gem.c.

int i915_gem_attach_phys_object	(	struct drm_device *	dev,
		struct drm_i915_gem_object *	obj,
		int	id,
		int	align
	)

Definition at line 4305 of file i915_gem.c.

int i915_gem_busy_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file_priv
	)

Definition at line 3572 of file i915_gem.c.

int __must_check i915_gem_check_wedge	(	struct drm_i915_private *	dev_priv,
		bool	interruptible
	)

Definition at line 943 of file i915_gem.c.

void i915_gem_cleanup_aliasing_ppgtt ( struct drm_device * dev )

Definition at line 146 of file i915_gem_gtt.c.

void i915_gem_cleanup_ringbuffer ( struct drm_device * dev )

Definition at line 4073 of file i915_gem.c.

void i915_gem_cleanup_stolen ( struct drm_device * dev )

Definition at line 172 of file i915_gem_stolen.c.

void i915_gem_clflush_object ( struct drm_i915_gem_object * obj )

Definition at line 3000 of file i915_gem.c.

void i915_gem_context_close	(	struct drm_device *	dev,
		struct drm_file *	file
	)

Definition at line 302 of file i915_gem_context.c.

int i915_gem_context_create_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Definition at line 477 of file i915_gem_context.c.

int i915_gem_context_destroy_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Definition at line 507 of file i915_gem_context.c.

void i915_gem_context_fini ( struct drm_device * dev )

Definition at line 274 of file i915_gem_context.c.

void i915_gem_context_init ( struct drm_device * dev )

Definition at line 242 of file i915_gem_context.c.

int i915_gem_create_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Creates a new mm object and returns a handle to it.

Definition at line 253 of file i915_gem.c.

void i915_gem_detach_phys_object	(	struct drm_device *	dev,
		struct drm_i915_gem_object *	obj
	)

Definition at line 4271 of file i915_gem.c.

void i915_gem_detect_bit_6_swizzle ( struct drm_device * dev )

Detects bit 6 swizzling of address lookup between IGD access and CPU access through main memory.

Definition at line 88 of file i915_gem_tiling.c.

int i915_gem_dumb_create	(	struct drm_file *	file_priv,
		struct drm_device *	dev,
		struct drm_mode_create_dumb *	args
	)

Definition at line 231 of file i915_gem.c.

int i915_gem_dumb_destroy	(	struct drm_file *	file_priv,
		struct drm_device *	dev,
		uint32_t	handle
	)

Definition at line 242 of file i915_gem.c.

void i915_gem_dump_object	(	struct drm_i915_gem_object *	obj,
		int	len,
		const char *	where,
		uint32_t	mark
	)

int i915_gem_entervt_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file_priv
	)

Definition at line 4084 of file i915_gem.c.

int i915_gem_evict_everything ( struct drm_device * dev )

Definition at line 154 of file i915_gem_evict.c.

int __must_check i915_gem_evict_something	(	struct drm_device *	dev,
		int	min_size,
		unsigned	alignment,
		unsigned	cache_level,
		bool	mappable,
		bool	nonblock
	)

Definition at line 45 of file i915_gem_evict.c.

int i915_gem_execbuffer	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file_priv
	)

Definition at line 1080 of file i915_gem_execbuffer.c.

int i915_gem_execbuffer2	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file_priv
	)

Definition at line 1161 of file i915_gem_execbuffer.c.

int i915_gem_fault	(	struct vm_area_struct *	vma,
		struct vm_fault *	vmf
	)

i915_gem_fault - fault a page into the GTT vma: VMA in question vmf: fault info

The fault handler is set up by drm_gem_mmap() when a object is GTT mapped from userspace. The fault handler takes care of binding the object to the GTT (if needed), allocating and programming a fence register (again, only if needed based on whether the old reg is still valid or the object is tiled) and inserting a new PTE into the faulting process.

Note that the faulting process may involve evicting existing objects from the GTT and/or fence registers to make room. So performance may suffer if the GTT working set is large or there are few fence registers left.

Definition at line 1327 of file i915_gem.c.

void i915_gem_free_all_phys_object ( struct drm_device * dev )

Definition at line 4263 of file i915_gem.c.

void i915_gem_free_object ( struct drm_gem_object * obj )

Definition at line 3743 of file i915_gem.c.

int i915_gem_get_aperture_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file_priv
	)

Definition at line 174 of file i915_gem.c.

int i915_gem_get_caching_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Definition at line 3197 of file i915_gem.c.

int i915_gem_get_tiling	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Returns the current tiling mode and required bit 6 swizzling for the object.

Definition at line 409 of file i915_gem_tiling.c.

uint32_t i915_gem_get_unfenced_gtt_alignment	(	struct drm_device *	dev,
		uint32_t	size,
		int	tiling_mode
	)

i915_gem_get_unfenced_gtt_alignment - return required GTT alignment for an unfenced object : the device : size of the object : tiling mode of the object

Return the required GTT alignment for an object, only taking into account unfenced tiled surface requirements.

Definition at line 1505 of file i915_gem.c.

void i915_gem_gtt_bind_object	(	struct drm_i915_gem_object *	obj,
		enum i915_cache_level	cache_level
	)

Definition at line 321 of file i915_gem_gtt.c.

void i915_gem_gtt_finish_object ( struct drm_i915_gem_object * obj )

Definition at line 341 of file i915_gem_gtt.c.

int __must_check i915_gem_gtt_prepare_object ( struct drm_i915_gem_object * obj )

Definition at line 308 of file i915_gem_gtt.c.

void i915_gem_gtt_unbind_object ( struct drm_i915_gem_object * obj )

Definition at line 333 of file i915_gem_gtt.c.

int __must_check i915_gem_idle ( struct drm_device * dev )

Definition at line 3783 of file i915_gem.c.

int __must_check i915_gem_init ( struct drm_device * dev )

Definition at line 4022 of file i915_gem.c.

int __must_check i915_gem_init_aliasing_ppgtt ( struct drm_device * dev )

Definition at line 63 of file i915_gem_gtt.c.

void i915_gem_init_global_gtt	(	struct drm_device *	dev,
		unsigned long	start,
		unsigned long	mappable_end,
		unsigned long	end
	)

Definition at line 374 of file i915_gem_gtt.c.

int __must_check i915_gem_init_hw ( struct drm_device * dev )

Definition at line 3958 of file i915_gem.c.

int i915_gem_init_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file_priv
	)

Definition at line 149 of file i915_gem.c.

int i915_gem_init_object ( struct drm_gem_object * obj )

Definition at line 3736 of file i915_gem.c.

void i915_gem_init_ppgtt ( struct drm_device * dev )

Definition at line 3879 of file i915_gem.c.

int i915_gem_init_stolen ( struct drm_device * dev )

Definition at line 178 of file i915_gem_stolen.c.

void i915_gem_init_swizzling ( struct drm_device * dev )

Definition at line 3858 of file i915_gem.c.

void i915_gem_l3_remap ( struct drm_device * dev )

Definition at line 3826 of file i915_gem.c.

void i915_gem_lastclose ( struct drm_device * dev )

Definition at line 4137 of file i915_gem.c.

int i915_gem_leavevt_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file_priv
	)

Definition at line 4126 of file i915_gem.c.

void i915_gem_load ( struct drm_device * dev )

Definition at line 4157 of file i915_gem.c.

int i915_gem_madvise_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file_priv
	)

Definition at line 3616 of file i915_gem.c.

int i915_gem_mmap_gtt	(	struct drm_file *	file_priv,
		struct drm_device *	dev,
		uint32_t	handle,
		uint64_t *	offset
	)

Definition at line 1560 of file i915_gem.c.

int i915_gem_mmap_gtt_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file_priv
	)

Definition at line 1619 of file i915_gem.c.

int i915_gem_mmap_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Maps the contents of an object, returning the address it is mapped into.

While the mapping holds a reference on the contents of the object, it doesn't imply a ref on the object itself.

Definition at line 1280 of file i915_gem.c.

u32 i915_gem_next_request_seqno ( struct intel_ring_buffer * ring )

Definition at line 1950 of file i915_gem.c.

void i915_gem_object_check_coherency	(	struct drm_i915_gem_object *	obj,
		int	handle
	)

void i915_gem_object_do_bit_17_swizzle ( struct drm_i915_gem_object * obj )

Definition at line 473 of file i915_gem_tiling.c.

int __must_check i915_gem_object_finish_gpu ( struct drm_i915_gem_object * obj )

Definition at line 3318 of file i915_gem.c.

int __must_check i915_gem_object_get_fence ( struct drm_i915_gem_object * obj )

i915_gem_object_get_fence - set up fencing for an object : object to map through a fence reg

When mapping objects through the GTT, userspace wants to be able to write to them without having to worry about swizzling if the object is tiled. This function walks the fence regs looking for a free one for , stealing one if it can't find any.

It then sets up the reg based on the object's properties: address, pitch and tiling format.

For an untiled surface, this removes any existing fence.

Definition at line 2753 of file i915_gem.c.

int __must_check i915_gem_object_get_pages ( struct drm_i915_gem_object * obj )

Definition at line 1850 of file i915_gem.c.

void i915_gem_object_init	(	struct drm_i915_gem_object *	obj,
		const struct drm_i915_gem_object_ops *	ops
	)

Definition at line 3662 of file i915_gem.c.

void i915_gem_object_move_to_active	(	struct drm_i915_gem_object *	obj,
		struct intel_ring_buffer *	ring,
		u32	seqno
	)

Definition at line 1870 of file i915_gem.c.

int __must_check i915_gem_object_pin	(	struct drm_i915_gem_object *	obj,
		uint32_t	alignment,
		bool	map_and_fenceable,
		bool	nonblocking
	)

Definition at line 3430 of file i915_gem.c.

int __must_check i915_gem_object_pin_to_display_plane	(	struct drm_i915_gem_object *	obj,
		u32	alignment,
		struct intel_ring_buffer *	pipelined
	)

Definition at line 3265 of file i915_gem.c.

int __must_check i915_gem_object_put_fence ( struct drm_i915_gem_object * obj )

Definition at line 2686 of file i915_gem.c.

void i915_gem_object_save_bit_17_swizzle ( struct drm_i915_gem_object * obj )

Definition at line 494 of file i915_gem_tiling.c.

int i915_gem_object_set_cache_level	(	struct drm_i915_gem_object *	obj,
		enum i915_cache_level	cache_level
	)

Definition at line 3122 of file i915_gem.c.

int __must_check i915_gem_object_set_domain	(	struct drm_i915_gem_object *	obj,
		uint32_t	read_domains,
		uint32_t	write_domain
	)

int __must_check i915_gem_object_set_to_cpu_domain	(	struct drm_i915_gem_object *	obj,
		bool	write
	)

Moves a single object to the CPU read, and possibly write domain.

This function returns when the move is complete, including waiting on flushes to occur.

Definition at line 3341 of file i915_gem.c.

int __must_check i915_gem_object_set_to_gtt_domain	(	struct drm_i915_gem_object *	obj,
		bool	write
	)

Moves a single object to the GTT read, and possibly write domain.

This function returns when the move is complete, including waiting on flushes to occur.

Definition at line 3078 of file i915_gem.c.

int i915_gem_object_sync	(	struct drm_i915_gem_object *	obj,
		struct intel_ring_buffer *	to
	)

i915_gem_object_sync - sync an object to a ring.

: object which may be in use on another ring. : ring we wish to use the object on. May be NULL.

This code is meant to abstract object synchronization with the GPU. Calling with NULL implies synchronizing the object with the CPU rather than a particular GPU ring.

Returns 0 if successful, else propagates up the lower layer error.

Definition at line 2364 of file i915_gem.c.

int __must_check i915_gem_object_unbind ( struct drm_i915_gem_object * obj )

Unbinds an object from the GTT aperture.

Definition at line 2422 of file i915_gem.c.

void i915_gem_object_unpin ( struct drm_i915_gem_object * obj )

Definition at line 3474 of file i915_gem.c.

int i915_gem_pin_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file_priv
	)

Definition at line 3484 of file i915_gem.c.

int i915_gem_pread_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Reads data from the object referenced by handle.

On error, the contents of *data are undefined.

Definition at line 520 of file i915_gem.c.

struct dma_buf* i915_gem_prime_export	(	struct drm_device *	dev,
		struct drm_gem_object *	gem_obj,
		int	flags
	)

read

Definition at line 224 of file i915_gem_dmabuf.c.

struct drm_gem_object* i915_gem_prime_import	(	struct drm_device *	dev,
		struct dma_buf *	dma_buf
	)

read

Definition at line 257 of file i915_gem_dmabuf.c.

int i915_gem_pwrite_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Writes data to the object referenced by handle.

On error, the contents of the buffer that were to be modified are undefined.

Definition at line 864 of file i915_gem.c.

void i915_gem_release	(	struct drm_device *	dev,
		struct drm_file *	file
	)

Definition at line 4389 of file i915_gem.c.

void i915_gem_release_mmap ( struct drm_i915_gem_object * obj )

i915_gem_release_mmap - remove physical page mappings : obj in question

Preserve the reservation of the mmapping with the DRM core code, but relinquish ownership of the pages back to the system.

It is vital that we remove the page mapping if we have mapped a tiled object through the GTT and then lose the fence register due to resource pressure. Similarly if the object has been moved out of the aperture, than pages mapped into userspace must be revoked. Removing the mapping will then trigger a page fault on the next user access, allowing fixup by i915_gem_fault().

Definition at line 1433 of file i915_gem.c.

void i915_gem_reset ( struct drm_device * dev )

Definition at line 2103 of file i915_gem.c.

void i915_gem_restore_gtt_mappings ( struct drm_device * dev )

Definition at line 291 of file i915_gem_gtt.c.

void i915_gem_retire_requests ( struct drm_device * dev )

Definition at line 2196 of file i915_gem.c.

void i915_gem_retire_requests_ring ( struct intel_ring_buffer * ring )

This function clears the request list as sequence numbers are passed.

Definition at line 2131 of file i915_gem.c.

int i915_gem_set_caching_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Definition at line 3222 of file i915_gem.c.

int i915_gem_set_domain_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Called when user space prepares to use an object with the CPU, either through the mmap ioctl's mapping or a GTT mapping.

Definition at line 1181 of file i915_gem.c.

int i915_gem_set_tiling	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Sets the tiling mode of an object, returning the required swizzling of bit 6 of addresses in the object.

Definition at line 301 of file i915_gem_tiling.c.

int i915_gem_sw_finish_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Called when user space has done writes to this buffer

Definition at line 1245 of file i915_gem.c.

int i915_gem_throttle_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file_priv
	)

Definition at line 3609 of file i915_gem.c.

int i915_gem_unpin_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file_priv
	)

Definition at line 3535 of file i915_gem.c.

int i915_gem_wait_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

i915_gem_wait_ioctl - implements DRM_IOCTL_I915_GEM_WAIT : standard ioctl arguments

Returns 0 if successful, else an error is returned with the remaining time in the timeout parameter. -ETIME: object is still busy after timeout -ERESTARTSYS: signal interrupted the wait -ENONENT: object doesn't exist Also possible, but rare: -EAGAIN: GPU wedged -ENOMEM: damn -ENODEV: Internal IRQ fail -E?: The add request failed

The wait ioctl with a timeout of 0 reimplements the busy ioctl. With any non-zero timeout parameter the wait ioctl will wait for the given number of nanoseconds on an object becoming unbusy. Since the wait itself does so without holding struct_mutex the object may become re-busied before this function completes. A similar but shorter * race condition exists in the busy ioctl

Definition at line 2290 of file i915_gem.c.

unsigned long i915_gfx_val ( struct drm_i915_private * dev_priv )

Definition at line 3041 of file intel_pm.c.

int __must_check i915_gpu_idle ( struct drm_device * dev )

Definition at line 2480 of file i915_gem.c.

void i915_handle_error	(	struct drm_device *	dev,
		bool	wedged
	)

i915_handle_error - handle an error interrupt : drm device

Do some basic checking of regsiter state at error interrupt time and dump it to the syslog. Also call i915_capture_error_state() to make sure we get a record and make it available in debugfs. Fire a uevent so userspace knows something bad happened (should trigger collection of a ring dump etc.).

Definition at line 1427 of file i915_irq.c.

void i915_hangcheck_elapsed ( unsigned long data )

This is called when the chip hasn't reported back with completed batchbuffers in a long time. The first time this is called we simply record ACTHD. If ACTHD hasn't changed by the time the hangcheck timer elapses again, we assume the chip is wedged and try to fix it.

Definition at line 1707 of file i915_irq.c.

void i915_kernel_lost_context ( struct drm_device * dev )

Definition at line 155 of file i915_dma.c.

int i915_master_create	(	struct drm_device *	dev,
		struct drm_master *	master
	)

Definition at line 1365 of file i915_dma.c.

void i915_master_destroy	(	struct drm_device *	dev,
		struct drm_master *	master
	)

Definition at line 1377 of file i915_dma.c.

unsigned long i915_mch_val ( struct drm_i915_private * dev_priv )

Definition at line 2801 of file intel_pm.c.

int __must_check i915_mutex_lock_interruptible ( struct drm_device * dev )

Definition at line 126 of file i915_gem.c.

void i915_ppgtt_bind_object	(	struct i915_hw_ppgtt *	ppgtt,
		struct drm_i915_gem_object *	obj,
		enum i915_cache_level	cache_level
	)

Definition at line 212 of file i915_gem_gtt.c.

void i915_ppgtt_unbind_object	(	struct i915_hw_ppgtt *	ppgtt,
		struct drm_i915_gem_object *	obj
	)

Definition at line 241 of file i915_gem_gtt.c.

int i915_reg_read_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Definition at line 1207 of file i915_drv.c.

int i915_reset ( struct drm_device * dev )

i915_reset - reset chip after a hang : drm device to reset

Reset the chip. Useful if a hang is detected. Returns zero on successful reset or otherwise an error code.

Procedure is fairly simple:

reset the chip using the reset reg
re-init context state
re-init hardware status page
re-init ring buffer
re-init interrupt state
re-init display

Definition at line 759 of file i915_drv.c.

int i915_restore_state ( struct drm_device * dev )

Definition at line 851 of file i915_suspend.c.

int i915_resume ( struct drm_device * dev )

Definition at line 570 of file i915_drv.c.

int i915_save_state ( struct drm_device * dev )

Definition at line 800 of file i915_suspend.c.

bool i915_semaphore_is_enabled ( struct drm_device * dev )

Definition at line 446 of file i915_drv.c.

void i915_setup_sysfs ( struct drm_device * dev_priv )

Definition at line 384 of file i915_sysfs.c.

int i915_suspend	(	struct drm_device *	dev,
		pm_message_t	state
	)

Definition at line 499 of file i915_drv.c.

int i915_switch_context	(	struct intel_ring_buffer *	ring,
		struct drm_file *	file,
		int	to_id
	)

i915_switch_context() - perform a GPU context switch. : ring for which we'll execute the context switch : file_priv associated with the context, may be NULL : context id number : sequence number by which the new context will be switched to :

The context life cycle is simple. The context refcount is incremented and decremented by 1 and create and destroy. If the context is in use by the GPU, it will have a refoucnt > 1. This allows us to destroy the context abstract object while letting the normal object tracking destroy the backing BO.

Definition at line 450 of file i915_gem_context.c.

void i915_teardown_sysfs ( struct drm_device * dev_priv )

Definition at line 409 of file i915_sysfs.c.

void i915_update_dri1_breadcrumb ( struct drm_device * dev )

Definition at line 82 of file i915_dma.c.

void i915_update_gfx_val ( struct drm_i915_private * dev_priv )

Definition at line 2992 of file intel_pm.c.

int __must_check i915_wait_seqno	(	struct intel_ring_buffer *	ring,
		uint32_t	seqno
	)

Waits for a sequence number to be signaled, and cleans up the request and object lists appropriately for that event.

Definition at line 1075 of file i915_gem.c.

void intel_detect_pch ( struct drm_device * dev )

Definition at line 405 of file i915_drv.c.

void intel_disable_fbc ( struct drm_device * dev )

Definition at line 350 of file intel_pm.c.

void intel_enable_asle ( struct drm_device * dev )

intel_enable_asle - enable ASLE interrupt for OpRegion

Definition at line 88 of file i915_irq.c.

int intel_enable_rc6 ( const struct drm_device * dev )

Definition at line 2370 of file intel_pm.c.

bool intel_fbc_enabled ( struct drm_device * dev )

Definition at line 248 of file intel_pm.c.

void intel_gmbus_force_bit	(	struct i2c_adapter *	adapter,
		bool	force_bit
	)

Definition at line 531 of file intel_i2c.c.

struct i2c_adapter* intel_gmbus_get_adapter	(	struct drm_i915_private *	dev_priv,
		unsigned	port
	)

read

Definition at line 515 of file intel_i2c.c.

bool intel_gmbus_is_forced_bit ( struct i2c_adapter * adapter )

inline

Definition at line 1561 of file i915_drv.h.

bool intel_gmbus_is_port_valid ( unsigned port )

inline

Definition at line 1552 of file i915_drv.h.

void intel_gmbus_set_speed	(	struct i2c_adapter *	adapter,
		int	speed
	)

Definition at line 524 of file intel_i2c.c.

int intel_gpu_reset ( struct drm_device * dev )

Definition at line 709 of file i915_drv.c.

void intel_gt_init ( struct drm_device * dev )

Definition at line 4136 of file intel_pm.c.

void intel_i2c_reset ( struct drm_device * dev )

Definition at line 62 of file intel_i2c.c.

void intel_irq_init ( struct drm_device * dev )

Definition at line 2687 of file i915_irq.c.

void intel_modeset_cleanup ( struct drm_device * dev )

Definition at line 8334 of file intel_display.c.

void intel_modeset_gem_init ( struct drm_device * dev )

Definition at line 8325 of file intel_display.c.

void intel_modeset_init ( struct drm_device * dev )

Definition at line 8018 of file intel_display.c.

void intel_modeset_init_hw ( struct drm_device * dev )

Definition at line 8002 of file intel_display.c.

void intel_modeset_setup_hw_state ( struct drm_device * dev )

Definition at line 8249 of file intel_display.c.

int intel_modeset_vga_set_state	(	struct drm_device *	dev,
		bool	state
	)

Definition at line 8397 of file intel_display.c.

int intel_opregion_setup ( struct drm_device * dev )

Definition at line 502 of file intel_opregion.c.

int intel_setup_gmbus ( struct drm_device * dev )

intel_gmbus_setup - instantiate all Intel i2c GMBuses : DRM device

Definition at line 461 of file intel_i2c.c.

void intel_teardown_gmbus ( struct drm_device * dev )

Definition at line 538 of file intel_i2c.c.

int intel_trans_dp_port_sel ( struct drm_crtc * crtc )

Definition at line 2435 of file intel_dp.c.

void ironlake_init_pch_refclk ( struct drm_device * dev )

Definition at line 4501 of file intel_display.c.

bool ironlake_set_drps	(	struct drm_device *	dev,
		u8	val
	)

Definition at line 2174 of file intel_pm.c.

Variable Documentation

unsigned int i915_fbpercrtc __always_unused

Definition at line 47 of file i915_drv.c.

unsigned int i915_preliminary_hw_support __read_mostly

Definition at line 1210 of file i915_drv.h.

struct drm_ioctl_desc i915_ioctls[]

Definition at line 1847 of file i915_dma.c.

int i915_max_ioctl

Definition at line 1898 of file i915_dma.c.

Data Structures

Macros

Typedefs

Enumerations

Functions

Variables

Macro Definition Documentation

Typedef Documentation

Enumeration Type Documentation

Function Documentation

Variable Documentation