Linux Kernel
3.7.1
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#include <linux/time.h>
#include <linux/spinlock.h>
#include <linux/pm.h>
#include <linux/types.h>
#include <asm/io.h>
Go to the source code of this file.
Data Structures | |
struct | st_fifo_entry |
struct | st_fifo |
struct | frame_cb |
struct | tx_fifo |
struct | eventflag |
struct | via_ircc_cb |
Macros | |
#define | MAX_TX_WINDOW 7 |
#define | MAX_RX_WINDOW 7 |
#define | I_CF_L_0 0x10 |
#define | I_CF_H_0 0x11 |
#define | I_SIR_BOF 0x12 |
#define | I_SIR_EOF 0x13 |
#define | I_ST_CT_0 0x15 |
#define | I_ST_L_1 0x16 |
#define | I_ST_H_1 0x17 |
#define | I_CF_L_1 0x18 |
#define | I_CF_H_1 0x19 |
#define | I_CF_L_2 0x1a |
#define | I_CF_H_2 0x1b |
#define | I_CF_3 0x1e |
#define | H_CT 0x20 |
#define | H_ST 0x21 |
#define | M_CT 0x22 |
#define | TX_CT_1 0x23 |
#define | TX_CT_2 0x24 |
#define | TX_ST 0x25 |
#define | RX_CT 0x26 |
#define | RX_ST 0x27 |
#define | RESET 0x28 |
#define | P_ADDR 0x29 |
#define | RX_C_L 0x2a |
#define | RX_C_H 0x2b |
#define | RX_P_L 0x2c |
#define | RX_P_H 0x2d |
#define | TX_C_L 0x2e |
#define | TX_C_H 0x2f |
#define | TIMER 0x32 |
#define | I_CF_4 0x33 |
#define | I_T_C_L 0x34 |
#define | I_T_C_H 0x35 |
#define | VERSION 0x3f |
#define | StartAddr 0x10 |
#define | EndAddr 0x3f |
#define | GetBit(val, bit) val = (unsigned char) ((val>>bit) & 0x1) |
#define | SetBit(val, bit) val= (unsigned char ) (val | (0x1 << bit)) |
#define | ResetBit(val, bit) val= (unsigned char ) (val & ~(0x1 << bit)) |
#define | OFF 0 |
#define | ON 1 |
#define | DMA_TX_MODE 0x08 |
#define | DMA_RX_MODE 0x04 |
#define | DMA1 0 |
#define | DMA2 0xc0 |
#define | MASK1 DMA1+0x0a |
#define | MASK2 DMA2+0x14 |
#define | Clk_bit 0x40 |
#define | Tx_bit 0x01 |
#define | Rd_Valid 0x08 |
#define | RxBit 0x08 |
#define | CRC16(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_L_0,7,val) |
#define | SIRFilter(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_L_0,3,val) |
#define | Filter(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_L_0,2,val) |
#define | InvertTX(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_L_0,1,val) |
#define | InvertRX(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_L_0,0,val) |
#define | EnableTX(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_H_0,4,val) |
#define | EnableRX(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_H_0,3,val) |
#define | EnableDMA(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_H_0,2,val) |
#define | SIRRecvAny(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_H_0,1,val) |
#define | DiableTrans(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_H_0,0,val) |
#define | SetSIRBOF(BaseAddr, val) WriteReg(BaseAddr,I_SIR_BOF,val) |
#define | SetSIREOF(BaseAddr, val) WriteReg(BaseAddr,I_SIR_EOF,val) |
#define | GetSIRBOF(BaseAddr) ReadReg(BaseAddr,I_SIR_BOF) |
#define | GetSIREOF(BaseAddr) ReadReg(BaseAddr,I_SIR_EOF) |
#define | EnPhys(BaseAddr, val) WriteRegBit(BaseAddr,I_ST_CT_0,7,val) |
#define | IsModeError(BaseAddr) CheckRegBit(BaseAddr,I_ST_CT_0,6) |
#define | IsVFIROn(BaseAddr) CheckRegBit(BaseAddr,0x14,0) |
#define | IsFIROn(BaseAddr) CheckRegBit(BaseAddr,I_ST_CT_0,5) |
#define | IsMIROn(BaseAddr) CheckRegBit(BaseAddr,I_ST_CT_0,4) |
#define | IsSIROn(BaseAddr) CheckRegBit(BaseAddr,I_ST_CT_0,3) |
#define | IsEnableTX(BaseAddr) CheckRegBit(BaseAddr,I_ST_CT_0,2) |
#define | IsEnableRX(BaseAddr) CheckRegBit(BaseAddr,I_ST_CT_0,1) |
#define | Is16CRC(BaseAddr) CheckRegBit(BaseAddr,I_ST_CT_0,0) |
#define | DisableAdjacentPulseWidth(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_3,5,val) |
#define | DisablePulseWidthAdjust(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_3,4,val) |
#define | UseOneRX(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_3,1,val) |
#define | SlowIRRXLowActive(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_3,0,val) |
#define | EnAllInt(BaseAddr, val) WriteRegBit(BaseAddr,H_CT,7,val) |
#define | TXStart(BaseAddr, val) WriteRegBit(BaseAddr,H_CT,6,val) |
#define | RXStart(BaseAddr, val) WriteRegBit(BaseAddr,H_CT,5,val) |
#define | ClearRXInt(BaseAddr, val) WriteRegBit(BaseAddr,H_CT,4,val) |
#define | IsRXInt(BaseAddr) CheckRegBit(BaseAddr,H_ST,4) |
#define | GetIntIndentify(BaseAddr) ((ReadReg(BaseAddr,H_ST)&0xf1) >>1) |
#define | IsHostBusy(BaseAddr) CheckRegBit(BaseAddr,H_ST,0) |
#define | GetHostStatus(BaseAddr) ReadReg(BaseAddr,H_ST) |
#define | EnTXDMA(BaseAddr, val) WriteRegBit(BaseAddr,M_CT,7,val) |
#define | EnRXDMA(BaseAddr, val) WriteRegBit(BaseAddr,M_CT,6,val) |
#define | SwapDMA(BaseAddr, val) WriteRegBit(BaseAddr,M_CT,5,val) |
#define | EnInternalLoop(BaseAddr, val) WriteRegBit(BaseAddr,M_CT,4,val) |
#define | EnExternalLoop(BaseAddr, val) WriteRegBit(BaseAddr,M_CT,3,val) |
#define | EnTXFIFOHalfLevelInt(BaseAddr, val) WriteRegBit(BaseAddr,TX_CT_1,4,val) |
#define | EnTXFIFOUnderrunEOMInt(BaseAddr, val) WriteRegBit(BaseAddr,TX_CT_1,5,val) |
#define | EnTXFIFOReadyInt(BaseAddr, val) WriteRegBit(BaseAddr,TX_CT_1,6,val) |
#define | ForceUnderrun(BaseAddr, val) WriteRegBit(BaseAddr,TX_CT_2,7,val) |
#define | EnTXCRC(BaseAddr, val) WriteRegBit(BaseAddr,TX_CT_2,6,val) |
#define | ForceBADCRC(BaseAddr, val) WriteRegBit(BaseAddr,TX_CT_2,5,val) |
#define | SendSIP(BaseAddr, val) WriteRegBit(BaseAddr,TX_CT_2,4,val) |
#define | ClearEnTX(BaseAddr, val) WriteRegBit(BaseAddr,TX_CT_2,3,val) |
#define | GetTXStatus(BaseAddr) ReadReg(BaseAddr,TX_ST) |
#define | EnRXSpecInt(BaseAddr, val) WriteRegBit(BaseAddr,RX_CT,0,val) |
#define | EnRXFIFOReadyInt(BaseAddr, val) WriteRegBit(BaseAddr,RX_CT,1,val) |
#define | EnRXFIFOHalfLevelInt(BaseAddr, val) WriteRegBit(BaseAddr,RX_CT,7,val) |
#define | GetRXStatus(BaseAddr) ReadReg(BaseAddr,RX_ST) |
#define | SetPacketAddr(BaseAddr, addr) WriteReg(BaseAddr,P_ADDR,addr) |
#define | EnGPIOtoRX2(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_4,7,val) |
#define | EnTimerInt(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_4,1,val) |
#define | ClearTimerInt(BaseAddr, val) WriteRegBit(BaseAddr,I_CF_4,0,val) |
#define | WriteGIO(BaseAddr, val) WriteRegBit(BaseAddr,I_T_C_L,7,val) |
#define | ReadGIO(BaseAddr) CheckRegBit(BaseAddr,I_T_C_L,7) |
#define | ReadRX(BaseAddr) CheckRegBit(BaseAddr,I_T_C_L,3) |
#define | WriteTX(BaseAddr, val) WriteRegBit(BaseAddr,I_T_C_L,0,val) |
#define | EnRX2(BaseAddr, val) WriteRegBit(BaseAddr,I_T_C_H,7,val) |
#define | ReadRX2(BaseAddr) CheckRegBit(BaseAddr,I_T_C_H,7) |
#define | GetFIRVersion(BaseAddr) ReadReg(BaseAddr,VERSION) |
Definition at line 385 of file via-ircc.h.
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#define Clk_bit 0x40 |
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#define DMA1 0 |
Definition at line 177 of file via-ircc.h.
#define DMA2 0xc0 |
Definition at line 178 of file via-ircc.h.
#define DMA_RX_MODE 0x04 |
Definition at line 175 of file via-ircc.h.
#define DMA_TX_MODE 0x08 |
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#define EndAddr 0x3f |
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#define GetFIRVersion | ( | BaseAddr | ) | ReadReg(BaseAddr,VERSION) |
Definition at line 409 of file via-ircc.h.
#define GetHostStatus | ( | BaseAddr | ) | ReadReg(BaseAddr,H_ST) |
Definition at line 369 of file via-ircc.h.
#define GetIntIndentify | ( | BaseAddr | ) | ((ReadReg(BaseAddr,H_ST)&0xf1) >>1) |
Definition at line 367 of file via-ircc.h.
#define GetRXStatus | ( | BaseAddr | ) | ReadReg(BaseAddr,RX_ST) |
Definition at line 393 of file via-ircc.h.
#define GetSIRBOF | ( | BaseAddr | ) | ReadReg(BaseAddr,I_SIR_BOF) |
Definition at line 343 of file via-ircc.h.
#define GetSIREOF | ( | BaseAddr | ) | ReadReg(BaseAddr,I_SIR_EOF) |
Definition at line 344 of file via-ircc.h.
#define GetTXStatus | ( | BaseAddr | ) | ReadReg(BaseAddr,TX_ST) |
Definition at line 387 of file via-ircc.h.
#define H_CT 0x20 |
Definition at line 141 of file via-ircc.h.
#define H_ST 0x21 |
Definition at line 142 of file via-ircc.h.
#define I_CF_3 0x1e |
Definition at line 140 of file via-ircc.h.
#define I_CF_4 0x33 |
Definition at line 158 of file via-ircc.h.
#define I_CF_H_0 0x11 |
Definition at line 130 of file via-ircc.h.
#define I_CF_H_1 0x19 |
Definition at line 137 of file via-ircc.h.
#define I_CF_H_2 0x1b |
Definition at line 139 of file via-ircc.h.
#define I_CF_L_0 0x10 |
Definition at line 129 of file via-ircc.h.
#define I_CF_L_1 0x18 |
Definition at line 136 of file via-ircc.h.
#define I_CF_L_2 0x1a |
Definition at line 138 of file via-ircc.h.
#define I_SIR_BOF 0x12 |
Definition at line 131 of file via-ircc.h.
#define I_SIR_EOF 0x13 |
Definition at line 132 of file via-ircc.h.
#define I_ST_CT_0 0x15 |
Definition at line 133 of file via-ircc.h.
#define I_ST_H_1 0x17 |
Definition at line 135 of file via-ircc.h.
#define I_ST_L_1 0x16 |
Definition at line 134 of file via-ircc.h.
#define I_T_C_H 0x35 |
Definition at line 160 of file via-ircc.h.
#define I_T_C_L 0x34 |
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#define Is16CRC | ( | BaseAddr | ) | CheckRegBit(BaseAddr,I_ST_CT_0,0) |
Definition at line 354 of file via-ircc.h.
#define IsEnableRX | ( | BaseAddr | ) | CheckRegBit(BaseAddr,I_ST_CT_0,1) |
Definition at line 353 of file via-ircc.h.
#define IsEnableTX | ( | BaseAddr | ) | CheckRegBit(BaseAddr,I_ST_CT_0,2) |
Definition at line 352 of file via-ircc.h.
#define IsFIROn | ( | BaseAddr | ) | CheckRegBit(BaseAddr,I_ST_CT_0,5) |
Definition at line 349 of file via-ircc.h.
#define IsHostBusy | ( | BaseAddr | ) | CheckRegBit(BaseAddr,H_ST,0) |
Definition at line 368 of file via-ircc.h.
#define IsMIROn | ( | BaseAddr | ) | CheckRegBit(BaseAddr,I_ST_CT_0,4) |
Definition at line 350 of file via-ircc.h.
#define IsModeError | ( | BaseAddr | ) | CheckRegBit(BaseAddr,I_ST_CT_0,6) |
Definition at line 347 of file via-ircc.h.
#define IsRXInt | ( | BaseAddr | ) | CheckRegBit(BaseAddr,H_ST,4) |
Definition at line 366 of file via-ircc.h.
#define IsSIROn | ( | BaseAddr | ) | CheckRegBit(BaseAddr,I_ST_CT_0,3) |
Definition at line 351 of file via-ircc.h.
#define IsVFIROn | ( | BaseAddr | ) | CheckRegBit(BaseAddr,0x14,0) |
Definition at line 348 of file via-ircc.h.
#define M_CT 0x22 |
Definition at line 143 of file via-ircc.h.
#define MASK1 DMA1+0x0a |
Definition at line 179 of file via-ircc.h.
#define MASK2 DMA2+0x14 |
Definition at line 180 of file via-ircc.h.
#define MAX_RX_WINDOW 7 |
Definition at line 40 of file via-ircc.h.
#define MAX_TX_WINDOW 7 |
Definition at line 39 of file via-ircc.h.
#define OFF 0 |
Definition at line 172 of file via-ircc.h.
#define ON 1 |
Definition at line 173 of file via-ircc.h.
#define P_ADDR 0x29 |
Definition at line 150 of file via-ircc.h.
#define Rd_Valid 0x08 |
Definition at line 184 of file via-ircc.h.
#define ReadGIO | ( | BaseAddr | ) | CheckRegBit(BaseAddr,I_T_C_L,7) |
Definition at line 402 of file via-ircc.h.
#define ReadRX | ( | BaseAddr | ) | CheckRegBit(BaseAddr,I_T_C_L,3) |
Definition at line 403 of file via-ircc.h.
#define ReadRX2 | ( | BaseAddr | ) | CheckRegBit(BaseAddr,I_T_C_H,7) |
Definition at line 407 of file via-ircc.h.
#define RESET 0x28 |
Definition at line 149 of file via-ircc.h.
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#define RX_C_H 0x2b |
Definition at line 152 of file via-ircc.h.
#define RX_C_L 0x2a |
Definition at line 151 of file via-ircc.h.
#define RX_CT 0x26 |
Definition at line 147 of file via-ircc.h.
#define RX_P_H 0x2d |
Definition at line 154 of file via-ircc.h.
#define RX_P_L 0x2c |
Definition at line 153 of file via-ircc.h.
#define RX_ST 0x27 |
Definition at line 148 of file via-ircc.h.
#define RxBit 0x08 |
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#define StartAddr 0x10 |
Definition at line 163 of file via-ircc.h.
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#define TIMER 0x32 |
Definition at line 157 of file via-ircc.h.
#define Tx_bit 0x01 |
Definition at line 183 of file via-ircc.h.
#define TX_C_H 0x2f |
Definition at line 156 of file via-ircc.h.
#define TX_C_L 0x2e |
Definition at line 155 of file via-ircc.h.
#define TX_CT_1 0x23 |
Definition at line 144 of file via-ircc.h.
#define TX_CT_2 0x24 |
Definition at line 145 of file via-ircc.h.
#define TX_ST 0x25 |
Definition at line 146 of file via-ircc.h.
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#define VERSION 0x3f |
Definition at line 161 of file via-ircc.h.
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