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Data Structures | Macros
vme_ca91cx42.h File Reference

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Data Structures

struct  ca91cx42_driver
 
struct  ca91cx42_dma_descriptor
 
struct  ca91cx42_dma_entry
 

Macros

#define PCI_VENDOR_ID_TUNDRA   0x10e3
 
#define PCI_DEVICE_ID_TUNDRA_CA91C142   0x0000
 
#define CA91C142_MAX_MASTER   8 /* Max Master Windows */
 
#define CA91C142_MAX_SLAVE   8 /* Max Slave Windows */
 
#define CA91C142_MAX_DMA   1 /* Max DMA Controllers */
 
#define CA91C142_MAX_MAILBOX   4 /* Max Mail Box registers */
 
#define CA91CX42_PCI_ID   0x000
 
#define CA91CX42_PCI_CSR   0x004
 
#define CA91CX42_PCI_CLASS   0x008
 
#define CA91CX42_PCI_MISC0   0x00C
 
#define CA91CX42_PCI_BS   0x010
 
#define CA91CX42_PCI_MISC1   0x03C
 
#define LSI0_CTL   0x0100
 
#define LSI0_BS   0x0104
 
#define LSI0_BD   0x0108
 
#define LSI0_TO   0x010C
 
#define LSI1_CTL   0x0114
 
#define LSI1_BS   0x0118
 
#define LSI1_BD   0x011C
 
#define LSI1_TO   0x0120
 
#define LSI2_CTL   0x0128
 
#define LSI2_BS   0x012C
 
#define LSI2_BD   0x0130
 
#define LSI2_TO   0x0134
 
#define LSI3_CTL   0x013C
 
#define LSI3_BS   0x0140
 
#define LSI3_BD   0x0144
 
#define LSI3_TO   0x0148
 
#define LSI4_CTL   0x01A0
 
#define LSI4_BS   0x01A4
 
#define LSI4_BD   0x01A8
 
#define LSI4_TO   0x01AC
 
#define LSI5_CTL   0x01B4
 
#define LSI5_BS   0x01B8
 
#define LSI5_BD   0x01BC
 
#define LSI5_TO   0x01C0
 
#define LSI6_CTL   0x01C8
 
#define LSI6_BS   0x01CC
 
#define LSI6_BD   0x01D0
 
#define LSI6_TO   0x01D4
 
#define LSI7_CTL   0x01DC
 
#define LSI7_BS   0x01E0
 
#define LSI7_BD   0x01E4
 
#define LSI7_TO   0x01E8
 
#define SCYC_CTL   0x0170
 
#define SCYC_ADDR   0x0174
 
#define SCYC_EN   0x0178
 
#define SCYC_CMP   0x017C
 
#define SCYC_SWP   0x0180
 
#define LMISC   0x0184
 
#define SLSI   0x0188
 
#define L_CMDERR   0x018C
 
#define LAERR   0x0190
 
#define DCTL   0x0200
 
#define DTBC   0x0204
 
#define DLA   0x0208
 
#define DVA   0x0210
 
#define DCPP   0x0218
 
#define DGCS   0x0220
 
#define D_LLUE   0x0224
 
#define LINT_EN   0x0300
 
#define LINT_STAT   0x0304
 
#define LINT_MAP0   0x0308
 
#define LINT_MAP1   0x030C
 
#define VINT_EN   0x0310
 
#define VINT_STAT   0x0314
 
#define VINT_MAP0   0x0318
 
#define VINT_MAP1   0x031C
 
#define STATID   0x0320
 
#define V1_STATID   0x0324
 
#define V2_STATID   0x0328
 
#define V3_STATID   0x032C
 
#define V4_STATID   0x0330
 
#define V5_STATID   0x0334
 
#define V6_STATID   0x0338
 
#define V7_STATID   0x033C
 
#define LINT_MAP2   0x0340
 
#define VINT_MAP2   0x0344
 
#define MBOX0   0x0348
 
#define MBOX1   0x034C
 
#define MBOX2   0x0350
 
#define MBOX3   0x0354
 
#define SEMA0   0x0358
 
#define SEMA1   0x035C
 
#define MAST_CTL   0x0400
 
#define MISC_CTL   0x0404
 
#define MISC_STAT   0x0408
 
#define USER_AM   0x040C
 
#define VSI0_CTL   0x0F00
 
#define VSI0_BS   0x0F04
 
#define VSI0_BD   0x0F08
 
#define VSI0_TO   0x0F0C
 
#define VSI1_CTL   0x0F14
 
#define VSI1_BS   0x0F18
 
#define VSI1_BD   0x0F1C
 
#define VSI1_TO   0x0F20
 
#define VSI2_CTL   0x0F28
 
#define VSI2_BS   0x0F2C
 
#define VSI2_BD   0x0F30
 
#define VSI2_TO   0x0F34
 
#define VSI3_CTL   0x0F3C
 
#define VSI3_BS   0x0F40
 
#define VSI3_BD   0x0F44
 
#define VSI3_TO   0x0F48
 
#define LM_CTL   0x0F64
 
#define LM_BS   0x0F68
 
#define VRAI_CTL   0x0F70
 
#define VRAI_BS   0x0F74
 
#define VCSR_CTL   0x0F80
 
#define VCSR_TO   0x0F84
 
#define V_AMERR   0x0F88
 
#define VAERR   0x0F8C
 
#define VSI4_CTL   0x0F90
 
#define VSI4_BS   0x0F94
 
#define VSI4_BD   0x0F98
 
#define VSI4_TO   0x0F9C
 
#define VSI5_CTL   0x0FA4
 
#define VSI5_BS   0x0FA8
 
#define VSI5_BD   0x0FAC
 
#define VSI5_TO   0x0FB0
 
#define VSI6_CTL   0x0FB8
 
#define VSI6_BS   0x0FBC
 
#define VSI6_BD   0x0FC0
 
#define VSI6_TO   0x0FC4
 
#define VSI7_CTL   0x0FCC
 
#define VSI7_BS   0x0FD0
 
#define VSI7_BD   0x0FD4
 
#define VSI7_TO   0x0FD8
 
#define VCSR_CLR   0x0FF4
 
#define VCSR_SET   0x0FF8
 
#define VCSR_BS   0x0FFC
 
#define CA91CX42_BM_PCI_CLASS_BASE   0xFF000000
 
#define CA91CX42_OF_PCI_CLASS_BASE   24
 
#define CA91CX42_BM_PCI_CLASS_SUB   0x00FF0000
 
#define CA91CX42_OF_PCI_CLASS_SUB   16
 
#define CA91CX42_BM_PCI_CLASS_PROG   0x0000FF00
 
#define CA91CX42_OF_PCI_CLASS_PROG   8
 
#define CA91CX42_BM_PCI_CLASS_RID   0x000000FF
 
#define CA91CX42_OF_PCI_CLASS_RID   0
 
#define CA91CX42_OF_PCI_CLASS_RID_UNIVERSE_I   0
 
#define CA91CX42_OF_PCI_CLASS_RID_UNIVERSE_II   1
 
#define CA91CX42_BM_PCI_MISC0_BISTC   0x80000000
 
#define CA91CX42_BM_PCI_MISC0_SBIST   0x60000000
 
#define CA91CX42_BM_PCI_MISC0_CCODE   0x0F000000
 
#define CA91CX42_BM_PCI_MISC0_MFUNCT   0x00800000
 
#define CA91CX42_BM_PCI_MISC0_LAYOUT   0x007F0000
 
#define CA91CX42_BM_PCI_MISC0_LTIMER   0x0000FF00
 
#define CA91CX42_OF_PCI_MISC0_LTIMER   8
 
#define CA91CX42_LSI_CTL_EN   (1<<31)
 
#define CA91CX42_LSI_CTL_PWEN   (1<<30)
 
#define CA91CX42_LSI_CTL_VDW_M   (3<<22)
 
#define CA91CX42_LSI_CTL_VDW_D8   0
 
#define CA91CX42_LSI_CTL_VDW_D16   (1<<22)
 
#define CA91CX42_LSI_CTL_VDW_D32   (1<<23)
 
#define CA91CX42_LSI_CTL_VDW_D64   (3<<22)
 
#define CA91CX42_LSI_CTL_VAS_M   (7<<16)
 
#define CA91CX42_LSI_CTL_VAS_A16   0
 
#define CA91CX42_LSI_CTL_VAS_A24   (1<<16)
 
#define CA91CX42_LSI_CTL_VAS_A32   (1<<17)
 
#define CA91CX42_LSI_CTL_VAS_CRCSR   (5<<16)
 
#define CA91CX42_LSI_CTL_VAS_USER1   (3<<17)
 
#define CA91CX42_LSI_CTL_VAS_USER2   (7<<16)
 
#define CA91CX42_LSI_CTL_PGM_M   (1<<14)
 
#define CA91CX42_LSI_CTL_PGM_DATA   0
 
#define CA91CX42_LSI_CTL_PGM_PGM   (1<<14)
 
#define CA91CX42_LSI_CTL_SUPER_M   (1<<12)
 
#define CA91CX42_LSI_CTL_SUPER_NPRIV   0
 
#define CA91CX42_LSI_CTL_SUPER_SUPR   (1<<12)
 
#define CA91CX42_LSI_CTL_VCT_M   (1<<8)
 
#define CA91CX42_LSI_CTL_VCT_BLT   (1<<8)
 
#define CA91CX42_LSI_CTL_VCT_MBLT   (1<<8)
 
#define CA91CX42_LSI_CTL_LAS   (1<<0)
 
#define CA91CX42_SCYC_CTL_LAS_PCIMEM   0
 
#define CA91CX42_SCYC_CTL_LAS_PCIIO   (1<<2)
 
#define CA91CX42_SCYC_CTL_CYC_M   (3<<0)
 
#define CA91CX42_SCYC_CTL_CYC_RMW   (1<<0)
 
#define CA91CX42_SCYC_CTL_CYC_ADOH   (1<<1)
 
#define CA91CX42_BM_LMISC_CRT   0xF0000000
 
#define CA91CX42_OF_LMISC_CRT   28
 
#define CA91CX42_BM_LMISC_CWT   0x0F000000
 
#define CA91CX42_OF_LMISC_CWT   24
 
#define CA91CX42_BM_SLSI_EN   0x80000000
 
#define CA91CX42_BM_SLSI_PWEN   0x40000000
 
#define CA91CX42_BM_SLSI_VDW   0x00F00000
 
#define CA91CX42_OF_SLSI_VDW   20
 
#define CA91CX42_BM_SLSI_PGM   0x0000F000
 
#define CA91CX42_OF_SLSI_PGM   12
 
#define CA91CX42_BM_SLSI_SUPER   0x00000F00
 
#define CA91CX42_OF_SLSI_SUPER   8
 
#define CA91CX42_BM_SLSI_BS   0x000000F6
 
#define CA91CX42_OF_SLSI_BS   2
 
#define CA91CX42_BM_SLSI_LAS   0x00000003
 
#define CA91CX42_OF_SLSI_LAS   0
 
#define CA91CX42_BM_SLSI_RESERVED   0x3F0F0000
 
#define CA91CX42_DCTL_L2V   (1<<31)
 
#define CA91CX42_DCTL_VDW_M   (3<<22)
 
#define CA91CX42_DCTL_VDW_M   (3<<22)
 
#define CA91CX42_DCTL_VDW_D8   0
 
#define CA91CX42_DCTL_VDW_D16   (1<<22)
 
#define CA91CX42_DCTL_VDW_D32   (1<<23)
 
#define CA91CX42_DCTL_VDW_D64   (3<<22)
 
#define CA91CX42_DCTL_VAS_M   (7<<16)
 
#define CA91CX42_DCTL_VAS_A16   0
 
#define CA91CX42_DCTL_VAS_A24   (1<<16)
 
#define CA91CX42_DCTL_VAS_A32   (1<<17)
 
#define CA91CX42_DCTL_VAS_USER1   (3<<17)
 
#define CA91CX42_DCTL_VAS_USER2   (7<<16)
 
#define CA91CX42_DCTL_PGM_M   (1<<14)
 
#define CA91CX42_DCTL_PGM_DATA   0
 
#define CA91CX42_DCTL_PGM_PGM   (1<<14)
 
#define CA91CX42_DCTL_SUPER_M   (1<<12)
 
#define CA91CX42_DCTL_SUPER_NPRIV   0
 
#define CA91CX42_DCTL_SUPER_SUPR   (1<<12)
 
#define CA91CX42_DCTL_VCT_M   (1<<8)
 
#define CA91CX42_DCTL_VCT_BLT   (1<<8)
 
#define CA91CX42_DCTL_LD64EN   (1<<7)
 
#define CA91CX42_DCPP_M   0xf
 
#define CA91CX42_DCPP_NULL   (1<<0)
 
#define CA91CX42_DGCS_GO   (1<<31)
 
#define CA91CX42_DGCS_STOP_REQ   (1<<30)
 
#define CA91CX42_DGCS_HALT_REQ   (1<<29)
 
#define CA91CX42_DGCS_CHAIN   (1<<27)
 
#define CA91CX42_DGCS_VON_M   (7<<20)
 
#define CA91CX42_DGCS_VOFF_M   (0xf<<16)
 
#define CA91CX42_DGCS_ACT   (1<<15)
 
#define CA91CX42_DGCS_STOP   (1<<14)
 
#define CA91CX42_DGCS_HALT   (1<<13)
 
#define CA91CX42_DGCS_DONE   (1<<11)
 
#define CA91CX42_DGCS_LERR   (1<<10)
 
#define CA91CX42_DGCS_VERR   (1<<9)
 
#define CA91CX42_DGCS_PERR   (1<<8)
 
#define CA91CX42_DGCS_INT_STOP   (1<<6)
 
#define CA91CX42_DGCS_INT_HALT   (1<<5)
 
#define CA91CX42_DGCS_INT_DONE   (1<<3)
 
#define CA91CX42_DGCS_INT_LERR   (1<<2)
 
#define CA91CX42_DGCS_INT_VERR   (1<<1)
 
#define CA91CX42_DGCS_INT_PERR   (1<<0)
 
#define CA91CX42_LINT_LM3   0x00800000
 
#define CA91CX42_LINT_LM2   0x00400000
 
#define CA91CX42_LINT_LM1   0x00200000
 
#define CA91CX42_LINT_LM0   0x00100000
 
#define CA91CX42_LINT_MBOX3   0x00080000
 
#define CA91CX42_LINT_MBOX2   0x00040000
 
#define CA91CX42_LINT_MBOX1   0x00020000
 
#define CA91CX42_LINT_MBOX0   0x00010000
 
#define CA91CX42_LINT_ACFAIL   0x00008000
 
#define CA91CX42_LINT_SYSFAIL   0x00004000
 
#define CA91CX42_LINT_SW_INT   0x00002000
 
#define CA91CX42_LINT_SW_IACK   0x00001000
 
#define CA91CX42_LINT_VERR   0x00000400
 
#define CA91CX42_LINT_LERR   0x00000200
 
#define CA91CX42_LINT_DMA   0x00000100
 
#define CA91CX42_LINT_VIRQ7   0x00000080
 
#define CA91CX42_LINT_VIRQ6   0x00000040
 
#define CA91CX42_LINT_VIRQ5   0x00000020
 
#define CA91CX42_LINT_VIRQ4   0x00000010
 
#define CA91CX42_LINT_VIRQ3   0x00000008
 
#define CA91CX42_LINT_VIRQ2   0x00000004
 
#define CA91CX42_LINT_VIRQ1   0x00000002
 
#define CA91CX42_LINT_VOWN   0x00000001
 
#define CA91CX42_LINT_MBOX   0x000F0000
 
#define CA91CX42_BM_MAST_CTL_MAXRTRY   0xF0000000
 
#define CA91CX42_OF_MAST_CTL_MAXRTRY   28
 
#define CA91CX42_BM_MAST_CTL_PWON   0x0F000000
 
#define CA91CX42_OF_MAST_CTL_PWON   24
 
#define CA91CX42_BM_MAST_CTL_VRL   0x00C00000
 
#define CA91CX42_OF_MAST_CTL_VRL   22
 
#define CA91CX42_BM_MAST_CTL_VRM   0x00200000
 
#define CA91CX42_BM_MAST_CTL_VREL   0x00100000
 
#define CA91CX42_BM_MAST_CTL_VOWN   0x00080000
 
#define CA91CX42_BM_MAST_CTL_VOWN_ACK   0x00040000
 
#define CA91CX42_BM_MAST_CTL_PABS   0x00001000
 
#define CA91CX42_BM_MAST_CTL_BUS_NO   0x0000000F
 
#define CA91CX42_OF_MAST_CTL_BUS_NO   0
 
#define CA91CX42_MISC_CTL_VBTO   0xF0000000
 
#define CA91CX42_MISC_CTL_VARB   0x04000000
 
#define CA91CX42_MISC_CTL_VARBTO   0x03000000
 
#define CA91CX42_MISC_CTL_SW_LRST   0x00800000
 
#define CA91CX42_MISC_CTL_SW_SRST   0x00400000
 
#define CA91CX42_MISC_CTL_BI   0x00100000
 
#define CA91CX42_MISC_CTL_ENGBI   0x00080000
 
#define CA91CX42_MISC_CTL_RESCIND   0x00040000
 
#define CA91CX42_MISC_CTL_SYSCON   0x00020000
 
#define CA91CX42_MISC_CTL_V64AUTO   0x00010000
 
#define CA91CX42_MISC_CTL_RESERVED   0x0820FFFF
 
#define CA91CX42_OF_MISC_CTL_VARBTO   24
 
#define CA91CX42_OF_MISC_CTL_VBTO   28
 
#define CA91CX42_BM_MISC_STAT_ENDIAN   0x80000000
 
#define CA91CX42_BM_MISC_STAT_LCLSIZE   0x40000000
 
#define CA91CX42_BM_MISC_STAT_DY4AUTO   0x08000000
 
#define CA91CX42_BM_MISC_STAT_MYBBSY   0x00200000
 
#define CA91CX42_BM_MISC_STAT_DY4DONE   0x00080000
 
#define CA91CX42_BM_MISC_STAT_TXFE   0x00040000
 
#define CA91CX42_BM_MISC_STAT_RXFE   0x00020000
 
#define CA91CX42_BM_MISC_STAT_DY4AUTOID   0x0000FF00
 
#define CA91CX42_OF_MISC_STAT_DY4AUTOID   8
 
#define CA91CX42_VSI_CTL_EN   (1<<31)
 
#define CA91CX42_VSI_CTL_PWEN   (1<<30)
 
#define CA91CX42_VSI_CTL_PREN   (1<<29)
 
#define CA91CX42_VSI_CTL_PGM_M   (3<<22)
 
#define CA91CX42_VSI_CTL_PGM_DATA   (1<<22)
 
#define CA91CX42_VSI_CTL_PGM_PGM   (1<<23)
 
#define CA91CX42_VSI_CTL_SUPER_M   (3<<20)
 
#define CA91CX42_VSI_CTL_SUPER_NPRIV   (1<<20)
 
#define CA91CX42_VSI_CTL_SUPER_SUPR   (1<<21)
 
#define CA91CX42_VSI_CTL_VAS_M   (7<<16)
 
#define CA91CX42_VSI_CTL_VAS_A16   0
 
#define CA91CX42_VSI_CTL_VAS_A24   (1<<16)
 
#define CA91CX42_VSI_CTL_VAS_A32   (1<<17)
 
#define CA91CX42_VSI_CTL_VAS_USER1   (3<<17)
 
#define CA91CX42_VSI_CTL_VAS_USER2   (7<<16)
 
#define CA91CX42_VSI_CTL_LD64EN   (1<<7)
 
#define CA91CX42_VSI_CTL_LLRMW   (1<<6)
 
#define CA91CX42_VSI_CTL_LAS_M   (3<<0)
 
#define CA91CX42_VSI_CTL_LAS_PCI_MS   0
 
#define CA91CX42_VSI_CTL_LAS_PCI_IO   (1<<0)
 
#define CA91CX42_VSI_CTL_LAS_PCI_CONF   (1<<1)
 
#define CA91CX42_LM_CTL_EN   (1<<31)
 
#define CA91CX42_LM_CTL_PGM   (1<<23)
 
#define CA91CX42_LM_CTL_DATA   (1<<22)
 
#define CA91CX42_LM_CTL_SUPR   (1<<21)
 
#define CA91CX42_LM_CTL_NPRIV   (1<<20)
 
#define CA91CX42_LM_CTL_AS_M   (5<<16)
 
#define CA91CX42_LM_CTL_AS_A16   0
 
#define CA91CX42_LM_CTL_AS_A24   (1<<16)
 
#define CA91CX42_LM_CTL_AS_A32   (1<<17)
 
#define CA91CX42_BM_VRAI_CTL_EN   0x80000000
 
#define CA91CX42_BM_VRAI_CTL_PGM   0x00C00000
 
#define CA91CX42_OF_VRAI_CTL_PGM   22
 
#define CA91CX42_BM_VRAI_CTL_SUPER   0x00300000
 
#define CA91CX42_OF_VRAI_CTL_SUPER   20
 
#define CA91CX42_BM_VRAI_CTL_VAS   0x00030000
 
#define CA91CX42_OF_VRAI_CTL_VAS   16
 
#define CA91CX42_VCSR_CTL_EN   (1<<31)
 
#define CA91CX42_VCSR_CTL_LAS_M   (3<<0)
 
#define CA91CX42_VCSR_CTL_LAS_PCI_MS   0
 
#define CA91CX42_VCSR_CTL_LAS_PCI_IO   (1<<0)
 
#define CA91CX42_VCSR_CTL_LAS_PCI_CONF   (1<<1)
 
#define CA91CX42_VCSR_BS_SLOT_M   (0x1F<<27)
 

Macro Definition Documentation

#define CA91C142_MAX_DMA   1 /* Max DMA Controllers */

Definition at line 37 of file vme_ca91cx42.h.

#define CA91C142_MAX_MAILBOX   4 /* Max Mail Box registers */

Definition at line 38 of file vme_ca91cx42.h.

#define CA91C142_MAX_MASTER   8 /* Max Master Windows */

Definition at line 35 of file vme_ca91cx42.h.

#define CA91C142_MAX_SLAVE   8 /* Max Slave Windows */

Definition at line 36 of file vme_ca91cx42.h.

#define CA91CX42_BM_LMISC_CRT   0xF0000000

Definition at line 334 of file vme_ca91cx42.h.

#define CA91CX42_BM_LMISC_CWT   0x0F000000

Definition at line 336 of file vme_ca91cx42.h.

#define CA91CX42_BM_MAST_CTL_BUS_NO   0x0000000F

Definition at line 476 of file vme_ca91cx42.h.

#define CA91CX42_BM_MAST_CTL_MAXRTRY   0xF0000000

Definition at line 465 of file vme_ca91cx42.h.

#define CA91CX42_BM_MAST_CTL_PABS   0x00001000

Definition at line 475 of file vme_ca91cx42.h.

#define CA91CX42_BM_MAST_CTL_PWON   0x0F000000

Definition at line 467 of file vme_ca91cx42.h.

#define CA91CX42_BM_MAST_CTL_VOWN   0x00080000

Definition at line 473 of file vme_ca91cx42.h.

#define CA91CX42_BM_MAST_CTL_VOWN_ACK   0x00040000

Definition at line 474 of file vme_ca91cx42.h.

#define CA91CX42_BM_MAST_CTL_VREL   0x00100000

Definition at line 472 of file vme_ca91cx42.h.

#define CA91CX42_BM_MAST_CTL_VRL   0x00C00000

Definition at line 469 of file vme_ca91cx42.h.

#define CA91CX42_BM_MAST_CTL_VRM   0x00200000

Definition at line 471 of file vme_ca91cx42.h.

#define CA91CX42_BM_MISC_STAT_DY4AUTO   0x08000000

Definition at line 504 of file vme_ca91cx42.h.

#define CA91CX42_BM_MISC_STAT_DY4AUTOID   0x0000FF00

Definition at line 509 of file vme_ca91cx42.h.

#define CA91CX42_BM_MISC_STAT_DY4DONE   0x00080000

Definition at line 506 of file vme_ca91cx42.h.

#define CA91CX42_BM_MISC_STAT_ENDIAN   0x80000000

Definition at line 502 of file vme_ca91cx42.h.

#define CA91CX42_BM_MISC_STAT_LCLSIZE   0x40000000

Definition at line 503 of file vme_ca91cx42.h.

#define CA91CX42_BM_MISC_STAT_MYBBSY   0x00200000

Definition at line 505 of file vme_ca91cx42.h.

#define CA91CX42_BM_MISC_STAT_RXFE   0x00020000

Definition at line 508 of file vme_ca91cx42.h.

#define CA91CX42_BM_MISC_STAT_TXFE   0x00040000

Definition at line 507 of file vme_ca91cx42.h.

#define CA91CX42_BM_PCI_CLASS_BASE   0xFF000000

Definition at line 260 of file vme_ca91cx42.h.

#define CA91CX42_BM_PCI_CLASS_PROG   0x0000FF00

Definition at line 264 of file vme_ca91cx42.h.

#define CA91CX42_BM_PCI_CLASS_RID   0x000000FF

Definition at line 266 of file vme_ca91cx42.h.

#define CA91CX42_BM_PCI_CLASS_SUB   0x00FF0000

Definition at line 262 of file vme_ca91cx42.h.

#define CA91CX42_BM_PCI_MISC0_BISTC   0x80000000

Definition at line 276 of file vme_ca91cx42.h.

#define CA91CX42_BM_PCI_MISC0_CCODE   0x0F000000

Definition at line 278 of file vme_ca91cx42.h.

#define CA91CX42_BM_PCI_MISC0_LAYOUT   0x007F0000

Definition at line 280 of file vme_ca91cx42.h.

#define CA91CX42_BM_PCI_MISC0_LTIMER   0x0000FF00

Definition at line 281 of file vme_ca91cx42.h.

#define CA91CX42_BM_PCI_MISC0_MFUNCT   0x00800000

Definition at line 279 of file vme_ca91cx42.h.

#define CA91CX42_BM_PCI_MISC0_SBIST   0x60000000

Definition at line 277 of file vme_ca91cx42.h.

#define CA91CX42_BM_SLSI_BS   0x000000F6

Definition at line 351 of file vme_ca91cx42.h.

#define CA91CX42_BM_SLSI_EN   0x80000000

Definition at line 343 of file vme_ca91cx42.h.

#define CA91CX42_BM_SLSI_LAS   0x00000003

Definition at line 353 of file vme_ca91cx42.h.

#define CA91CX42_BM_SLSI_PGM   0x0000F000

Definition at line 347 of file vme_ca91cx42.h.

#define CA91CX42_BM_SLSI_PWEN   0x40000000

Definition at line 344 of file vme_ca91cx42.h.

#define CA91CX42_BM_SLSI_RESERVED   0x3F0F0000

Definition at line 355 of file vme_ca91cx42.h.

#define CA91CX42_BM_SLSI_SUPER   0x00000F00

Definition at line 349 of file vme_ca91cx42.h.

#define CA91CX42_BM_SLSI_VDW   0x00F00000

Definition at line 345 of file vme_ca91cx42.h.

#define CA91CX42_BM_VRAI_CTL_EN   0x80000000

Definition at line 560 of file vme_ca91cx42.h.

#define CA91CX42_BM_VRAI_CTL_PGM   0x00C00000

Definition at line 561 of file vme_ca91cx42.h.

#define CA91CX42_BM_VRAI_CTL_SUPER   0x00300000

Definition at line 563 of file vme_ca91cx42.h.

#define CA91CX42_BM_VRAI_CTL_VAS   0x00030000

Definition at line 565 of file vme_ca91cx42.h.

#define CA91CX42_DCPP_M   0xf

Definition at line 392 of file vme_ca91cx42.h.

#define CA91CX42_DCPP_NULL   (1<<0)

Definition at line 393 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_L2V   (1<<31)

Definition at line 361 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_LD64EN   (1<<7)

Definition at line 386 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_PGM_DATA   0

Definition at line 377 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_PGM_M   (1<<14)

Definition at line 376 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_PGM_PGM   (1<<14)

Definition at line 378 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_SUPER_M   (1<<12)

Definition at line 380 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_SUPER_NPRIV   0

Definition at line 381 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_SUPER_SUPR   (1<<12)

Definition at line 382 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VAS_A16   0

Definition at line 370 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VAS_A24   (1<<16)

Definition at line 371 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VAS_A32   (1<<17)

Definition at line 372 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VAS_M   (7<<16)

Definition at line 369 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VAS_USER1   (3<<17)

Definition at line 373 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VAS_USER2   (7<<16)

Definition at line 374 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VCT_BLT   (1<<8)

Definition at line 385 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VCT_M   (1<<8)

Definition at line 384 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VDW_D16   (1<<22)

Definition at line 365 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VDW_D32   (1<<23)

Definition at line 366 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VDW_D64   (3<<22)

Definition at line 367 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VDW_D8   0

Definition at line 364 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VDW_M   (3<<22)

Definition at line 363 of file vme_ca91cx42.h.

#define CA91CX42_DCTL_VDW_M   (3<<22)

Definition at line 363 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_ACT   (1<<15)

Definition at line 408 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_CHAIN   (1<<27)

Definition at line 402 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_DONE   (1<<11)

Definition at line 411 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_GO   (1<<31)

Definition at line 399 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_HALT   (1<<13)

Definition at line 410 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_HALT_REQ   (1<<29)

Definition at line 401 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_INT_DONE   (1<<3)

Definition at line 417 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_INT_HALT   (1<<5)

Definition at line 416 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_INT_LERR   (1<<2)

Definition at line 418 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_INT_PERR   (1<<0)

Definition at line 420 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_INT_STOP   (1<<6)

Definition at line 415 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_INT_VERR   (1<<1)

Definition at line 419 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_LERR   (1<<10)

Definition at line 412 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_PERR   (1<<8)

Definition at line 414 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_STOP   (1<<14)

Definition at line 409 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_STOP_REQ   (1<<30)

Definition at line 400 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_VERR   (1<<9)

Definition at line 413 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_VOFF_M   (0xf<<16)

Definition at line 406 of file vme_ca91cx42.h.

#define CA91CX42_DGCS_VON_M   (7<<20)

Definition at line 404 of file vme_ca91cx42.h.

#define CA91CX42_LINT_ACFAIL   0x00008000

Definition at line 434 of file vme_ca91cx42.h.

#define CA91CX42_LINT_DMA   0x00000100

Definition at line 441 of file vme_ca91cx42.h.

#define CA91CX42_LINT_LERR   0x00000200

Definition at line 440 of file vme_ca91cx42.h.

#define CA91CX42_LINT_LM0   0x00100000

Definition at line 429 of file vme_ca91cx42.h.

#define CA91CX42_LINT_LM1   0x00200000

Definition at line 428 of file vme_ca91cx42.h.

#define CA91CX42_LINT_LM2   0x00400000

Definition at line 427 of file vme_ca91cx42.h.

#define CA91CX42_LINT_LM3   0x00800000

Definition at line 426 of file vme_ca91cx42.h.

#define CA91CX42_LINT_MBOX   0x000F0000

Definition at line 456 of file vme_ca91cx42.h.

#define CA91CX42_LINT_MBOX0   0x00010000

Definition at line 433 of file vme_ca91cx42.h.

#define CA91CX42_LINT_MBOX1   0x00020000

Definition at line 432 of file vme_ca91cx42.h.

#define CA91CX42_LINT_MBOX2   0x00040000

Definition at line 431 of file vme_ca91cx42.h.

#define CA91CX42_LINT_MBOX3   0x00080000

Definition at line 430 of file vme_ca91cx42.h.

#define CA91CX42_LINT_SW_IACK   0x00001000

Definition at line 437 of file vme_ca91cx42.h.

#define CA91CX42_LINT_SW_INT   0x00002000

Definition at line 436 of file vme_ca91cx42.h.

#define CA91CX42_LINT_SYSFAIL   0x00004000

Definition at line 435 of file vme_ca91cx42.h.

#define CA91CX42_LINT_VERR   0x00000400

Definition at line 439 of file vme_ca91cx42.h.

#define CA91CX42_LINT_VIRQ1   0x00000002

Definition at line 448 of file vme_ca91cx42.h.

#define CA91CX42_LINT_VIRQ2   0x00000004

Definition at line 447 of file vme_ca91cx42.h.

#define CA91CX42_LINT_VIRQ3   0x00000008

Definition at line 446 of file vme_ca91cx42.h.

#define CA91CX42_LINT_VIRQ4   0x00000010

Definition at line 445 of file vme_ca91cx42.h.

#define CA91CX42_LINT_VIRQ5   0x00000020

Definition at line 444 of file vme_ca91cx42.h.

#define CA91CX42_LINT_VIRQ6   0x00000040

Definition at line 443 of file vme_ca91cx42.h.

#define CA91CX42_LINT_VIRQ7   0x00000080

Definition at line 442 of file vme_ca91cx42.h.

#define CA91CX42_LINT_VOWN   0x00000001

Definition at line 449 of file vme_ca91cx42.h.

#define CA91CX42_LM_CTL_AS_A16   0

Definition at line 552 of file vme_ca91cx42.h.

#define CA91CX42_LM_CTL_AS_A24   (1<<16)

Definition at line 553 of file vme_ca91cx42.h.

#define CA91CX42_LM_CTL_AS_A32   (1<<17)

Definition at line 554 of file vme_ca91cx42.h.

#define CA91CX42_LM_CTL_AS_M   (5<<16)

Definition at line 551 of file vme_ca91cx42.h.

#define CA91CX42_LM_CTL_DATA   (1<<22)

Definition at line 548 of file vme_ca91cx42.h.

#define CA91CX42_LM_CTL_EN   (1<<31)

Definition at line 546 of file vme_ca91cx42.h.

#define CA91CX42_LM_CTL_NPRIV   (1<<20)

Definition at line 550 of file vme_ca91cx42.h.

#define CA91CX42_LM_CTL_PGM   (1<<23)

Definition at line 547 of file vme_ca91cx42.h.

#define CA91CX42_LM_CTL_SUPR   (1<<21)

Definition at line 549 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_EN   (1<<31)

Definition at line 289 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_LAS   (1<<0)

Definition at line 317 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_PGM_DATA   0

Definition at line 307 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_PGM_M   (1<<14)

Definition at line 306 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_PGM_PGM   (1<<14)

Definition at line 308 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_PWEN   (1<<30)

Definition at line 290 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_SUPER_M   (1<<12)

Definition at line 310 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_SUPER_NPRIV   0

Definition at line 311 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_SUPER_SUPR   (1<<12)

Definition at line 312 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VAS_A16   0

Definition at line 299 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VAS_A24   (1<<16)

Definition at line 300 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VAS_A32   (1<<17)

Definition at line 301 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VAS_CRCSR   (5<<16)

Definition at line 302 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VAS_M   (7<<16)

Definition at line 298 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VAS_USER1   (3<<17)

Definition at line 303 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VAS_USER2   (7<<16)

Definition at line 304 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VCT_BLT   (1<<8)

Definition at line 315 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VCT_M   (1<<8)

Definition at line 314 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VCT_MBLT   (1<<8)

Definition at line 316 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VDW_D16   (1<<22)

Definition at line 294 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VDW_D32   (1<<23)

Definition at line 295 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VDW_D64   (3<<22)

Definition at line 296 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VDW_D8   0

Definition at line 293 of file vme_ca91cx42.h.

#define CA91CX42_LSI_CTL_VDW_M   (3<<22)

Definition at line 292 of file vme_ca91cx42.h.

#define CA91CX42_MISC_CTL_BI   0x00100000

Definition at line 488 of file vme_ca91cx42.h.

#define CA91CX42_MISC_CTL_ENGBI   0x00080000

Definition at line 489 of file vme_ca91cx42.h.

#define CA91CX42_MISC_CTL_RESCIND   0x00040000

Definition at line 490 of file vme_ca91cx42.h.

#define CA91CX42_MISC_CTL_RESERVED   0x0820FFFF

Definition at line 493 of file vme_ca91cx42.h.

#define CA91CX42_MISC_CTL_SW_LRST   0x00800000

Definition at line 486 of file vme_ca91cx42.h.

#define CA91CX42_MISC_CTL_SW_SRST   0x00400000

Definition at line 487 of file vme_ca91cx42.h.

#define CA91CX42_MISC_CTL_SYSCON   0x00020000

Definition at line 491 of file vme_ca91cx42.h.

#define CA91CX42_MISC_CTL_V64AUTO   0x00010000

Definition at line 492 of file vme_ca91cx42.h.

#define CA91CX42_MISC_CTL_VARB   0x04000000

Definition at line 484 of file vme_ca91cx42.h.

#define CA91CX42_MISC_CTL_VARBTO   0x03000000

Definition at line 485 of file vme_ca91cx42.h.

#define CA91CX42_MISC_CTL_VBTO   0xF0000000

Definition at line 483 of file vme_ca91cx42.h.

#define CA91CX42_OF_LMISC_CRT   28

Definition at line 335 of file vme_ca91cx42.h.

#define CA91CX42_OF_LMISC_CWT   24

Definition at line 337 of file vme_ca91cx42.h.

#define CA91CX42_OF_MAST_CTL_BUS_NO   0

Definition at line 477 of file vme_ca91cx42.h.

#define CA91CX42_OF_MAST_CTL_MAXRTRY   28

Definition at line 466 of file vme_ca91cx42.h.

#define CA91CX42_OF_MAST_CTL_PWON   24

Definition at line 468 of file vme_ca91cx42.h.

#define CA91CX42_OF_MAST_CTL_VRL   22

Definition at line 470 of file vme_ca91cx42.h.

#define CA91CX42_OF_MISC_CTL_VARBTO   24

Definition at line 495 of file vme_ca91cx42.h.

#define CA91CX42_OF_MISC_CTL_VBTO   28

Definition at line 496 of file vme_ca91cx42.h.

#define CA91CX42_OF_MISC_STAT_DY4AUTOID   8

Definition at line 510 of file vme_ca91cx42.h.

#define CA91CX42_OF_PCI_CLASS_BASE   24

Definition at line 261 of file vme_ca91cx42.h.

#define CA91CX42_OF_PCI_CLASS_PROG   8

Definition at line 265 of file vme_ca91cx42.h.

#define CA91CX42_OF_PCI_CLASS_RID   0

Definition at line 267 of file vme_ca91cx42.h.

#define CA91CX42_OF_PCI_CLASS_RID_UNIVERSE_I   0

Definition at line 269 of file vme_ca91cx42.h.

#define CA91CX42_OF_PCI_CLASS_RID_UNIVERSE_II   1

Definition at line 270 of file vme_ca91cx42.h.

#define CA91CX42_OF_PCI_CLASS_SUB   16

Definition at line 263 of file vme_ca91cx42.h.

#define CA91CX42_OF_PCI_MISC0_LTIMER   8

Definition at line 282 of file vme_ca91cx42.h.

#define CA91CX42_OF_SLSI_BS   2

Definition at line 352 of file vme_ca91cx42.h.

#define CA91CX42_OF_SLSI_LAS   0

Definition at line 354 of file vme_ca91cx42.h.

#define CA91CX42_OF_SLSI_PGM   12

Definition at line 348 of file vme_ca91cx42.h.

#define CA91CX42_OF_SLSI_SUPER   8

Definition at line 350 of file vme_ca91cx42.h.

#define CA91CX42_OF_SLSI_VDW   20

Definition at line 346 of file vme_ca91cx42.h.

#define CA91CX42_OF_VRAI_CTL_PGM   22

Definition at line 562 of file vme_ca91cx42.h.

#define CA91CX42_OF_VRAI_CTL_SUPER   20

Definition at line 564 of file vme_ca91cx42.h.

#define CA91CX42_OF_VRAI_CTL_VAS   16

Definition at line 566 of file vme_ca91cx42.h.

#define CA91CX42_PCI_BS   0x010

Definition at line 79 of file vme_ca91cx42.h.

#define CA91CX42_PCI_CLASS   0x008

Definition at line 77 of file vme_ca91cx42.h.

#define CA91CX42_PCI_CSR   0x004

Definition at line 76 of file vme_ca91cx42.h.

#define CA91CX42_PCI_ID   0x000

Definition at line 75 of file vme_ca91cx42.h.

#define CA91CX42_PCI_MISC0   0x00C

Definition at line 78 of file vme_ca91cx42.h.

#define CA91CX42_PCI_MISC1   0x03C

Definition at line 80 of file vme_ca91cx42.h.

#define CA91CX42_SCYC_CTL_CYC_ADOH   (1<<1)

Definition at line 328 of file vme_ca91cx42.h.

#define CA91CX42_SCYC_CTL_CYC_M   (3<<0)

Definition at line 326 of file vme_ca91cx42.h.

#define CA91CX42_SCYC_CTL_CYC_RMW   (1<<0)

Definition at line 327 of file vme_ca91cx42.h.

#define CA91CX42_SCYC_CTL_LAS_PCIIO   (1<<2)

Definition at line 324 of file vme_ca91cx42.h.

#define CA91CX42_SCYC_CTL_LAS_PCIMEM   0

Definition at line 323 of file vme_ca91cx42.h.

#define CA91CX42_VCSR_BS_SLOT_M   (0x1F<<27)

Definition at line 581 of file vme_ca91cx42.h.

#define CA91CX42_VCSR_CTL_EN   (1<<31)

Definition at line 571 of file vme_ca91cx42.h.

#define CA91CX42_VCSR_CTL_LAS_M   (3<<0)

Definition at line 573 of file vme_ca91cx42.h.

#define CA91CX42_VCSR_CTL_LAS_PCI_CONF   (1<<1)

Definition at line 576 of file vme_ca91cx42.h.

#define CA91CX42_VCSR_CTL_LAS_PCI_IO   (1<<0)

Definition at line 575 of file vme_ca91cx42.h.

#define CA91CX42_VCSR_CTL_LAS_PCI_MS   0

Definition at line 574 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_EN   (1<<31)

Definition at line 516 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_LAS_M   (3<<0)

Definition at line 538 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_LAS_PCI_CONF   (1<<1)

Definition at line 541 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_LAS_PCI_IO   (1<<0)

Definition at line 540 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_LAS_PCI_MS   0

Definition at line 539 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_LD64EN   (1<<7)

Definition at line 535 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_LLRMW   (1<<6)

Definition at line 536 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_PGM_DATA   (1<<22)

Definition at line 521 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_PGM_M   (3<<22)

Definition at line 520 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_PGM_PGM   (1<<23)

Definition at line 522 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_PREN   (1<<29)

Definition at line 518 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_PWEN   (1<<30)

Definition at line 517 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_SUPER_M   (3<<20)

Definition at line 524 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_SUPER_NPRIV   (1<<20)

Definition at line 525 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_SUPER_SUPR   (1<<21)

Definition at line 526 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_VAS_A16   0

Definition at line 529 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_VAS_A24   (1<<16)

Definition at line 530 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_VAS_A32   (1<<17)

Definition at line 531 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_VAS_M   (7<<16)

Definition at line 528 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_VAS_USER1   (3<<17)

Definition at line 532 of file vme_ca91cx42.h.

#define CA91CX42_VSI_CTL_VAS_USER2   (7<<16)

Definition at line 533 of file vme_ca91cx42.h.

#define D_LLUE   0x0224

Definition at line 150 of file vme_ca91cx42.h.

#define DCPP   0x0218

Definition at line 148 of file vme_ca91cx42.h.

#define DCTL   0x0200

Definition at line 144 of file vme_ca91cx42.h.

#define DGCS   0x0220

Definition at line 149 of file vme_ca91cx42.h.

#define DLA   0x0208

Definition at line 146 of file vme_ca91cx42.h.

#define DTBC   0x0204

Definition at line 145 of file vme_ca91cx42.h.

#define DVA   0x0210

Definition at line 147 of file vme_ca91cx42.h.

#define L_CMDERR   0x018C

Definition at line 141 of file vme_ca91cx42.h.

#define LAERR   0x0190

Definition at line 142 of file vme_ca91cx42.h.

#define LINT_EN   0x0300

Definition at line 152 of file vme_ca91cx42.h.

#define LINT_MAP0   0x0308

Definition at line 154 of file vme_ca91cx42.h.

#define LINT_MAP1   0x030C

Definition at line 155 of file vme_ca91cx42.h.

#define LINT_MAP2   0x0340

Definition at line 174 of file vme_ca91cx42.h.

#define LINT_STAT   0x0304

Definition at line 153 of file vme_ca91cx42.h.

#define LM_BS   0x0F68

Definition at line 210 of file vme_ca91cx42.h.

#define LM_CTL   0x0F64

Definition at line 209 of file vme_ca91cx42.h.

#define LMISC   0x0184

Definition at line 139 of file vme_ca91cx42.h.

#define LSI0_BD   0x0108

Definition at line 84 of file vme_ca91cx42.h.

#define LSI0_BS   0x0104

Definition at line 83 of file vme_ca91cx42.h.

#define LSI0_CTL   0x0100

Definition at line 82 of file vme_ca91cx42.h.

#define LSI0_TO   0x010C

Definition at line 85 of file vme_ca91cx42.h.

#define LSI1_BD   0x011C

Definition at line 89 of file vme_ca91cx42.h.

#define LSI1_BS   0x0118

Definition at line 88 of file vme_ca91cx42.h.

#define LSI1_CTL   0x0114

Definition at line 87 of file vme_ca91cx42.h.

#define LSI1_TO   0x0120

Definition at line 90 of file vme_ca91cx42.h.

#define LSI2_BD   0x0130

Definition at line 94 of file vme_ca91cx42.h.

#define LSI2_BS   0x012C

Definition at line 93 of file vme_ca91cx42.h.

#define LSI2_CTL   0x0128

Definition at line 92 of file vme_ca91cx42.h.

#define LSI2_TO   0x0134

Definition at line 95 of file vme_ca91cx42.h.

#define LSI3_BD   0x0144

Definition at line 99 of file vme_ca91cx42.h.

#define LSI3_BS   0x0140

Definition at line 98 of file vme_ca91cx42.h.

#define LSI3_CTL   0x013C

Definition at line 97 of file vme_ca91cx42.h.

#define LSI3_TO   0x0148

Definition at line 100 of file vme_ca91cx42.h.

#define LSI4_BD   0x01A8

Definition at line 104 of file vme_ca91cx42.h.

#define LSI4_BS   0x01A4

Definition at line 103 of file vme_ca91cx42.h.

#define LSI4_CTL   0x01A0

Definition at line 102 of file vme_ca91cx42.h.

#define LSI4_TO   0x01AC

Definition at line 105 of file vme_ca91cx42.h.

#define LSI5_BD   0x01BC

Definition at line 109 of file vme_ca91cx42.h.

#define LSI5_BS   0x01B8

Definition at line 108 of file vme_ca91cx42.h.

#define LSI5_CTL   0x01B4

Definition at line 107 of file vme_ca91cx42.h.

#define LSI5_TO   0x01C0

Definition at line 110 of file vme_ca91cx42.h.

#define LSI6_BD   0x01D0

Definition at line 114 of file vme_ca91cx42.h.

#define LSI6_BS   0x01CC

Definition at line 113 of file vme_ca91cx42.h.

#define LSI6_CTL   0x01C8

Definition at line 112 of file vme_ca91cx42.h.

#define LSI6_TO   0x01D4

Definition at line 115 of file vme_ca91cx42.h.

#define LSI7_BD   0x01E4

Definition at line 119 of file vme_ca91cx42.h.

#define LSI7_BS   0x01E0

Definition at line 118 of file vme_ca91cx42.h.

#define LSI7_CTL   0x01DC

Definition at line 117 of file vme_ca91cx42.h.

#define LSI7_TO   0x01E8

Definition at line 120 of file vme_ca91cx42.h.

#define MAST_CTL   0x0400

Definition at line 184 of file vme_ca91cx42.h.

#define MBOX0   0x0348

Definition at line 177 of file vme_ca91cx42.h.

#define MBOX1   0x034C

Definition at line 178 of file vme_ca91cx42.h.

#define MBOX2   0x0350

Definition at line 179 of file vme_ca91cx42.h.

#define MBOX3   0x0354

Definition at line 180 of file vme_ca91cx42.h.

#define MISC_CTL   0x0404

Definition at line 185 of file vme_ca91cx42.h.

#define MISC_STAT   0x0408

Definition at line 186 of file vme_ca91cx42.h.

#define PCI_DEVICE_ID_TUNDRA_CA91C142   0x0000

Definition at line 29 of file vme_ca91cx42.h.

#define PCI_VENDOR_ID_TUNDRA   0x10e3

Definition at line 25 of file vme_ca91cx42.h.

#define SCYC_ADDR   0x0174

Definition at line 135 of file vme_ca91cx42.h.

#define SCYC_CMP   0x017C

Definition at line 137 of file vme_ca91cx42.h.

#define SCYC_CTL   0x0170

Definition at line 134 of file vme_ca91cx42.h.

#define SCYC_EN   0x0178

Definition at line 136 of file vme_ca91cx42.h.

#define SCYC_SWP   0x0180

Definition at line 138 of file vme_ca91cx42.h.

#define SEMA0   0x0358

Definition at line 181 of file vme_ca91cx42.h.

#define SEMA1   0x035C

Definition at line 182 of file vme_ca91cx42.h.

#define SLSI   0x0188

Definition at line 140 of file vme_ca91cx42.h.

#define STATID   0x0320

Definition at line 160 of file vme_ca91cx42.h.

#define USER_AM   0x040C

Definition at line 187 of file vme_ca91cx42.h.

#define V1_STATID   0x0324

Definition at line 162 of file vme_ca91cx42.h.

#define V2_STATID   0x0328

Definition at line 163 of file vme_ca91cx42.h.

#define V3_STATID   0x032C

Definition at line 164 of file vme_ca91cx42.h.

#define V4_STATID   0x0330

Definition at line 165 of file vme_ca91cx42.h.

#define V5_STATID   0x0334

Definition at line 166 of file vme_ca91cx42.h.

#define V6_STATID   0x0338

Definition at line 167 of file vme_ca91cx42.h.

#define V7_STATID   0x033C

Definition at line 168 of file vme_ca91cx42.h.

#define V_AMERR   0x0F88

Definition at line 217 of file vme_ca91cx42.h.

#define VAERR   0x0F8C

Definition at line 218 of file vme_ca91cx42.h.

#define VCSR_BS   0x0FFC

Definition at line 254 of file vme_ca91cx42.h.

#define VCSR_CLR   0x0FF4

Definition at line 252 of file vme_ca91cx42.h.

#define VCSR_CTL   0x0F80

Definition at line 215 of file vme_ca91cx42.h.

#define VCSR_SET   0x0FF8

Definition at line 253 of file vme_ca91cx42.h.

#define VCSR_TO   0x0F84

Definition at line 216 of file vme_ca91cx42.h.

#define VINT_EN   0x0310

Definition at line 156 of file vme_ca91cx42.h.

#define VINT_MAP0   0x0318

Definition at line 158 of file vme_ca91cx42.h.

#define VINT_MAP1   0x031C

Definition at line 159 of file vme_ca91cx42.h.

#define VINT_MAP2   0x0344

Definition at line 175 of file vme_ca91cx42.h.

#define VINT_STAT   0x0314

Definition at line 157 of file vme_ca91cx42.h.

#define VRAI_BS   0x0F74

Definition at line 214 of file vme_ca91cx42.h.

#define VRAI_CTL   0x0F70

Definition at line 212 of file vme_ca91cx42.h.

#define VSI0_BD   0x0F08

Definition at line 191 of file vme_ca91cx42.h.

#define VSI0_BS   0x0F04

Definition at line 190 of file vme_ca91cx42.h.

#define VSI0_CTL   0x0F00

Definition at line 189 of file vme_ca91cx42.h.

#define VSI0_TO   0x0F0C

Definition at line 192 of file vme_ca91cx42.h.

#define VSI1_BD   0x0F1C

Definition at line 196 of file vme_ca91cx42.h.

#define VSI1_BS   0x0F18

Definition at line 195 of file vme_ca91cx42.h.

#define VSI1_CTL   0x0F14

Definition at line 194 of file vme_ca91cx42.h.

#define VSI1_TO   0x0F20

Definition at line 197 of file vme_ca91cx42.h.

#define VSI2_BD   0x0F30

Definition at line 201 of file vme_ca91cx42.h.

#define VSI2_BS   0x0F2C

Definition at line 200 of file vme_ca91cx42.h.

#define VSI2_CTL   0x0F28

Definition at line 199 of file vme_ca91cx42.h.

#define VSI2_TO   0x0F34

Definition at line 202 of file vme_ca91cx42.h.

#define VSI3_BD   0x0F44

Definition at line 206 of file vme_ca91cx42.h.

#define VSI3_BS   0x0F40

Definition at line 205 of file vme_ca91cx42.h.

#define VSI3_CTL   0x0F3C

Definition at line 204 of file vme_ca91cx42.h.

#define VSI3_TO   0x0F48

Definition at line 207 of file vme_ca91cx42.h.

#define VSI4_BD   0x0F98

Definition at line 222 of file vme_ca91cx42.h.

#define VSI4_BS   0x0F94

Definition at line 221 of file vme_ca91cx42.h.

#define VSI4_CTL   0x0F90

Definition at line 220 of file vme_ca91cx42.h.

#define VSI4_TO   0x0F9C

Definition at line 223 of file vme_ca91cx42.h.

#define VSI5_BD   0x0FAC

Definition at line 227 of file vme_ca91cx42.h.

#define VSI5_BS   0x0FA8

Definition at line 226 of file vme_ca91cx42.h.

#define VSI5_CTL   0x0FA4

Definition at line 225 of file vme_ca91cx42.h.

#define VSI5_TO   0x0FB0

Definition at line 228 of file vme_ca91cx42.h.

#define VSI6_BD   0x0FC0

Definition at line 232 of file vme_ca91cx42.h.

#define VSI6_BS   0x0FBC

Definition at line 231 of file vme_ca91cx42.h.

#define VSI6_CTL   0x0FB8

Definition at line 230 of file vme_ca91cx42.h.

#define VSI6_TO   0x0FC4

Definition at line 233 of file vme_ca91cx42.h.

#define VSI7_BD   0x0FD4

Definition at line 237 of file vme_ca91cx42.h.

#define VSI7_BS   0x0FD0

Definition at line 236 of file vme_ca91cx42.h.

#define VSI7_CTL   0x0FCC

Definition at line 235 of file vme_ca91cx42.h.

#define VSI7_TO   0x0FD8

Definition at line 238 of file vme_ca91cx42.h.