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Data Structures | Macros | Functions
w5100.c File Reference
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/kconfig.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/platform_device.h>
#include <linux/platform_data/wiznet.h>
#include <linux/ethtool.h>
#include <linux/skbuff.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/gpio.h>

Go to the source code of this file.

Data Structures

struct  w5100_priv
 

Macros

#define DRV_NAME   "w5100"
 
#define DRV_VERSION   "2012-04-04"
 
#define W5100_COMMON_REGS   0x0000
 
#define W5100_MR   0x0000 /* Mode Register */
 
#define MR_RST   0x80 /* S/W reset */
 
#define MR_PB   0x10 /* Ping block */
 
#define MR_AI   0x02 /* Address Auto-Increment */
 
#define MR_IND   0x01 /* Indirect mode */
 
#define W5100_SHAR   0x0009 /* Source MAC address */
 
#define W5100_IR   0x0015 /* Interrupt Register */
 
#define W5100_IMR   0x0016 /* Interrupt Mask Register */
 
#define IR_S0   0x01 /* S0 interrupt */
 
#define W5100_RTR   0x0017 /* Retry Time-value Register */
 
#define RTR_DEFAULT   2000 /* =0x07d0 (2000) */
 
#define W5100_RMSR   0x001a /* Receive Memory Size */
 
#define W5100_TMSR   0x001b /* Transmit Memory Size */
 
#define W5100_COMMON_REGS_LEN   0x0040
 
#define W5100_S0_REGS   0x0400
 
#define W5100_S0_MR   0x0400 /* S0 Mode Register */
 
#define S0_MR_MACRAW   0x04 /* MAC RAW mode (promiscous) */
 
#define S0_MR_MACRAW_MF   0x44 /* MAC RAW mode (filtered) */
 
#define W5100_S0_CR   0x0401 /* S0 Command Register */
 
#define S0_CR_OPEN   0x01 /* OPEN command */
 
#define S0_CR_CLOSE   0x10 /* CLOSE command */
 
#define S0_CR_SEND   0x20 /* SEND command */
 
#define S0_CR_RECV   0x40 /* RECV command */
 
#define W5100_S0_IR   0x0402 /* S0 Interrupt Register */
 
#define S0_IR_SENDOK   0x10 /* complete sending */
 
#define S0_IR_RECV   0x04 /* receiving data */
 
#define W5100_S0_SR   0x0403 /* S0 Status Register */
 
#define S0_SR_MACRAW   0x42 /* mac raw mode */
 
#define W5100_S0_TX_FSR   0x0420 /* S0 Transmit free memory size */
 
#define W5100_S0_TX_RD   0x0422 /* S0 Transmit memory read pointer */
 
#define W5100_S0_TX_WR   0x0424 /* S0 Transmit memory write pointer */
 
#define W5100_S0_RX_RSR   0x0426 /* S0 Receive free memory size */
 
#define W5100_S0_RX_RD   0x0428 /* S0 Receive memory read pointer */
 
#define W5100_S0_REGS_LEN   0x0040
 
#define W5100_TX_MEM_START   0x4000
 
#define W5100_TX_MEM_END   0x5fff
 
#define W5100_TX_MEM_MASK   0x1fff
 
#define W5100_RX_MEM_START   0x6000
 
#define W5100_RX_MEM_END   0x7fff
 
#define W5100_RX_MEM_MASK   0x1fff
 
#define W5100_IDM_AR   0x01 /* Indirect Mode Address Register */
 
#define W5100_IDM_DR   0x03 /* Indirect Mode Data Register */
 
#define w5100_read   priv->read
 
#define w5100_write   priv->write
 
#define w5100_read16   priv->read16
 
#define w5100_write16   priv->write16
 
#define w5100_readbuf   priv->readbuf
 
#define w5100_writebuf   priv->writebuf
 

Functions

 MODULE_DESCRIPTION ("WIZnet W5100 Ethernet driver v"DRV_VERSION)
 
 MODULE_AUTHOR ("Mike Sinkovsky <[email protected]>")
 
 MODULE_ALIAS ("platform:"DRV_NAME)
 
 MODULE_LICENSE ("GPL")
 
 module_platform_driver (w5100_driver)
 

Macro Definition Documentation

#define DRV_NAME   "w5100"

Definition at line 30 of file w5100.c.

#define DRV_VERSION   "2012-04-04"

Definition at line 31 of file w5100.c.

#define IR_S0   0x01 /* S0 interrupt */

Definition at line 50 of file w5100.c.

#define MR_AI   0x02 /* Address Auto-Increment */

Definition at line 45 of file w5100.c.

#define MR_IND   0x01 /* Indirect mode */

Definition at line 46 of file w5100.c.

#define MR_PB   0x10 /* Ping block */

Definition at line 44 of file w5100.c.

#define MR_RST   0x80 /* S/W reset */

Definition at line 43 of file w5100.c.

#define RTR_DEFAULT   2000 /* =0x07d0 (2000) */

Definition at line 52 of file w5100.c.

#define S0_CR_CLOSE   0x10 /* CLOSE command */

Definition at line 63 of file w5100.c.

#define S0_CR_OPEN   0x01 /* OPEN command */

Definition at line 62 of file w5100.c.

#define S0_CR_RECV   0x40 /* RECV command */

Definition at line 65 of file w5100.c.

#define S0_CR_SEND   0x20 /* SEND command */

Definition at line 64 of file w5100.c.

#define S0_IR_RECV   0x04 /* receiving data */

Definition at line 68 of file w5100.c.

#define S0_IR_SENDOK   0x10 /* complete sending */

Definition at line 67 of file w5100.c.

#define S0_MR_MACRAW   0x04 /* MAC RAW mode (promiscous) */

Definition at line 59 of file w5100.c.

#define S0_MR_MACRAW_MF   0x44 /* MAC RAW mode (filtered) */

Definition at line 60 of file w5100.c.

#define S0_SR_MACRAW   0x42 /* mac raw mode */

Definition at line 70 of file w5100.c.

#define W5100_COMMON_REGS   0x0000

Definition at line 41 of file w5100.c.

#define W5100_COMMON_REGS_LEN   0x0040

Definition at line 55 of file w5100.c.

#define W5100_IDM_AR   0x01 /* Indirect Mode Address Register */

Definition at line 179 of file w5100.c.

#define W5100_IDM_DR   0x03 /* Indirect Mode Data Register */

Definition at line 180 of file w5100.c.

#define W5100_IMR   0x0016 /* Interrupt Mask Register */

Definition at line 49 of file w5100.c.

#define W5100_IR   0x0015 /* Interrupt Register */

Definition at line 48 of file w5100.c.

#define W5100_MR   0x0000 /* Mode Register */

Definition at line 42 of file w5100.c.

#define w5100_read   priv->read

Definition at line 299 of file w5100.c.

#define w5100_read16   priv->read16

Definition at line 301 of file w5100.c.

#define w5100_readbuf   priv->readbuf

Definition at line 303 of file w5100.c.

#define W5100_RMSR   0x001a /* Receive Memory Size */

Definition at line 53 of file w5100.c.

#define W5100_RTR   0x0017 /* Retry Time-value Register */

Definition at line 51 of file w5100.c.

#define W5100_RX_MEM_END   0x7fff

Definition at line 82 of file w5100.c.

#define W5100_RX_MEM_MASK   0x1fff

Definition at line 83 of file w5100.c.

#define W5100_RX_MEM_START   0x6000

Definition at line 81 of file w5100.c.

#define W5100_S0_CR   0x0401 /* S0 Command Register */

Definition at line 61 of file w5100.c.

#define W5100_S0_IR   0x0402 /* S0 Interrupt Register */

Definition at line 66 of file w5100.c.

#define W5100_S0_MR   0x0400 /* S0 Mode Register */

Definition at line 58 of file w5100.c.

#define W5100_S0_REGS   0x0400

Definition at line 57 of file w5100.c.

#define W5100_S0_REGS_LEN   0x0040

Definition at line 76 of file w5100.c.

#define W5100_S0_RX_RD   0x0428 /* S0 Receive memory read pointer */

Definition at line 75 of file w5100.c.

#define W5100_S0_RX_RSR   0x0426 /* S0 Receive free memory size */

Definition at line 74 of file w5100.c.

#define W5100_S0_SR   0x0403 /* S0 Status Register */

Definition at line 69 of file w5100.c.

#define W5100_S0_TX_FSR   0x0420 /* S0 Transmit free memory size */

Definition at line 71 of file w5100.c.

#define W5100_S0_TX_RD   0x0422 /* S0 Transmit memory read pointer */

Definition at line 72 of file w5100.c.

#define W5100_S0_TX_WR   0x0424 /* S0 Transmit memory write pointer */

Definition at line 73 of file w5100.c.

#define W5100_SHAR   0x0009 /* Source MAC address */

Definition at line 47 of file w5100.c.

#define W5100_TMSR   0x001b /* Transmit Memory Size */

Definition at line 54 of file w5100.c.

#define W5100_TX_MEM_END   0x5fff

Definition at line 79 of file w5100.c.

#define W5100_TX_MEM_MASK   0x1fff

Definition at line 80 of file w5100.c.

#define W5100_TX_MEM_START   0x4000

Definition at line 78 of file w5100.c.

#define w5100_write   priv->write

Definition at line 300 of file w5100.c.

#define w5100_write16   priv->write16

Definition at line 302 of file w5100.c.

#define w5100_writebuf   priv->writebuf

Definition at line 304 of file w5100.c.

Function Documentation

MODULE_ALIAS ( "platform:"  DRV_NAME)
MODULE_AUTHOR ( "Mike Sinkovsky <[email protected]>"  )
MODULE_DESCRIPTION ( "WIZnet W5100 Ethernet driver v DRV_VERSION)
MODULE_LICENSE ( "GPL"  )
module_platform_driver ( w5100_driver  )