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fw.h
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1 /*
2  * Marvell Wireless LAN device driver: Firmware specific macros & structures
3  *
4  * Copyright (C) 2011, Marvell International Ltd.
5  *
6  * This software file (the "File") is distributed by Marvell International
7  * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8  * (the "License"). You may use, redistribute and/or modify this File in
9  * accordance with the terms and conditions of the License, a copy of which
10  * is available by writing to the Free Software Foundation, Inc.,
11  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13  *
14  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16  * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17  * this warranty disclaimer.
18  */
19 
20 #ifndef _MWIFIEX_FW_H_
21 #define _MWIFIEX_FW_H_
22 
23 #include <linux/if_ether.h>
24 
25 
26 #define INTF_HEADER_LEN 4
27 
28 struct rfc_1042_hdr {
34 };
35 
36 struct rx_packet_hdr {
39 };
40 
41 struct tx_packet_hdr {
44 };
45 
46 #define B_SUPPORTED_RATES 5
47 #define G_SUPPORTED_RATES 9
48 #define BG_SUPPORTED_RATES 13
49 #define A_SUPPORTED_RATES 9
50 #define HOSTCMD_SUPPORTED_RATES 14
51 #define N_SUPPORTED_RATES 3
52 #define ALL_802_11_BANDS (BAND_A | BAND_B | BAND_G | BAND_GN)
53 
54 #define FW_MULTI_BANDS_SUPPORT (BIT(8) | BIT(9) | BIT(10) | BIT(11))
55 #define IS_SUPPORT_MULTI_BANDS(adapter) \
56  (adapter->fw_cap_info & FW_MULTI_BANDS_SUPPORT)
57 #define GET_FW_DEFAULT_BANDS(adapter) \
58  ((adapter->fw_cap_info >> 8) & ALL_802_11_BANDS)
59 
60 #define HostCmd_WEP_KEY_INDEX_MASK 0x3fff
61 
62 #define KEY_INFO_ENABLED 0x01
69 };
70 #define KEY_MCAST BIT(0)
71 #define KEY_UNICAST BIT(1)
72 #define KEY_ENABLED BIT(2)
73 #define KEY_IGTK BIT(10)
74 
75 #define WAPI_KEY_LEN 50
76 
77 #define MAX_POLL_TRIES 100
78 
79 #define MAX_MULTI_INTERFACE_POLL_TRIES 1000
80 
81 #define MAX_FIRMWARE_POLL_TRIES 100
82 
83 #define FIRMWARE_READY_SDIO 0xfedc
84 #define FIRMWARE_READY_PCIE 0xfedcba00
85 
89 };
90 
94 };
95 
96 #define CAL_SNR(RSSI, NF) ((s16)((s16)(RSSI)-(s16)(NF)))
97 #define CAL_RSSI(SNR, NF) ((s16)((s16)(SNR)+(s16)(NF)))
98 
99 #define UAP_BSS_PARAMS_I 0
100 #define UAP_CUSTOM_IE_I 1
101 #define MWIFIEX_AUTO_IDX_MASK 0xffff
102 #define MWIFIEX_DELETE_MASK 0x0000
103 #define MGMT_MASK_ASSOC_REQ 0x01
104 #define MGMT_MASK_REASSOC_REQ 0x04
105 #define MGMT_MASK_ASSOC_RESP 0x02
106 #define MGMT_MASK_REASSOC_RESP 0x08
107 #define MGMT_MASK_PROBE_REQ 0x10
108 #define MGMT_MASK_PROBE_RESP 0x20
109 #define MGMT_MASK_BEACON 0x100
110 
111 #define TLV_TYPE_UAP_SSID 0x0000
112 #define TLV_TYPE_UAP_RATES 0x0001
113 
114 #define PROPRIETARY_TLV_BASE_ID 0x0100
115 #define TLV_TYPE_KEY_MATERIAL (PROPRIETARY_TLV_BASE_ID + 0)
116 #define TLV_TYPE_CHANLIST (PROPRIETARY_TLV_BASE_ID + 1)
117 #define TLV_TYPE_NUMPROBES (PROPRIETARY_TLV_BASE_ID + 2)
118 #define TLV_TYPE_RSSI_LOW (PROPRIETARY_TLV_BASE_ID + 4)
119 #define TLV_TYPE_PASSTHROUGH (PROPRIETARY_TLV_BASE_ID + 10)
120 #define TLV_TYPE_WMMQSTATUS (PROPRIETARY_TLV_BASE_ID + 16)
121 #define TLV_TYPE_WILDCARDSSID (PROPRIETARY_TLV_BASE_ID + 18)
122 #define TLV_TYPE_TSFTIMESTAMP (PROPRIETARY_TLV_BASE_ID + 19)
123 #define TLV_TYPE_RSSI_HIGH (PROPRIETARY_TLV_BASE_ID + 22)
124 #define TLV_TYPE_AUTH_TYPE (PROPRIETARY_TLV_BASE_ID + 31)
125 #define TLV_TYPE_STA_MAC_ADDR (PROPRIETARY_TLV_BASE_ID + 32)
126 #define TLV_TYPE_CHANNELBANDLIST (PROPRIETARY_TLV_BASE_ID + 42)
127 #define TLV_TYPE_UAP_BEACON_PERIOD (PROPRIETARY_TLV_BASE_ID + 44)
128 #define TLV_TYPE_UAP_DTIM_PERIOD (PROPRIETARY_TLV_BASE_ID + 45)
129 #define TLV_TYPE_UAP_BCAST_SSID (PROPRIETARY_TLV_BASE_ID + 48)
130 #define TLV_TYPE_UAP_RTS_THRESHOLD (PROPRIETARY_TLV_BASE_ID + 51)
131 #define TLV_TYPE_UAP_AO_TIMER (PROPRIETARY_TLV_BASE_ID + 57)
132 #define TLV_TYPE_UAP_WEP_KEY (PROPRIETARY_TLV_BASE_ID + 59)
133 #define TLV_TYPE_UAP_WPA_PASSPHRASE (PROPRIETARY_TLV_BASE_ID + 60)
134 #define TLV_TYPE_UAP_ENCRY_PROTOCOL (PROPRIETARY_TLV_BASE_ID + 64)
135 #define TLV_TYPE_UAP_AKMP (PROPRIETARY_TLV_BASE_ID + 65)
136 #define TLV_TYPE_UAP_FRAG_THRESHOLD (PROPRIETARY_TLV_BASE_ID + 70)
137 #define TLV_TYPE_RATE_DROP_CONTROL (PROPRIETARY_TLV_BASE_ID + 82)
138 #define TLV_TYPE_RATE_SCOPE (PROPRIETARY_TLV_BASE_ID + 83)
139 #define TLV_TYPE_POWER_GROUP (PROPRIETARY_TLV_BASE_ID + 84)
140 #define TLV_TYPE_UAP_RETRY_LIMIT (PROPRIETARY_TLV_BASE_ID + 93)
141 #define TLV_TYPE_WAPI_IE (PROPRIETARY_TLV_BASE_ID + 94)
142 #define TLV_TYPE_UAP_MGMT_FRAME (PROPRIETARY_TLV_BASE_ID + 104)
143 #define TLV_TYPE_MGMT_IE (PROPRIETARY_TLV_BASE_ID + 105)
144 #define TLV_TYPE_AUTO_DS_PARAM (PROPRIETARY_TLV_BASE_ID + 113)
145 #define TLV_TYPE_PS_PARAM (PROPRIETARY_TLV_BASE_ID + 114)
146 #define TLV_TYPE_UAP_PS_AO_TIMER (PROPRIETARY_TLV_BASE_ID + 123)
147 #define TLV_TYPE_PWK_CIPHER (PROPRIETARY_TLV_BASE_ID + 145)
148 #define TLV_TYPE_GWK_CIPHER (PROPRIETARY_TLV_BASE_ID + 146)
149 
150 #define MWIFIEX_TX_DATA_BUF_SIZE_2K 2048
151 
152 #define SSN_MASK 0xfff0
153 
154 #define BA_RESULT_SUCCESS 0x0
155 #define BA_RESULT_TIMEOUT 0x2
156 
157 #define IS_BASTREAM_SETUP(ptr) (ptr->ba_status)
158 
159 #define BA_STREAM_NOT_ALLOWED 0xff
160 
161 #define IS_11N_ENABLED(priv) ((priv->adapter->config_bands & BAND_GN || \
162  priv->adapter->config_bands & BAND_AN) && \
163  priv->curr_bss_params.bss_descriptor.bcn_ht_cap)
164 #define INITIATOR_BIT(DelBAParamSet) (((DelBAParamSet) &\
165  BIT(DELBA_INITIATOR_POS)) >> DELBA_INITIATOR_POS)
166 
167 #define MWIFIEX_TX_DATA_BUF_SIZE_4K 4096
168 #define MWIFIEX_TX_DATA_BUF_SIZE_8K 8192
169 
170 #define ISSUPP_11NENABLED(FwCapInfo) (FwCapInfo & BIT(11))
171 
172 #define MWIFIEX_DEF_HT_CAP (IEEE80211_HT_CAP_DSSSCCK40 | \
173  (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT) | \
174  IEEE80211_HT_CAP_SM_PS)
175 
176 #define MWIFIEX_DEF_AMPDU IEEE80211_HT_AMPDU_PARM_FACTOR
177 
178 /* dev_cap bitmap
179  * BIT
180  * 0-16 reserved
181  * 17 IEEE80211_HT_CAP_SUP_WIDTH_20_40
182  * 18-22 reserved
183  * 23 IEEE80211_HT_CAP_SGI_20
184  * 24 IEEE80211_HT_CAP_SGI_40
185  * 25 IEEE80211_HT_CAP_TX_STBC
186  * 26 IEEE80211_HT_CAP_RX_STBC
187  * 27-28 reserved
188  * 29 IEEE80211_HT_CAP_GRN_FLD
189  * 30-31 reserved
190  */
191 #define ISSUPP_CHANWIDTH40(Dot11nDevCap) (Dot11nDevCap & BIT(17))
192 #define ISSUPP_SHORTGI20(Dot11nDevCap) (Dot11nDevCap & BIT(23))
193 #define ISSUPP_SHORTGI40(Dot11nDevCap) (Dot11nDevCap & BIT(24))
194 #define ISSUPP_TXSTBC(Dot11nDevCap) (Dot11nDevCap & BIT(25))
195 #define ISSUPP_RXSTBC(Dot11nDevCap) (Dot11nDevCap & BIT(26))
196 #define ISSUPP_GREENFIELD(Dot11nDevCap) (Dot11nDevCap & BIT(29))
197 
198 /* httxcfg bitmap
199  * 0 reserved
200  * 1 20/40 Mhz enable(1)/disable(0)
201  * 2-3 reserved
202  * 4 green field enable(1)/disable(0)
203  * 5 short GI in 20 Mhz enable(1)/disable(0)
204  * 6 short GI in 40 Mhz enable(1)/disable(0)
205  * 7-15 reserved
206  */
207 #define MWIFIEX_FW_DEF_HTTXCFG (BIT(1) | BIT(4) | BIT(5) | BIT(6))
208 
209 #define GET_RXMCSSUPP(DevMCSSupported) (DevMCSSupported & 0x0f)
210 #define SETHT_MCS32(x) (x[4] |= 1)
211 #define HT_STREAM_2X2 0x22
212 
213 #define SET_SECONDARYCHAN(RadioType, SECCHAN) (RadioType |= (SECCHAN << 4))
214 
215 #define LLC_SNAP_LEN 8
216 
217 #define MOD_CLASS_HR_DSSS 0x03
218 #define MOD_CLASS_OFDM 0x07
219 #define MOD_CLASS_HT 0x08
220 #define HT_BW_20 0
221 #define HT_BW_40 1
222 
223 #define HostCmd_CMD_GET_HW_SPEC 0x0003
224 #define HostCmd_CMD_802_11_SCAN 0x0006
225 #define HostCmd_CMD_802_11_GET_LOG 0x000b
226 #define HostCmd_CMD_MAC_MULTICAST_ADR 0x0010
227 #define HostCmd_CMD_802_11_EEPROM_ACCESS 0x0059
228 #define HostCmd_CMD_802_11_ASSOCIATE 0x0012
229 #define HostCmd_CMD_802_11_SNMP_MIB 0x0016
230 #define HostCmd_CMD_MAC_REG_ACCESS 0x0019
231 #define HostCmd_CMD_BBP_REG_ACCESS 0x001a
232 #define HostCmd_CMD_RF_REG_ACCESS 0x001b
233 #define HostCmd_CMD_PMIC_REG_ACCESS 0x00ad
234 #define HostCmd_CMD_RF_TX_PWR 0x001e
235 #define HostCmd_CMD_RF_ANTENNA 0x0020
236 #define HostCmd_CMD_802_11_DEAUTHENTICATE 0x0024
237 #define HostCmd_CMD_MAC_CONTROL 0x0028
238 #define HostCmd_CMD_802_11_AD_HOC_START 0x002b
239 #define HostCmd_CMD_802_11_AD_HOC_JOIN 0x002c
240 #define HostCmd_CMD_802_11_AD_HOC_STOP 0x0040
241 #define HostCmd_CMD_802_11_MAC_ADDRESS 0x004D
242 #define HostCmd_CMD_802_11D_DOMAIN_INFO 0x005b
243 #define HostCmd_CMD_802_11_KEY_MATERIAL 0x005e
244 #define HostCmd_CMD_802_11_BG_SCAN_QUERY 0x006c
245 #define HostCmd_CMD_WMM_GET_STATUS 0x0071
246 #define HostCmd_CMD_802_11_SUBSCRIBE_EVENT 0x0075
247 #define HostCmd_CMD_802_11_TX_RATE_QUERY 0x007f
248 #define HostCmd_CMD_802_11_IBSS_COALESCING_STATUS 0x0083
249 #define HostCmd_CMD_VERSION_EXT 0x0097
250 #define HostCmd_CMD_RSSI_INFO 0x00a4
251 #define HostCmd_CMD_FUNC_INIT 0x00a9
252 #define HostCmd_CMD_FUNC_SHUTDOWN 0x00aa
253 #define HostCmd_CMD_UAP_SYS_CONFIG 0x00b0
254 #define HostCmd_CMD_UAP_BSS_START 0x00b1
255 #define HostCmd_CMD_UAP_BSS_STOP 0x00b2
256 #define HostCmd_CMD_11N_CFG 0x00cd
257 #define HostCmd_CMD_11N_ADDBA_REQ 0x00ce
258 #define HostCmd_CMD_11N_ADDBA_RSP 0x00cf
259 #define HostCmd_CMD_11N_DELBA 0x00d0
260 #define HostCmd_CMD_RECONFIGURE_TX_BUFF 0x00d9
261 #define HostCmd_CMD_AMSDU_AGGR_CTRL 0x00df
262 #define HostCmd_CMD_TXPWR_CFG 0x00d1
263 #define HostCmd_CMD_TX_RATE_CFG 0x00d6
264 #define HostCmd_CMD_802_11_PS_MODE_ENH 0x00e4
265 #define HostCmd_CMD_802_11_HS_CFG_ENH 0x00e5
266 #define HostCmd_CMD_P2P_MODE_CFG 0x00eb
267 #define HostCmd_CMD_CAU_REG_ACCESS 0x00ed
268 #define HostCmd_CMD_SET_BSS_MODE 0x00f7
269 #define HostCmd_CMD_PCIE_DESC_DETAILS 0x00fa
270 #define HostCmd_CMD_MGMT_FRAME_REG 0x010c
271 #define HostCmd_CMD_REMAIN_ON_CHAN 0x010d
272 
273 #define PROTOCOL_NO_SECURITY 0x01
274 #define PROTOCOL_STATIC_WEP 0x02
275 #define PROTOCOL_WPA 0x08
276 #define PROTOCOL_WPA2 0x20
277 #define PROTOCOL_WPA2_MIXED 0x28
278 #define PROTOCOL_EAP 0x40
279 #define KEY_MGMT_NONE 0x04
280 #define KEY_MGMT_PSK 0x02
281 #define KEY_MGMT_EAP 0x01
282 #define CIPHER_TKIP 0x04
283 #define CIPHER_AES_CCMP 0x08
284 #define VALID_CIPHER_BITMAP 0x0c
285 
287  EN_PS = 1,
288  DIS_PS = 2,
292  GET_PS = 0,
293  EN_AUTO_PS = 0xff,
294  DIS_AUTO_PS = 0xfe,
295 };
296 
297 enum P2P_MODES {
302 };
303 
304 #define HostCmd_RET_BIT 0x8000
305 #define HostCmd_ACT_GEN_GET 0x0000
306 #define HostCmd_ACT_GEN_SET 0x0001
307 #define HostCmd_ACT_GEN_REMOVE 0x0004
308 #define HostCmd_ACT_BITWISE_SET 0x0002
309 #define HostCmd_ACT_BITWISE_CLR 0x0003
310 #define HostCmd_RESULT_OK 0x0000
311 
312 #define HostCmd_ACT_MAC_RX_ON 0x0001
313 #define HostCmd_ACT_MAC_TX_ON 0x0002
314 #define HostCmd_ACT_MAC_WEP_ENABLE 0x0008
315 #define HostCmd_ACT_MAC_ETHERNETII_ENABLE 0x0010
316 #define HostCmd_ACT_MAC_PROMISCUOUS_ENABLE 0x0080
317 #define HostCmd_ACT_MAC_ALL_MULTICAST_ENABLE 0x0100
318 #define HostCmd_ACT_MAC_ADHOC_G_PROTECTION_ON 0x2000
319 
320 #define HostCmd_BSS_MODE_IBSS 0x0002
321 #define HostCmd_BSS_MODE_ANY 0x0003
322 
323 #define HostCmd_SCAN_RADIO_TYPE_BG 0
324 #define HostCmd_SCAN_RADIO_TYPE_A 1
325 
326 #define HOST_SLEEP_CFG_CANCEL 0xffffffff
327 #define HOST_SLEEP_CFG_COND_DEF 0x00000000
328 #define HOST_SLEEP_CFG_GPIO_DEF 0xff
329 #define HOST_SLEEP_CFG_GAP_DEF 0
330 
331 #define CMD_F_HOSTCMD (1 << 0)
332 #define CMD_F_CANCELED (1 << 1)
333 
334 #define HostCmd_CMD_ID_MASK 0x0fff
335 
336 #define HostCmd_SEQ_NUM_MASK 0x00ff
337 
338 #define HostCmd_BSS_NUM_MASK 0x0f00
339 
340 #define HostCmd_BSS_TYPE_MASK 0xf000
341 
342 #define HostCmd_ACT_SET_RX 0x0001
343 #define HostCmd_ACT_SET_TX 0x0002
344 #define HostCmd_ACT_SET_BOTH 0x0003
345 
346 #define RF_ANTENNA_AUTO 0xFFFF
347 
348 #define HostCmd_SET_SEQ_NO_BSS_INFO(seq, num, type) { \
349  (((seq) & 0x00ff) | \
350  (((num) & 0x000f) << 8)) | \
351  (((type) & 0x000f) << 12); }
352 
353 #define HostCmd_GET_SEQ_NO(seq) \
354  ((seq) & HostCmd_SEQ_NUM_MASK)
355 
356 #define HostCmd_GET_BSS_NO(seq) \
357  (((seq) & HostCmd_BSS_NUM_MASK) >> 8)
358 
359 #define HostCmd_GET_BSS_TYPE(seq) \
360  (((seq) & HostCmd_BSS_TYPE_MASK) >> 12)
361 
362 #define EVENT_DUMMY_HOST_WAKEUP_SIGNAL 0x00000001
363 #define EVENT_LINK_LOST 0x00000003
364 #define EVENT_LINK_SENSED 0x00000004
365 #define EVENT_MIB_CHANGED 0x00000006
366 #define EVENT_INIT_DONE 0x00000007
367 #define EVENT_DEAUTHENTICATED 0x00000008
368 #define EVENT_DISASSOCIATED 0x00000009
369 #define EVENT_PS_AWAKE 0x0000000a
370 #define EVENT_PS_SLEEP 0x0000000b
371 #define EVENT_MIC_ERR_MULTICAST 0x0000000d
372 #define EVENT_MIC_ERR_UNICAST 0x0000000e
373 #define EVENT_DEEP_SLEEP_AWAKE 0x00000010
374 #define EVENT_ADHOC_BCN_LOST 0x00000011
375 
376 #define EVENT_WMM_STATUS_CHANGE 0x00000017
377 #define EVENT_BG_SCAN_REPORT 0x00000018
378 #define EVENT_RSSI_LOW 0x00000019
379 #define EVENT_SNR_LOW 0x0000001a
380 #define EVENT_MAX_FAIL 0x0000001b
381 #define EVENT_RSSI_HIGH 0x0000001c
382 #define EVENT_SNR_HIGH 0x0000001d
383 #define EVENT_IBSS_COALESCED 0x0000001e
384 #define EVENT_DATA_RSSI_LOW 0x00000024
385 #define EVENT_DATA_SNR_LOW 0x00000025
386 #define EVENT_DATA_RSSI_HIGH 0x00000026
387 #define EVENT_DATA_SNR_HIGH 0x00000027
388 #define EVENT_LINK_QUALITY 0x00000028
389 #define EVENT_PORT_RELEASE 0x0000002b
390 #define EVENT_UAP_STA_DEAUTH 0x0000002c
391 #define EVENT_UAP_STA_ASSOC 0x0000002d
392 #define EVENT_UAP_BSS_START 0x0000002e
393 #define EVENT_PRE_BEACON_LOST 0x00000031
394 #define EVENT_ADDBA 0x00000033
395 #define EVENT_DELBA 0x00000034
396 #define EVENT_BA_STREAM_TIEMOUT 0x00000037
397 #define EVENT_AMSDU_AGGR_CTRL 0x00000042
398 #define EVENT_UAP_BSS_IDLE 0x00000043
399 #define EVENT_UAP_BSS_ACTIVE 0x00000044
400 #define EVENT_WEP_ICV_ERR 0x00000046
401 #define EVENT_HS_ACT_REQ 0x00000047
402 #define EVENT_BW_CHANGE 0x00000048
403 #define EVENT_UAP_MIC_COUNTERMEASURES 0x0000004c
404 #define EVENT_HOSTWAKE_STAIE 0x0000004d
405 #define EVENT_REMAIN_ON_CHAN_EXPIRED 0x0000005f
406 
407 #define EVENT_ID_MASK 0xffff
408 #define BSS_NUM_MASK 0xf
409 
410 #define EVENT_GET_BSS_NUM(event_cause) \
411  (((event_cause) >> 16) & BSS_NUM_MASK)
412 
413 #define EVENT_GET_BSS_TYPE(event_cause) \
414  (((event_cause) >> 24) & 0x00ff)
415 
419 } __packed;
420 
423  u8 data[1];
424 } __packed;
425 
426 #define MWIFIEX_TxPD_POWER_MGMT_NULL_PACKET 0x01
427 #define MWIFIEX_TxPD_POWER_MGMT_LAST_PACKET 0x08
428 
429 struct txpd {
430  u8 bss_type;
431  u8 bss_num;
436  u8 priority;
439  u8 reserved1;
440 } __packed;
441 
442 struct rxpd {
443  u8 bss_type;
444  u8 bss_num;
449  u8 priority;
450  u8 rx_rate;
453  /* Ht Info [Bit 0] RxRate format: LG=0, HT=1
454  * [Bit 1] HT Bandwidth: BW20 = 0, BW40 = 1
455  * [Bit 2] HT Guard Interval: LGI = 0, SGI = 1 */
457  u8 reserved;
458 } __packed;
459 
460 struct uap_txpd {
472 };
473 
474 struct uap_rxpd {
483 };
484 
488 };
489 
496 } __packed;
497 
501 } __packed;
502 
506 };
507 
511 } __packed;
512 
515  u8 rates[1];
516 } __packed;
517 
520  u8 ssid[1];
521 } __packed;
522 
526 } __packed;
527 
531  u8 ssid[1];
532 } __packed;
533 
534 #define TSF_DATA_SIZE 8
538 } __packed;
539 
545 } __packed;
546 
549 } __packed;
550 
553  union {
556  } cf_ibss;
557 } __packed;
558 
564 } __packed;
565 
568 } __packed;
569 
572  union {
575  } fh_ds;
576 } __packed;
577 
581 } __packed;
582 
586 };
587 
590  u8 rsn_ie[1];
591 } __packed;
592 
593 #define KEYPARAMSET_FIXED_LEN 6
594 
601  u8 key[50];
602 } __packed;
603 
604 #define IGTK_PN_LEN 8
605 
609 } __packed;
610 
614 } __packed;
615 
621 };
622 
623 #define S_DS_GEN sizeof(struct host_cmd_ds_gen)
624 
628 };
629 
638 };
639 
640 #define BITMAP_AUTO_DS 0x01
641 #define BITMAP_STA_PS 0x10
642 
646 } __packed;
647 
651 } __packed;
652 
655 
656  union {
659  } params;
660 } __packed;
661 
677  __le16 mp_end_port; /* SDIO only, reserved for other interfacces */
679 } __packed;
680 
686  long long reserved_1;
687 };
688 
701  long long tsf_bcn;
702 };
703 
707 };
708 
712 };
713 
718 } __packed;
719 
723 } __packed;
724 
731 } __packed;
732 
738 } __packed;
739 
742 } __packed;
743 
751 } __packed;
752 
757 } __packed;
758 
762 } __packed;
763 
771 } __packed;
772 
777 } __packed;
778 
782 } __packed;
783 
794 } __packed;
795 
797  u8 pad[3];
799 } __packed;
800 
813 
814  /*
815  * DO NOT ADD ANY FIELDS TO THIS STRUCTURE.
816  * It is used in the Adhoc join command and will cause a
817  * binary layout mismatch with the firmware
818  */
819 } __packed;
820 
825 } __packed;
826 
842 };
843 
846  /* Ht Info [Bit 0] RxRate format: LG=0, HT=1
847  * [Bit 1] HT Bandwidth: BW20 = 0, BW40 = 1
848  * [Bit 2] HT Guard Interval: LGI = 0, SGI = 1 */
850 } __packed;
851 
853  HS_CONFIGURE = 0x0001,
854  HS_ACTIVATE = 0x0002,
855 };
856 
861 } __packed;
862 
865 } __packed;
866 
869 
870  union {
873  } params;
874 } __packed;
875 
883  DOT11D_I = 9,
884 };
885 
886 #define MAX_SNMP_BUF_SIZE 128
887 
892  u8 value[1];
893 } __packed;
894 
901 } __packed;
902 
907 } __packed;
908 
912 } __packed;
913 
923 } __packed;
924 
928 } __packed;
929 
934 } __packed;
935 
941 } __packed;
942 
948 };
949 
953 };
954 
961 } __packed;
962 
963 #define MWIFIEX_USER_SCAN_CHAN_MAX 50
964 
965 #define MWIFIEX_MAX_SSID_LIST_LENGTH 10
966 
968  /*
969  * BSS mode to be sent in the firmware command
970  */
972 
973  /* Specific BSSID used to filter scan results in the firmware */
975 
976  /* Length of TLVs sent in command starting at tlvBuffer */
978 
979  /*
980  * SSID TLV(s) and ChanList TLVs to be sent in the firmware command
981  *
982  * TLV_TYPE_CHANLIST, mwifiex_ie_types_chan_list_param_set
983  * WLAN_EID_SSID, mwifiex_ie_types_ssid_param_set
984  */
985  u8 tlv_buf[1]; /* SSID TLV(s) and ChanList TLVs are stored
986  here */
987 } __packed;
988 
995 } __packed;
996 
998  /*
999  * BSS mode to be sent in the firmware command
1000  */
1002  /* Configure the number of probe requests for active chan scans */
1005  /* BSSID filter sent in the firmware command to limit the results */
1007  /* SSID filter list used in the firmware to limit the scan results */
1010  /* Variable number (fixed maximum) of channels to scan up */
1012 } __packed;
1013 
1014 struct ie_body {
1018 } __packed;
1019 
1024 } __packed;
1025 
1030 } __packed;
1031 
1034 } __packed;
1035 
1039 } __packed;
1040 
1045 } __packed;
1046 
1050 } __packed;
1051 
1055 } __packed;
1056 
1064 } __packed;
1065 
1074 } __packed;
1075 
1082 } __packed;
1083 
1088 } __packed;
1089 
1094 } __packed;
1095 
1099  __le16 mp_end_port; /* SDIO only, reserved for other interfacces */
1101 } __packed;
1102 
1107 } __packed;
1108 
1112 };
1113 
1122 };
1123 
1127  u8 oui[4]; /* 0~2: oui, 3: oui_type */
1130 } __packed;
1131 
1136 } __packed;
1137 
1139  /*
1140  * WMM Parameter IE - Vendor Specific Header:
1141  * element_id [221/0xdd]
1142  * Len [24]
1143  * Oui [00:50:f2]
1144  * OuiType [2]
1145  * OuiSubType [1]
1146  * Version [1]
1147  */
1152 } __packed;
1153 
1155 
1156  /*
1157  * WMM Info IE - Vendor Specific Header:
1158  * element_id [221/0xdd]
1159  * Len [7]
1160  * Oui [00:50:f2]
1161  * OuiType [2]
1162  * OuiSubType [0]
1163  * Version [1]
1164  */
1166 
1168 } __packed;
1169 
1174 } __packed;
1175 
1180 };
1181 
1185 } __packed;
1186 
1190 } __packed;
1191 
1195 } __packed;
1196 
1200 } __packed;
1201 
1206 } __packed;
1207 
1213 } __packed;
1214 
1220 } __packed;
1221 
1227 } __packed;
1228 
1231 
1235 } __packed;
1236 
1240 } __packed;
1241 
1249  u8 data[0];
1250 } __packed;
1251 
1254  u8 tlv[0];
1255 };
1256 
1261 } __packed;
1262 
1268 } __packed;
1269 
1274 } __packed;
1275 
1279 } __packed;
1280 
1285  u8 key[1];
1286 };
1287 
1291 } __packed;
1292 
1296 } __packed;
1297 
1300  u8 ssid[0];
1301 } __packed;
1302 
1305  u8 rates[0];
1306 } __packed;
1307 
1311 } __packed;
1312 
1316 } __packed;
1317 
1321 } __packed;
1322 
1326 } __packed;
1327 
1331 } __packed;
1332 
1336 } __packed;
1337 
1341 } __packed;
1342 
1347 } __packed;
1348 
1352 } __packed;
1353 
1356  char version_str[128];
1357 } __packed;
1358 
1362 } __packed;
1363 
1367 } __packed;
1368 
1376 } __packed;
1377 
1385 } __packed;
1386 
1387 #define CONNECTION_TYPE_INFRA 0
1388 #define CONNECTION_TYPE_ADHOC 1
1389 #define CONNECTION_TYPE_AP 2
1390 
1393 } __packed;
1394 
1396  /* TX buffer descriptor ring address */
1399  /* TX buffer descriptor ring count */
1401 
1402  /* RX buffer descriptor ring address */
1405  /* RX buffer descriptor ring count */
1407 
1408  /* Event buffer descriptor ring address */
1411  /* Event buffer descriptor ring count */
1413 
1414  /* Sleep cookie buffer physical address */
1417 } __packed;
1418 
1423 } __packed;
1424 
1428 } __packed;
1429 
1430 struct mwifiex_ie {
1435 } __packed;
1436 
1437 #define MAX_MGMT_IE_INDEX 16
1442 } __packed;
1443 
1449  union {
1500  } params;
1501 } __packed;
1502 
1510 } __packed;
1511 #endif /* !_MWIFIEX_FW_H_ */