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30 #ifndef __RTL92D__FW__H__
31 #define __RTL92D__FW__H__
33 #define FW_8192D_START_ADDRESS 0x1000
34 #define FW_8192D_PAGE_SIZE 4096
35 #define FW_8192D_POLLING_TIMEOUT_COUNT 1000
37 #define IS_FW_HEADER_EXIST(_pfwhdr) \
38 ((GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFF0) == 0x92C0 || \
39 (GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFF0) == 0x88C0 || \
40 (GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D0 || \
41 (GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D1 || \
42 (GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D2 || \
43 (GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D3)
50 #define SHIFT_AND_MASK_LE(__pdesc, __shift, __mask) \
51 ((le32_to_cpu(*(((__le32 *)(__pdesc)))) >> (__shift)) & \
52 BIT_LEN_MASK_32(__mask))
56 #define GET_FIRMWARE_HDR_SIGNATURE(__fwhdr) \
57 SHIFT_AND_MASK_LE(__fwhdr, 0, 16)
58 #define GET_FIRMWARE_HDR_CATEGORY(__fwhdr) \
59 SHIFT_AND_MASK_LE(__fwhdr, 16, 8)
60 #define GET_FIRMWARE_HDR_FUNCTION(__fwhdr) \
61 SHIFT_AND_MASK_LE(__fwhdr, 24, 8)
62 #define GET_FIRMWARE_HDR_VERSION(__fwhdr) \
63 SHIFT_AND_MASK_LE(__fwhdr + 4, 0, 16)
64 #define GET_FIRMWARE_HDR_SUB_VER(__fwhdr) \
65 SHIFT_AND_MASK_LE(__fwhdr + 4, 16, 8)
66 #define GET_FIRMWARE_HDR_RSVD1(__fwhdr) \
67 SHIFT_AND_MASK_LE(__fwhdr + 4, 24, 8)
70 #define GET_FIRMWARE_HDR_MONTH(__fwhdr) \
71 SHIFT_AND_MASK_LE(__fwhdr + 8, 0, 8)
72 #define GET_FIRMWARE_HDR_DATE(__fwhdr) \
73 SHIFT_AND_MASK_LE(__fwhdr + 8, 8, 8)
74 #define GET_FIRMWARE_HDR_HOUR(__fwhdr) \
75 SHIFT_AND_MASK_LE(__fwhdr + 8, 16, 8)
76 #define GET_FIRMWARE_HDR_MINUTE(__fwhdr) \
77 SHIFT_AND_MASK_LE(__fwhdr + 8, 24, 8)
78 #define GET_FIRMWARE_HDR_ROMCODE_SIZE(__fwhdr) \
79 SHIFT_AND_MASK_LE(__fwhdr + 12, 0, 16)
80 #define GET_FIRMWARE_HDR_RSVD2(__fwhdr) \
81 SHIFT_AND_MASK_LE(__fwhdr + 12, 16, 16)
84 #define GET_FIRMWARE_HDR_SVN_IDX(__fwhdr) \
85 SHIFT_AND_MASK_LE(__fwhdr + 16, 0, 32)
86 #define GET_FIRMWARE_HDR_RSVD3(__fwhdr) \
87 SHIFT_AND_MASK_LE(__fwhdr + 20, 0, 32)
90 #define GET_FIRMWARE_HDR_RSVD4(__fwhdr) \
91 SHIFT_AND_MASK_LE(__fwhdr + 24, 0, 32)
92 #define GET_FIRMWARE_HDR_RSVD5(__fwhdr) \
93 SHIFT_AND_MASK_LE(__fwhdr + 28, 0, 32)
95 #define pagenum_128(_len) \
96 (u32)(((_len) >> 7) + ((_len) & 0x7F ? 1 : 0))
98 #define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val) \
99 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
100 #define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__ph2ccmd, __val) \
101 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 1, 0, 8, __val)
102 #define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__ph2ccmd, __val) \
103 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 2, 0, 8, __val)
104 #define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__ph2ccmd, __val) \
105 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
106 #define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val) \
107 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
108 #define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val) \
109 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 1, 0, 8, __val)
110 #define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val) \
111 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 2, 0, 8, __val)