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#define ZR060_AAR_HEND_HI 0x048 |
#define ZR060_AAR_HEND_LO 0x049 |
#define ZR060_AAR_HSTART_HI 0x046 |
#define ZR060_AAR_HSTART_LO 0x047 |
#define ZR060_AAR_VEND_HI 0x044 |
#define ZR060_AAR_VEND_LO 0x045 |
#define ZR060_AAR_VSTART_HI 0x042 |
#define ZR060_AAR_VSTART_LO 0x043 |
#define ZR060_ACT_HI 0x01a |
#define ZR060_ACT_LO 0x01d |
#define ZR060_ACT_MH 0x01b |
#define ZR060_ACT_ML 0x01c |
#define ZR060_ACV_HI 0x016 |
#define ZR060_ACV_LO 0x019 |
#define ZR060_ACV_MH 0x017 |
#define ZR060_ACV_ML 0x018 |
#define ZR060_ACV_TRUN_HI 0x01e |
#define ZR060_ACV_TRUN_LO 0x021 |
#define ZR060_ACV_TRUN_MH 0x01f |
#define ZR060_ACV_TRUN_ML 0x020 |
#define ZR060_AF_HI 0x013 |
#define ZR060_AF_LO 0x015 |
#define ZR060_APP_IDX 0x380 |
#define ZR060_BCR_U 0x034 |
#define ZR060_BCR_V 0x035 |
#define ZR060_BCR_Y 0x033 |
#define ZR060_CFSR_Busy (1 << 7) |
#define ZR060_CFSR_CBusy (1 << 2) |
#define ZR060_CFSR_CFIFO (3 << 0) |
#define ZR060_CIR_CFIS (1 << 2) |
#define ZR060_CIR_Code16 (1 << 7) |
#define ZR060_CIR_CodeMstr (1 << 0) |
#define ZR060_CIR_Endian (1 << 6) |
#define ZR060_CMR_ATP (1 << 6) |
#define ZR060_CMR_BRB (1 << 2) |
#define ZR060_CMR_Comp (1 << 7) |
#define ZR060_CMR_FSF (1 << 1) |
#define ZR060_CMR_Pass2 (1 << 5) |
#define ZR060_CMR_TLM (1 << 4) |
#define ZR060_COM_IDX 0x3c0 |
#define ZR060_DHT_IDX 0x1d4 |
#define ZR060_DQT_IDX 0x0cc |
#define ZR060_DRI_IDX 0x0c0 |
#define ZR060_IDR_DEV 0x022 |
#define ZR060_IDR_REV 0x023 |
#define ZR060_IMR_DataErr (1 << 0) |
#define ZR060_IMR_End (1 << 1) |
#define ZR060_IMR_EOAV (1 << 3) |
#define ZR060_IMR_EOI (1 << 2) |
#define ZR060_ISR_DataErr (1 << 0) |
#define ZR060_ISR_End (1 << 1) |
#define ZR060_ISR_EOAV (1 << 3) |
#define ZR060_ISR_EOI (1 << 2) |
#define ZR060_ISR_ProCnt (3 << 6) |
#define ZR060_LOAD_Load (1 << 7) |
#define ZR060_LOAD_SyncRst (1 << 0) |
#define ZR060_MBCVR 0x005 |
#define ZR060_MER_App (1 << 7) |
#define ZR060_MER_Com (1 << 6) |
#define ZR060_MER_DHT (1 << 3) |
#define ZR060_MER_DQT (1 << 4) |
#define ZR060_MER_DRI (1 << 5) |
#define ZR060_SF_HI 0x011 |
#define ZR060_SF_LO 0x012 |
#define ZR060_SGR_BHEND_HI 0x040 |
#define ZR060_SGR_BHEND_LO 0x041 |
#define ZR060_SGR_BHSTART 0x03d |
#define ZR060_SGR_BVEND_HI 0x03e |
#define ZR060_SGR_BVEND_LO 0x03f |
#define ZR060_SGR_BVSTART 0x03c |
#define ZR060_SGR_HSYNC 0x03b |
#define ZR060_SGR_HTOTAL_HI 0x038 |
#define ZR060_SGR_HTOTAL_LO 0x039 |
#define ZR060_SGR_VSYNC 0x03a |
#define ZR060_SGR_VTOTAL_HI 0x036 |
#define ZR060_SGR_VTOTAL_LO 0x037 |
#define ZR060_SOF_IDX 0x060 |
#define ZR060_SOS_IDX 0x07a |
#define ZR060_SR_HScale2 (1 << 0) |
#define ZR060_SR_HScale4 (2 << 0) |
#define ZR060_SR_VScale (1 << 2) |
#define ZR060_SWR_HEND_HI 0x050 |
#define ZR060_SWR_HEND_LO 0x051 |
#define ZR060_SWR_HSTART_HI 0x04e |
#define ZR060_SWR_HSTART_LO 0x04f |
#define ZR060_SWR_VEND_HI 0x04c |
#define ZR060_SWR_VEND_LO 0x04d |
#define ZR060_SWR_VSTART_HI 0x04a |
#define ZR060_SWR_VSTART_LO 0x04b |
#define ZR060_TCR_HI 0x024 |
#define ZR060_TCR_LO 0x025 |
#define ZR060_TCV_DATA_HI 0x00d |
#define ZR060_TCV_DATA_LO 0x010 |
#define ZR060_TCV_DATA_MH 0x00e |
#define ZR060_TCV_DATA_ML 0x00f |
#define ZR060_TCV_NET_HI 0x009 |
#define ZR060_TCV_NET_LO 0x00c |
#define ZR060_TCV_NET_MH 0x00a |
#define ZR060_TCV_NET_ML 0x00b |
#define ZR060_VCR_FIDet (1 << 3) |
#define ZR060_VCR_FIExt (1 << 1) |
#define ZR060_VCR_FIVedge (1 << 2) |
#define ZR060_VCR_Range (1 << 6) |
#define ZR060_VCR_SyncMstr (1 << 0) |
#define ZR060_VCR_Video8 (1 << 7) |
#define ZR060_VPR_BLPol (1 << 3) |
#define ZR060_VPR_FIPol (1 << 2) |
#define ZR060_VPR_HSPol (1 << 1) |
#define ZR060_VPR_PoePol (1 << 5) |
#define ZR060_VPR_PValPol (1 << 6) |
#define ZR060_VPR_SImgPol (1 << 4) |
#define ZR060_VPR_VCLKPol (1 << 7) |
#define ZR060_VPR_VSPol (1 << 0) |