LLVM API Documentation
00001 //===-- ARMInstrInfo.h - ARM Instruction Information ------------*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file contains the ARM implementation of the TargetInstrInfo class. 00011 // 00012 //===----------------------------------------------------------------------===// 00013 00014 #ifndef LLVM_LIB_TARGET_ARM_ARMINSTRINFO_H 00015 #define LLVM_LIB_TARGET_ARM_ARMINSTRINFO_H 00016 00017 #include "ARMBaseInstrInfo.h" 00018 #include "ARMRegisterInfo.h" 00019 00020 namespace llvm { 00021 class ARMSubtarget; 00022 00023 class ARMInstrInfo : public ARMBaseInstrInfo { 00024 ARMRegisterInfo RI; 00025 public: 00026 explicit ARMInstrInfo(const ARMSubtarget &STI); 00027 00028 /// getNoopForMachoTarget - Return the noop instruction to use for a noop. 00029 void getNoopForMachoTarget(MCInst &NopInst) const override; 00030 00031 // Return the non-pre/post incrementing version of 'Opc'. Return 0 00032 // if there is not such an opcode. 00033 unsigned getUnindexedOpcode(unsigned Opc) const override; 00034 00035 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 00036 /// such, whenever a client has an instance of instruction info, it should 00037 /// always be able to get register info as well (through this method). 00038 /// 00039 const ARMRegisterInfo &getRegisterInfo() const override { return RI; } 00040 00041 private: 00042 void expandLoadStackGuard(MachineBasicBlock::iterator MI, 00043 Reloc::Model RM) const override; 00044 }; 00045 00046 } 00047 00048 #endif