#include <ARMSubtarget.h>

Inheritance diagram for llvm::ARMSubtarget:

Collaboration diagram for llvm::ARMSubtarget:

Public Types
enum	{ ARM_ABI_UNKNOWN, ARM_ABI_APCS, ARM_ABI_AAPCS }
Public Member Functions
	ARMSubtarget (const std::string &TT, const std::string &CPU, const std::string &FS, TargetMachine &TM, bool IsLittle, const TargetOptions &Options)
unsigned	getMaxInlineSizeThreshold () const
void	ParseSubtargetFeatures (StringRef CPU, StringRef FS)
ARMSubtarget &	initializeSubtargetDependencies (StringRef CPU, StringRef FS)
const DataLayout *	getDataLayout () const override
const ARMSelectionDAGInfo *	getSelectionDAGInfo () const override
const ARMBaseInstrInfo *	getInstrInfo () const override
const ARMTargetLowering *	getTargetLowering () const override
const ARMFrameLowering *	getFrameLowering () const override
const ARMBaseRegisterInfo *	getRegisterInfo () const override
void	computeIssueWidth ()
bool	hasV4TOps () const
bool	hasV5TOps () const
bool	hasV5TEOps () const
bool	hasV6Ops () const
bool	hasV6MOps () const
bool	hasV6T2Ops () const
bool	hasV7Ops () const
bool	hasV8Ops () const
bool	isCortexA5 () const
bool	isCortexA7 () const
bool	isCortexA8 () const
bool	isCortexA9 () const
bool	isCortexA15 () const
bool	isSwift () const
bool	isCortexM3 () const
bool	isLikeA9 () const
bool	isCortexR5 () const
bool	isKrait () const
bool	hasARMOps () const
bool	hasVFP2 () const
bool	hasVFP3 () const
bool	hasVFP4 () const
bool	hasFPARMv8 () const
bool	hasNEON () const
bool	hasCrypto () const
bool	hasCRC () const
bool	hasVirtualization () const
bool	useNEONForSinglePrecisionFP () const
bool	hasDivide () const
bool	hasDivideInARMMode () const
bool	hasT2ExtractPack () const
bool	hasDataBarrier () const
bool	hasAnyDataBarrier () const
bool	useMulOps () const
bool	useFPVMLx () const
bool	hasVMLxForwarding () const
bool	isFPBrccSlow () const
bool	isFPOnlySP () const
bool	hasPerfMon () const
bool	hasTrustZone () const
bool	hasZeroCycleZeroing () const
bool	prefers32BitThumb () const
bool	avoidCPSRPartialUpdate () const
bool	avoidMOVsShifterOperand () const
bool	hasRAS () const
bool	hasMPExtension () const
bool	hasThumb2DSP () const
bool	useNaClTrap () const
bool	hasFP16 () const
bool	hasD16 () const
const Triple &	getTargetTriple () const
bool	isTargetDarwin () const
bool	isTargetIOS () const
bool	isTargetLinux () const
bool	isTargetNaCl () const
bool	isTargetNetBSD () const
bool	isTargetWindows () const
bool	isTargetCOFF () const
bool	isTargetELF () const
bool	isTargetMachO () const
bool	isTargetAEABI () const
bool	isTargetEHABICompatible () const
bool	isTargetHardFloat () const
bool	isTargetAndroid () const
bool	isAPCS_ABI () const
bool	isAAPCS_ABI () const
bool	isThumb () const
bool	isThumb1Only () const
bool	isThumb2 () const
bool	hasThumb2 () const
bool	isMClass () const
bool	isRClass () const
bool	isAClass () const
bool	isR9Reserved () const
bool	useMovt (const MachineFunction &MF) const
bool	supportsTailCall () const
bool	allowsUnalignedMem () const
bool	restrictIT () const
const std::string &	getCPUString () const
bool	isLittle () const
unsigned	getMispredictionPenalty () const
bool	hasSinCos () const
bool	enablePostMachineScheduler () const override
	True for some subtargets at > -O0.
bool	enableAtomicExpand () const override
const InstrItineraryData *	getInstrItineraryData () const override
unsigned	getStackAlignment () const
bool	GVIsIndirectSymbol (const GlobalValue *GV, Reloc::Model RelocM) const
Public Attributes
enum llvm::ARMSubtarget:: { ... }	TargetABI
Protected Types
enum	ARMProcFamilyEnum { Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA12, CortexA15, CortexR5, Swift, CortexA53, CortexA57, Krait }
enum	ARMProcClassEnum { None, AClass, RClass, MClass }
Protected Attributes
ARMProcFamilyEnum	ARMProcFamily
	ARMProcFamily - ARM processor family: Cortex-A8, Cortex-A9, and others.
ARMProcClassEnum	ARMProcClass
	ARMProcClass - ARM processor class: None, AClass, RClass or MClass.
bool	HasV4TOps
bool	HasV5TOps
bool	HasV5TEOps
bool	HasV6Ops
bool	HasV6MOps
bool	HasV6T2Ops
bool	HasV7Ops
bool	HasV8Ops
bool	HasVFPv2
bool	HasVFPv3
bool	HasVFPv4
bool	HasFPARMv8
bool	HasNEON
bool	UseNEONForSinglePrecisionFP
bool	UseMulOps
bool	SlowFPVMLx
bool	HasVMLxForwarding
bool	SlowFPBrcc
	SlowFPBrcc - True if floating point compare + branch is slow.
bool	InThumbMode
	InThumbMode - True if compiling for Thumb, false for ARM.
bool	HasThumb2
	HasThumb2 - True if Thumb2 instructions are supported.
bool	NoARM
	NoARM - True if subtarget does not support ARM mode execution.
bool	IsR9Reserved
	IsR9Reserved - True if R9 is a not available as general purpose register.
bool	UseMovt
bool	SupportsTailCall
bool	HasFP16
bool	HasD16
bool	HasHardwareDivide
	HasHardwareDivide - True if subtarget supports [su]div.
bool	HasHardwareDivideInARM
	HasHardwareDivideInARM - True if subtarget supports [su]div in ARM mode.
bool	HasT2ExtractPack
bool	HasDataBarrier
bool	Pref32BitThumb
bool	AvoidCPSRPartialUpdate
bool	AvoidMOVsShifterOperand
bool	HasRAS
bool	HasMPExtension
bool	HasVirtualization
bool	FPOnlySP
bool	HasPerfMon
bool	HasTrustZone
	HasTrustZone - if true, processor supports TrustZone security extensions.
bool	HasCrypto
	HasCrypto - if true, processor supports Cryptography extensions.
bool	HasCRC
	HasCRC - if true, processor supports CRC instructions.
bool	HasZeroCycleZeroing
bool	AllowsUnalignedMem
bool	RestrictIT
bool	Thumb2DSP
bool	UseNaClTrap
	NaCl TRAP instruction is generated instead of the regular TRAP.
bool	UnsafeFPMath
	Target machine allowed unsafe FP math (such as use of NEON fp)
unsigned	stackAlignment
std::string	CPUString
	CPUString - String name of used CPU.
bool	IsLittle
	IsLittle - The target is Little Endian.
Triple	TargetTriple
	TargetTriple - What processor and OS we're targeting.
MCSchedModel	SchedModel
	SchedModel - Processor specific instruction costs.
InstrItineraryData	InstrItins
	Selected instruction itineraries (one entry per itinerary class.)
const TargetOptions &	Options
	Options passed via command line that could influence the target.

Detailed Description

Definition at line 41 of file ARMSubtarget.h.

Member Enumeration Documentation

anonymous enum

Enumerator:

ARM_ABI_UNKNOWN
ARM_ABI_APCS
ARM_ABI_AAPCS

Definition at line 229 of file ARMSubtarget.h.

enum llvm::ARMSubtarget::ARMProcClassEnum [protected]

Enumerator:

None
AClass
RClass
MClass

Definition at line 47 of file ARMSubtarget.h.

enum llvm::ARMSubtarget::ARMProcFamilyEnum [protected]

Enumerator:

Others
CortexA5
CortexA7
CortexA8
CortexA9
CortexA12
CortexA15
CortexR5
Swift
CortexA53
CortexA57
Krait

Definition at line 43 of file ARMSubtarget.h.

Constructor & Destructor Documentation

ARMSubtarget::ARMSubtarget	(	const std::string &	TT,
		const std::string &	CPU,
		const std::string &	FS,
		TargetMachine &	TM,
		bool	IsLittle,
		const TargetOptions &	Options
	)

This constructor initializes the data members to match that of the specified triple.

Definition at line 155 of file ARMSubtarget.cpp.

Member Function Documentation

bool llvm::ARMSubtarget::allowsUnalignedMem ( ) const [inline]

Definition at line 415 of file ARMSubtarget.h.

References AllowsUnalignedMem.

Referenced by llvm::ARMTargetLowering::allowsMisalignedMemoryAccesses().

bool llvm::ARMSubtarget::avoidCPSRPartialUpdate ( ) const [inline]

Definition at line 335 of file ARMSubtarget.h.

References AvoidCPSRPartialUpdate.

bool llvm::ARMSubtarget::avoidMOVsShifterOperand ( ) const [inline]

Definition at line 336 of file ARMSubtarget.h.

References AvoidMOVsShifterOperand.

void llvm::ARMSubtarget::computeIssueWidth ( )

bool ARMSubtarget::enableAtomicExpand ( ) const [override]

Definition at line 414 of file ARMSubtarget.cpp.

References hasAnyDataBarrier(), and isThumb1Only().

bool ARMSubtarget::enablePostMachineScheduler ( ) const [override]

True for some subtargets at > -O0.

Definition at line 410 of file ARMSubtarget.cpp.

References hasThumb2(), and isThumb().

const std::string& llvm::ARMSubtarget::getCPUString ( ) const [inline]

Definition at line 419 of file ARMSubtarget.h.

References CPUString.

Referenced by llvm::ARMTargetMachine::ARMTargetMachine().

const DataLayout* llvm::ARMSubtarget::getDataLayout ( ) const [inline, override]

Definition at line 255 of file ARMSubtarget.h.

const ARMFrameLowering* llvm::ARMSubtarget::getFrameLowering ( ) const [inline, override]

Definition at line 265 of file ARMSubtarget.h.

const ARMBaseInstrInfo* llvm::ARMSubtarget::getInstrInfo ( ) const [inline, override]

Definition at line 259 of file ARMSubtarget.h.

const InstrItineraryData* llvm::ARMSubtarget::getInstrItineraryData ( ) const [inline, override]

getInstrItins - Return the instruction itineraries based on subtarget selection.

Definition at line 437 of file ARMSubtarget.h.

References InstrItins.

unsigned llvm::ARMSubtarget::getMaxInlineSizeThreshold ( ) const [inline]

getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size that still makes it profitable to inline the call.

Definition at line 244 of file ARMSubtarget.h.

Referenced by llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy().

unsigned ARMSubtarget::getMispredictionPenalty ( ) const

Definition at line 400 of file ARMSubtarget.cpp.

References llvm::MCSchedModel::MispredictPenalty, and SchedModel.

Referenced by llvm::ARMBaseInstrInfo::isProfitableToIfCvt().

const ARMBaseRegisterInfo* llvm::ARMSubtarget::getRegisterInfo ( ) const [inline, override]

Definition at line 268 of file ARMSubtarget.h.

const ARMSelectionDAGInfo* llvm::ARMSubtarget::getSelectionDAGInfo ( ) const [inline, override]

Definition at line 256 of file ARMSubtarget.h.

unsigned llvm::ARMSubtarget::getStackAlignment ( ) const [inline]

getStackAlignment - Returns the minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function for this subtarget.

Definition at line 444 of file ARMSubtarget.h.

References stackAlignment.

const ARMTargetLowering* llvm::ARMSubtarget::getTargetLowering ( ) const [inline, override]

Definition at line 262 of file ARMSubtarget.h.

const Triple& llvm::ARMSubtarget::getTargetTriple ( ) const [inline]

Definition at line 345 of file ARMSubtarget.h.

References TargetTriple.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), computeDataLayout(), hasSinCos(), llvm::ARMTargetLowering::LowerOperation(), and llvm::ARMTargetLowering::useLoadStackGuardNode().

bool ARMSubtarget::GVIsIndirectSymbol	(	const GlobalValue *	GV,
		Reloc::Model	RelocM
	)		const

GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol.

Definition at line 349 of file ARMSubtarget.cpp.

References llvm::GlobalValue::hasAvailableExternallyLinkage(), llvm::GlobalValue::hasCommonLinkage(), llvm::GlobalValue::hasHiddenVisibility(), llvm::GlobalValue::hasLocalLinkage(), llvm::GlobalValue::isDeclaration(), llvm::GlobalValue::isMaterializable(), isTargetMachO(), llvm::GlobalValue::isWeakForLinker(), llvm::Reloc::PIC_, and llvm::Reloc::Static.

Referenced by llvm::ARMBaseInstrInfo::expandLoadStackGuardBase().

bool llvm::ARMSubtarget::hasAnyDataBarrier ( ) const [inline]

Definition at line 323 of file ARMSubtarget.h.

References HasDataBarrier, hasV6Ops(), and isThumb().

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), and enableAtomicExpand().

bool llvm::ARMSubtarget::hasARMOps ( ) const [inline]

Definition at line 306 of file ARMSubtarget.h.

References NoARM.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), and llvm::ARMTargetMachine::ARMTargetMachine().

bool llvm::ARMSubtarget::hasCRC ( ) const [inline]

Definition at line 314 of file ARMSubtarget.h.

References HasCRC.

bool llvm::ARMSubtarget::hasCrypto ( ) const [inline]

Definition at line 313 of file ARMSubtarget.h.

References HasCrypto.

bool llvm::ARMSubtarget::hasD16 ( ) const [inline]

Definition at line 343 of file ARMSubtarget.h.

References HasD16.

Referenced by llvm::ARMBaseRegisterInfo::getReservedRegs().

bool llvm::ARMSubtarget::hasDataBarrier ( ) const [inline]

Definition at line 322 of file ARMSubtarget.h.

References HasDataBarrier.

Referenced by LowerATOMIC_FENCE().

bool llvm::ARMSubtarget::hasDivide ( ) const [inline]

Definition at line 319 of file ARMSubtarget.h.

References HasHardwareDivide.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

bool llvm::ARMSubtarget::hasDivideInARMMode ( ) const [inline]

Definition at line 320 of file ARMSubtarget.h.

References HasHardwareDivideInARM.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

bool llvm::ARMSubtarget::hasFP16 ( ) const [inline]

Definition at line 342 of file ARMSubtarget.h.

References HasFP16.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

bool llvm::ARMSubtarget::hasFPARMv8 ( ) const [inline]

Definition at line 311 of file ARMSubtarget.h.

References HasFPARMv8.

bool llvm::ARMSubtarget::hasMPExtension ( ) const [inline]

Definition at line 338 of file ARMSubtarget.h.

References HasMPExtension.

Referenced by LowerPREFETCH().

bool llvm::ARMSubtarget::hasNEON ( ) const [inline]

Definition at line 312 of file ARMSubtarget.h.

References HasNEON.

Referenced by AddCombineToVPADDL(), llvm::ARMTargetLowering::allowsMisalignedMemoryAccesses(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::ARMTargetLowering::getOptimalMemOpType(), llvm::ARMTargetLowering::getRegClassFor(), LowerCTPOP(), LowerShift(), PerformExtendCombine(), PerformORCombine(), PerformSELECT_CCCombine(), PerformShiftCombine(), PerformVCVTCombine(), PerformVDIVCombine(), and useNEONForSinglePrecisionFP().

bool llvm::ARMSubtarget::hasPerfMon ( ) const [inline]

Definition at line 331 of file ARMSubtarget.h.

References HasPerfMon.

Referenced by ReplaceREADCYCLECOUNTER().

bool llvm::ARMSubtarget::hasRAS ( ) const [inline]

Definition at line 337 of file ARMSubtarget.h.

References HasRAS.

bool ARMSubtarget::hasSinCos ( ) const

This function returns true if the target has sincos() routine in its compiler runtime or math libraries.

Definition at line 404 of file ARMSubtarget.cpp.

References llvm::Triple::getOS(), getTargetTriple(), llvm::Triple::IOS, and llvm::Triple::isOSVersionLT().

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

bool llvm::ARMSubtarget::hasT2ExtractPack ( ) const [inline]

Definition at line 321 of file ARMSubtarget.h.

References HasT2ExtractPack.

Referenced by PerformORCombine().

bool llvm::ARMSubtarget::hasThumb2 ( ) const [inline]

Definition at line 404 of file ARMSubtarget.h.

References HasThumb2.

Referenced by enablePostMachineScheduler().

bool llvm::ARMSubtarget::hasThumb2DSP ( ) const [inline]

Definition at line 339 of file ARMSubtarget.h.

References Thumb2DSP.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), and getArchForCPU().

bool llvm::ARMSubtarget::hasTrustZone ( ) const [inline]

Definition at line 332 of file ARMSubtarget.h.

References HasTrustZone.

bool llvm::ARMSubtarget::hasV4TOps ( ) const [inline]

Definition at line 286 of file ARMSubtarget.h.

References HasV4TOps.

Referenced by llvm::Thumb1FrameLowering::emitEpilogue(), getArchForCPU(), and llvm::Thumb1FrameLowering::restoreCalleeSavedRegisters().

bool llvm::ARMSubtarget::hasV5TEOps ( ) const [inline]

Definition at line 288 of file ARMSubtarget.h.

References HasV5TEOps.

Referenced by getArchForCPU(), llvm::ARMBaseInstrInfo::loadRegFromStackSlot(), LowerPREFETCH(), and llvm::ARMBaseInstrInfo::storeRegToStackSlot().

bool llvm::ARMSubtarget::hasV5TOps ( ) const [inline]

Definition at line 287 of file ARMSubtarget.h.

References HasV5TOps.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), llvm::Thumb1FrameLowering::emitEpilogue(), getArchForCPU(), and llvm::Thumb1FrameLowering::restoreCalleeSavedRegisters().

bool llvm::ARMSubtarget::hasV6MOps ( ) const [inline]

Definition at line 290 of file ARMSubtarget.h.

References HasV6MOps.

Referenced by getArchForCPU().

bool llvm::ARMSubtarget::hasV6Ops ( ) const [inline]

Definition at line 289 of file ARMSubtarget.h.

References HasV6Ops.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), llvm::Thumb1InstrInfo::copyPhysReg(), llvm::ARMTargetLowering::ExpandInlineAsm(), getArchForCPU(), hasAnyDataBarrier(), LowerATOMIC_FENCE(), and PerformShiftCombine().

bool llvm::ARMSubtarget::hasV6T2Ops ( ) const [inline]

Definition at line 291 of file ARMSubtarget.h.

References HasV6T2Ops.

Referenced by getArchForCPU(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), LowerCTTZ(), and PerformORCombine().

bool llvm::ARMSubtarget::hasV7Ops ( ) const [inline]

Definition at line 292 of file ARMSubtarget.h.

References HasV7Ops.

Referenced by llvm::ARMTargetLowering::allowsMisalignedMemoryAccesses(), getArchForCPU(), and LowerPREFETCH().

bool llvm::ARMSubtarget::hasV8Ops ( ) const [inline]

Definition at line 293 of file ARMSubtarget.h.

References HasV8Ops.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), and getArchForCPU().

bool llvm::ARMSubtarget::hasVFP2 ( ) const [inline]

Definition at line 308 of file ARMSubtarget.h.

References HasVFPv2.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), llvm::ARMBaseInstrInfo::CreateTargetPostRAHazardRecognizer(), isLegalAddressImmediate(), and isLegalT2AddressImmediate().

bool llvm::ARMSubtarget::hasVFP3 ( ) const [inline]

Definition at line 309 of file ARMSubtarget.h.

References HasVFPv3.

Referenced by llvm::ARMBaseRegisterInfo::getReservedRegs(), and llvm::ARMTargetLowering::isFPImmLegal().

bool llvm::ARMSubtarget::hasVFP4 ( ) const [inline]

Definition at line 310 of file ARMSubtarget.h.

References HasVFPv4.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

bool llvm::ARMSubtarget::hasVirtualization ( ) const [inline]

Definition at line 315 of file ARMSubtarget.h.

References HasVirtualization.

bool llvm::ARMSubtarget::hasVMLxForwarding ( ) const [inline]

Definition at line 328 of file ARMSubtarget.h.

References HasVMLxForwarding.

Referenced by PerformVMULCombine().

bool llvm::ARMSubtarget::hasZeroCycleZeroing ( ) const [inline]

Definition at line 333 of file ARMSubtarget.h.

References HasZeroCycleZeroing.

ARMSubtarget & ARMSubtarget::initializeSubtargetDependencies	(	StringRef	CPU,
		StringRef	FS
	)

initializeSubtargetDependencies - Initializes using a CPU and feature string so that we can use initializer lists for subtarget initialization.

Definition at line 148 of file ARMSubtarget.cpp.

bool llvm::ARMSubtarget::isAAPCS_ABI ( ) const [inline]

Definition at line 396 of file ARMSubtarget.h.

References ARM_ABI_AAPCS, ARM_ABI_UNKNOWN, and TargetABI.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), computeDataLayout(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::ARMBaseRegisterInfo::getCalleeSavedRegs(), llvm::ARMBaseRegisterInfo::getCallPreservedMask(), and llvm::ARMBaseRegisterInfo::getThisReturnPreservedMask().

bool llvm::ARMSubtarget::isAClass ( ) const [inline]

Definition at line 407 of file ARMSubtarget.h.

References AClass, and ARMProcClass.

bool llvm::ARMSubtarget::isAPCS_ABI ( ) const [inline]

Definition at line 392 of file ARMSubtarget.h.

References ARM_ABI_APCS, ARM_ABI_UNKNOWN, and TargetABI.

Referenced by computeDataLayout().

bool llvm::ARMSubtarget::isCortexA15 ( ) const [inline]

Definition at line 299 of file ARMSubtarget.h.

References ARMProcFamily, and CortexA15.

Referenced by llvm::ARMBaseInstrInfo::expandPostRAPseudo(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), and isLikeA9().

bool llvm::ARMSubtarget::isCortexA5 ( ) const [inline]

Definition at line 295 of file ARMSubtarget.h.

References ARMProcFamily, and CortexA5.

bool llvm::ARMSubtarget::isCortexA7 ( ) const [inline]

Definition at line 296 of file ARMSubtarget.h.

References ARMProcFamily, and CortexA7.

Referenced by adjustDefLatency(), llvm::ARMBaseInstrInfo::getNumMicroOps(), and llvm::ARMBaseInstrInfo::getOperandLatency().

bool llvm::ARMSubtarget::isCortexA8 ( ) const [inline]

Definition at line 297 of file ARMSubtarget.h.

References ARMProcFamily, and CortexA8.

Referenced by adjustDefLatency(), llvm::ARMBaseInstrInfo::getExecutionDomain(), llvm::ARMBaseInstrInfo::getNumMicroOps(), and llvm::ARMBaseInstrInfo::getOperandLatency().

bool llvm::ARMSubtarget::isCortexA9 ( ) const [inline]

Definition at line 298 of file ARMSubtarget.h.

References ARMProcFamily, and CortexA9.

Referenced by llvm::ARMBaseInstrInfo::getExecutionDomain(), and isLikeA9().

bool llvm::ARMSubtarget::isCortexM3 ( ) const [inline]

Definition at line 301 of file ARMSubtarget.h.

References CPUString.

bool llvm::ARMSubtarget::isCortexR5 ( ) const [inline]

Definition at line 303 of file ARMSubtarget.h.

References ARMProcFamily, and CortexR5.

bool llvm::ARMSubtarget::isFPBrccSlow ( ) const [inline]

Definition at line 329 of file ARMSubtarget.h.

References SlowFPBrcc.

Referenced by canChangeToInt().

bool llvm::ARMSubtarget::isFPOnlySP ( ) const [inline]

Definition at line 330 of file ARMSubtarget.h.

References FPOnlySP.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), llvm::ARMBaseInstrInfo::copyPhysReg(), llvm::ARMBaseInstrInfo::expandPostRAPseudo(), llvm::ARMTargetLowering::isFPImmLegal(), and PerformVMOVRRDCombine().

bool llvm::ARMSubtarget::isKrait ( ) const [inline]

Definition at line 304 of file ARMSubtarget.h.

References ARMProcFamily, and Krait.

Referenced by isLikeA9().

bool llvm::ARMSubtarget::isLikeA9 ( ) const [inline]

Definition at line 302 of file ARMSubtarget.h.

References isCortexA15(), isCortexA9(), and isKrait().

Referenced by adjustDefLatency(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::ARMBaseRegisterInfo::avoidWriteAfterWrite(), llvm::ARMHazardRecognizer::getHazardType(), llvm::ARMBaseInstrInfo::getNumMicroOps(), and llvm::ARMBaseInstrInfo::getOperandLatency().

bool llvm::ARMSubtarget::isLittle ( ) const [inline]

Definition at line 421 of file ARMSubtarget.h.

References IsLittle.

Referenced by computeDataLayout(), llvm::ARMTargetLowering::emitLoadLinked(), and llvm::ARMTargetLowering::emitStoreConditional().

bool llvm::ARMSubtarget::isMClass ( ) const [inline]

Definition at line 405 of file ARMSubtarget.h.

References ARMProcClass, and MClass.

Referenced by getArchForCPU(), llvm::ARMBaseRegisterInfo::getCalleeSavedRegs(), LowerATOMIC_FENCE(), llvm::ARMTargetLowering::shouldExpandAtomicLoadInIR(), llvm::ARMTargetLowering::shouldExpandAtomicRMWInIR(), and llvm::ARMTargetLowering::shouldExpandAtomicStoreInIR().

bool llvm::ARMSubtarget::isR9Reserved ( ) const [inline]

Definition at line 409 of file ARMSubtarget.h.

References IsR9Reserved.

Referenced by llvm::ARMBaseRegisterInfo::getRegPressureLimit(), and llvm::ARMBaseRegisterInfo::getReservedRegs().

bool llvm::ARMSubtarget::isRClass ( ) const [inline]

Definition at line 406 of file ARMSubtarget.h.

References ARMProcClass, and RClass.

bool llvm::ARMSubtarget::isSwift ( ) const [inline]

Definition at line 300 of file ARMSubtarget.h.

References ARMProcFamily, and Swift.

Referenced by adjustDefLatency(), llvm::ARMTargetLowering::emitLeadingFence(), llvm::ARMBaseInstrInfo::getNumMicroOps(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), llvm::ARMBaseInstrInfo::isProfitableToUnpredicate(), and LowerATOMIC_FENCE().

bool llvm::ARMSubtarget::isTargetAEABI ( ) const [inline]

Definition at line 365 of file ARMSubtarget.h.

References llvm::Triple::EABI, llvm::Triple::EABIHF, llvm::Triple::getEnvironment(), isTargetDarwin(), isTargetWindows(), and TargetTriple.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

bool llvm::ARMSubtarget::isTargetAndroid ( ) const [inline]

Definition at line 388 of file ARMSubtarget.h.

References llvm::Triple::Android, llvm::Triple::getEnvironment(), and TargetTriple.

Referenced by llvm::ARMFrameLowering::adjustForSegmentedStacks().

bool llvm::ARMSubtarget::isTargetCOFF ( ) const [inline]

Definition at line 354 of file ARMSubtarget.h.

References llvm::Triple::isOSBinFormatCOFF(), and TargetTriple.

Referenced by llvm::ARMAsmPrinter::runOnMachineFunction().

bool llvm::ARMSubtarget::isTargetDarwin ( ) const [inline]

Definition at line 347 of file ARMSubtarget.h.

References llvm::Triple::isOSDarwin(), and TargetTriple.

Referenced by llvm::ARMBaseRegisterInfo::ARMBaseRegisterInfo(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::ARMFrameLowering::emitPrologue(), isTargetAEABI(), isTargetEHABICompatible(), llvm::ARMBaseRegisterInfo::mayOverrideLocalAssignment(), and llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan().

bool llvm::ARMSubtarget::isTargetEHABICompatible ( ) const [inline]

Definition at line 373 of file ARMSubtarget.h.

References llvm::Triple::Android, llvm::Triple::EABI, llvm::Triple::EABIHF, llvm::Triple::getEnvironment(), llvm::Triple::GNUEABI, llvm::Triple::GNUEABIHF, isTargetDarwin(), isTargetWindows(), and TargetTriple.

Referenced by llvm::ARMAsmPrinter::EmitInstruction().

bool llvm::ARMSubtarget::isTargetELF ( ) const [inline]

Definition at line 355 of file ARMSubtarget.h.

References llvm::Triple::isOSBinFormatELF(), and TargetTriple.

Referenced by llvm::ARMAsmPrinter::EmitEndOfAsmFile(), llvm::Thumb1FrameLowering::emitPrologue(), llvm::ARMFrameLowering::emitPrologue(), llvm::ARMAsmPrinter::EmitStartOfAsmFile(), and llvm::ARMAsmPrinter::EmitXXStructor().

bool llvm::ARMSubtarget::isTargetHardFloat ( ) const [inline]

Definition at line 382 of file ARMSubtarget.h.

References llvm::Triple::EABIHF, llvm::Triple::getEnvironment(), llvm::Triple::GNUEABIHF, isTargetWindows(), and TargetTriple.

Referenced by llvm::ARMBaseTargetMachine::ARMBaseTargetMachine().

bool llvm::ARMSubtarget::isTargetIOS ( ) const [inline]

Definition at line 348 of file ARMSubtarget.h.

References llvm::Triple::isiOS(), and TargetTriple.

Referenced by llvm::ARMBaseRegisterInfo::getCalleeSavedRegs(), llvm::ARMBaseRegisterInfo::getCallPreservedMask(), llvm::ARMBaseRegisterInfo::getThisReturnPreservedMask(), and llvm::ARMFrameLowering::hasFP().

bool llvm::ARMSubtarget::isTargetLinux ( ) const [inline]

Definition at line 349 of file ARMSubtarget.h.

References llvm::Triple::isOSLinux(), and TargetTriple.

Referenced by llvm::ARMFrameLowering::adjustForSegmentedStacks(), and llvm::ARM::createFastISel().

bool llvm::ARMSubtarget::isTargetMachO ( ) const [inline]

Definition at line 356 of file ARMSubtarget.h.

References llvm::Triple::isOSBinFormatMachO(), and TargetTriple.

Referenced by llvm::ARMBaseRegisterInfo::ARMBaseRegisterInfo(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::ARM::createFastISel(), llvm::ARMAsmPrinter::EmitEndOfAsmFile(), llvm::ARMFrameLowering::emitEpilogue(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::ARMAsmPrinter::EmitMachineConstantPoolValue(), llvm::Thumb1FrameLowering::emitPrologue(), llvm::ARMAsmPrinter::EmitStartOfAsmFile(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemset(), and GVIsIndirectSymbol().

bool llvm::ARMSubtarget::isTargetNaCl ( ) const [inline]

Definition at line 350 of file ARMSubtarget.h.

References llvm::Triple::isOSNaCl(), and TargetTriple.

Referenced by computeDataLayout(), and llvm::ARM::createFastISel().

bool llvm::ARMSubtarget::isTargetNetBSD ( ) const [inline]

Definition at line 351 of file ARMSubtarget.h.

References llvm::Triple::getOS(), llvm::Triple::NetBSD, and TargetTriple.

bool llvm::ARMSubtarget::isTargetWindows ( ) const [inline]

Definition at line 352 of file ARMSubtarget.h.

References llvm::Triple::isOSWindows(), and TargetTriple.

Referenced by llvm::ARMBaseRegisterInfo::ARMBaseRegisterInfo(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::ARMFrameLowering::emitPrologue(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemset(), isTargetAEABI(), isTargetEHABICompatible(), isTargetHardFloat(), and useMovt().

bool llvm::ARMSubtarget::isThumb ( ) const [inline]

bool llvm::ARMSubtarget::isThumb1Only ( ) const [inline]

Definition at line 402 of file ARMSubtarget.h.

References HasThumb2, and InThumbMode.

Referenced by AddCombineTo64bitMLAL(), llvm::ARMFrameLowering::adjustForSegmentedStacks(), llvm::ARMBaseInstrInfo::areLoadsFromSameBasePtr(), llvm::ARMBaseRegisterInfo::ARMBaseRegisterInfo(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::ARM::createFastISel(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), enableAtomicExpand(), Expand64BitShift(), llvm::ARMTargetLowering::getMaximalGlobalOffset(), llvm::ARMTargetLowering::getPostIndexedAddressParts(), llvm::ARMTargetLowering::getPreIndexedAddressParts(), isLegalAddressImmediate(), llvm::ARMTargetLowering::isLegalAddressingMode(), IsSingleInstrConstant(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), LowerPREFETCH(), PerformANDCombine(), PerformMULCombine(), PerformORCombine(), PerformXORCombine(), and llvm::ARMBaseInstrInfo::shouldScheduleLoadsNear().

bool llvm::ARMSubtarget::isThumb2 ( ) const [inline]

Definition at line 403 of file ARMSubtarget.h.

References HasThumb2, and InThumbMode.

void llvm::ARMSubtarget::ParseSubtargetFeatures	(	StringRef	CPU,
		StringRef	FS
	)

ParseSubtargetFeatures - Parses features string setting specified subtarget options. Definition of function is auto generated by tblgen.

bool llvm::ARMSubtarget::prefers32BitThumb ( ) const [inline]

Definition at line 334 of file ARMSubtarget.h.

References Pref32BitThumb.

bool llvm::ARMSubtarget::restrictIT ( ) const [inline]

Definition at line 417 of file ARMSubtarget.h.

References RestrictIT.

Referenced by llvm::ARMBaseInstrInfo::isPredicable().

bool llvm::ARMSubtarget::supportsTailCall ( ) const [inline]

Definition at line 413 of file ARMSubtarget.h.

References SupportsTailCall.

bool llvm::ARMSubtarget::useFPVMLx ( ) const [inline]

Definition at line 327 of file ARMSubtarget.h.

References SlowFPVMLx.

bool ARMSubtarget::useMovt ( const MachineFunction & MF ) const

Definition at line 418 of file ARMSubtarget.cpp.

References llvm::AttributeSet::FunctionIndex, llvm::Function::getAttributes(), llvm::MachineFunction::getFunction(), llvm::AttributeSet::hasAttribute(), isTargetWindows(), llvm::Attribute::MinSize, and UseMovt.

bool llvm::ARMSubtarget::useMulOps ( ) const [inline]

Definition at line 326 of file ARMSubtarget.h.

References UseMulOps.

bool llvm::ARMSubtarget::useNaClTrap ( ) const [inline]

Definition at line 340 of file ARMSubtarget.h.

References UseNaClTrap.

Referenced by llvm::ARMBaseInstrInfo::getTrap().

bool llvm::ARMSubtarget::useNEONForSinglePrecisionFP ( ) const [inline]

Definition at line 316 of file ARMSubtarget.h.

References hasNEON(), and UseNEONForSinglePrecisionFP.

Referenced by llvm::ARMTargetLowering::findRepresentativeClass(), and PerformSELECT_CCCombine().

Member Data Documentation

bool llvm::ARMSubtarget::AllowsUnalignedMem [protected]

AllowsUnalignedMem - If true, the subtarget allows unaligned memory accesses for some types. For details, see ARMTargetLowering::allowsMisalignedMemoryAccesses().

Definition at line 190 of file ARMSubtarget.h.

Referenced by allowsUnalignedMem().

ARMProcClassEnum llvm::ARMSubtarget::ARMProcClass [protected]

ARMProcClass - ARM processor class: None, AClass, RClass or MClass.

Definition at line 55 of file ARMSubtarget.h.

Referenced by isAClass(), isMClass(), and isRClass().

ARMProcFamilyEnum llvm::ARMSubtarget::ARMProcFamily [protected]

ARMProcFamily - ARM processor family: Cortex-A8, Cortex-A9, and others.

Definition at line 52 of file ARMSubtarget.h.

Referenced by isCortexA15(), isCortexA5(), isCortexA7(), isCortexA8(), isCortexA9(), isCortexR5(), isKrait(), and isSwift().

bool llvm::ARMSubtarget::AvoidCPSRPartialUpdate [protected]

AvoidCPSRPartialUpdate - If true, codegen would avoid using instructions that partially update CPSR and add false dependency on the previous CPSR setting instruction.

Definition at line 147 of file ARMSubtarget.h.

Referenced by avoidCPSRPartialUpdate().

bool llvm::ARMSubtarget::AvoidMOVsShifterOperand [protected]

AvoidMOVsShifterOperand - If true, codegen should avoid using flag setting movs with shifter operand (i.e. asr, lsl, lsr).

Definition at line 151 of file ARMSubtarget.h.

Referenced by avoidMOVsShifterOperand().

std::string llvm::ARMSubtarget::CPUString [protected]

CPUString - String name of used CPU.

Definition at line 211 of file ARMSubtarget.h.

Referenced by getCPUString(), and isCortexM3().

bool llvm::ARMSubtarget::FPOnlySP [protected]

FPOnlySP - If true, the floating point unit only supports single precision.

Definition at line 167 of file ARMSubtarget.h.

Referenced by isFPOnlySP().

bool llvm::ARMSubtarget::HasCRC [protected]

HasCRC - if true, processor supports CRC instructions.

Definition at line 181 of file ARMSubtarget.h.

Referenced by hasCRC().

bool llvm::ARMSubtarget::HasCrypto [protected]

HasCrypto - if true, processor supports Cryptography extensions.

Definition at line 178 of file ARMSubtarget.h.

Referenced by hasCrypto().

bool llvm::ARMSubtarget::HasD16 [protected]

HasD16 - True if subtarget is limited to 16 double precision FP registers for VFPv3.

Definition at line 124 of file ARMSubtarget.h.

Referenced by hasD16().

bool llvm::ARMSubtarget::HasDataBarrier [protected]

HasDataBarrier - True if the subtarget supports DMB / DSB data barrier instructions.

Definition at line 138 of file ARMSubtarget.h.

Referenced by hasAnyDataBarrier(), and hasDataBarrier().

bool llvm::ARMSubtarget::HasFP16 [protected]

HasFP16 - True if subtarget supports half-precision FP (We support VFP+HF only so far)

Definition at line 120 of file ARMSubtarget.h.

Referenced by hasFP16().

bool llvm::ARMSubtarget::HasFPARMv8 [protected]

Definition at line 74 of file ARMSubtarget.h.

Referenced by hasFPARMv8().

bool llvm::ARMSubtarget::HasHardwareDivide [protected]

HasHardwareDivide - True if subtarget supports [su]div.

Definition at line 127 of file ARMSubtarget.h.

Referenced by hasDivide().

bool llvm::ARMSubtarget::HasHardwareDivideInARM [protected]

HasHardwareDivideInARM - True if subtarget supports [su]div in ARM mode.

Definition at line 130 of file ARMSubtarget.h.

Referenced by hasDivideInARMMode().

bool llvm::ARMSubtarget::HasMPExtension [protected]

HasMPExtension - True if the subtarget supports Multiprocessing extension (ARMv7 only).

Definition at line 159 of file ARMSubtarget.h.

Referenced by hasMPExtension().

bool llvm::ARMSubtarget::HasNEON [protected]

Definition at line 75 of file ARMSubtarget.h.

Referenced by hasNEON().

bool llvm::ARMSubtarget::HasPerfMon [protected]

If true, the processor supports the Performance Monitor Extensions. These include a generic cycle-counter as well as more fine-grained (often implementation-specific) events.

Definition at line 172 of file ARMSubtarget.h.

Referenced by hasPerfMon().

bool llvm::ARMSubtarget::HasRAS [protected]

HasRAS - Some processors perform return stack prediction. CodeGen should avoid issue "normal" call instructions to callees which do not return.

Definition at line 155 of file ARMSubtarget.h.

Referenced by hasRAS().

bool llvm::ARMSubtarget::HasT2ExtractPack [protected]

HasT2ExtractPack - True if subtarget supports thumb2 extract/pack instructions.

Definition at line 134 of file ARMSubtarget.h.

Referenced by hasT2ExtractPack().

bool llvm::ARMSubtarget::HasThumb2 [protected]

HasThumb2 - True if Thumb2 instructions are supported.

Definition at line 101 of file ARMSubtarget.h.

Referenced by hasThumb2(), isThumb1Only(), and isThumb2().

bool llvm::ARMSubtarget::HasTrustZone [protected]

HasTrustZone - if true, processor supports TrustZone security extensions.

Definition at line 175 of file ARMSubtarget.h.

Referenced by hasTrustZone().

bool llvm::ARMSubtarget::HasV4TOps [protected]

HasV4TOps, HasV5TOps, HasV5TEOps, HasV6Ops, HasV6MOps, HasV6T2Ops, HasV7Ops, HasV8Ops - Specify whether target support specific ARM ISA variants.

Definition at line 60 of file ARMSubtarget.h.

Referenced by hasV4TOps().

bool llvm::ARMSubtarget::HasV5TEOps [protected]

Definition at line 62 of file ARMSubtarget.h.

Referenced by hasV5TEOps().

bool llvm::ARMSubtarget::HasV5TOps [protected]

Definition at line 61 of file ARMSubtarget.h.

Referenced by hasV5TOps().

bool llvm::ARMSubtarget::HasV6MOps [protected]

Definition at line 64 of file ARMSubtarget.h.

Referenced by hasV6MOps().

bool llvm::ARMSubtarget::HasV6Ops [protected]

Definition at line 63 of file ARMSubtarget.h.

Referenced by hasV6Ops().

bool llvm::ARMSubtarget::HasV6T2Ops [protected]

Definition at line 65 of file ARMSubtarget.h.

Referenced by hasV6T2Ops().

bool llvm::ARMSubtarget::HasV7Ops [protected]

Definition at line 66 of file ARMSubtarget.h.

Referenced by hasV7Ops().

bool llvm::ARMSubtarget::HasV8Ops [protected]

Definition at line 67 of file ARMSubtarget.h.

Referenced by hasV8Ops().

bool llvm::ARMSubtarget::HasVFPv2 [protected]

HasVFPv2, HasVFPv3, HasVFPv4, HasFPARMv8, HasNEON - Specify what floating point ISAs are supported.

Definition at line 71 of file ARMSubtarget.h.

Referenced by hasVFP2().

bool llvm::ARMSubtarget::HasVFPv3 [protected]

Definition at line 72 of file ARMSubtarget.h.

Referenced by hasVFP3().

bool llvm::ARMSubtarget::HasVFPv4 [protected]

Definition at line 73 of file ARMSubtarget.h.

Referenced by hasVFP4().

bool llvm::ARMSubtarget::HasVirtualization [protected]

HasVirtualization - True if the subtarget supports the Virtualization extension.

Definition at line 163 of file ARMSubtarget.h.

Referenced by hasVirtualization().

bool llvm::ARMSubtarget::HasVMLxForwarding [protected]

HasVMLxForwarding - If true, NEON has special multiplier accumulator forwarding to allow mul + mla being issued back to back.

Definition at line 92 of file ARMSubtarget.h.

Referenced by hasVMLxForwarding().

bool llvm::ARMSubtarget::HasZeroCycleZeroing [protected]

If true, the instructions "vmov.i32 d0, #0" and "vmov.i32 q0, #0" are particularly effective at zeroing a VFP register.

Definition at line 185 of file ARMSubtarget.h.

Referenced by hasZeroCycleZeroing().

InstrItineraryData llvm::ARMSubtarget::InstrItins [protected]

Selected instruction itineraries (one entry per itinerary class.)

Definition at line 223 of file ARMSubtarget.h.

Referenced by getInstrItineraryData().

bool llvm::ARMSubtarget::InThumbMode [protected]

InThumbMode - True if compiling for Thumb, false for ARM.

Definition at line 98 of file ARMSubtarget.h.

Referenced by isThumb(), isThumb1Only(), and isThumb2().

bool llvm::ARMSubtarget::IsLittle [protected]

IsLittle - The target is Little Endian.

Definition at line 214 of file ARMSubtarget.h.

Referenced by isLittle().

bool llvm::ARMSubtarget::IsR9Reserved [protected]

IsR9Reserved - True if R9 is a not available as general purpose register.

Definition at line 107 of file ARMSubtarget.h.

Referenced by isR9Reserved().

bool llvm::ARMSubtarget::NoARM [protected]

NoARM - True if subtarget does not support ARM mode execution.

Definition at line 104 of file ARMSubtarget.h.

Referenced by hasARMOps().

const TargetOptions& llvm::ARMSubtarget::Options [protected]

Options passed via command line that could influence the target.

Definition at line 226 of file ARMSubtarget.h.

bool llvm::ARMSubtarget::Pref32BitThumb [protected]

Pref32BitThumb - If true, codegen would prefer 32-bit Thumb instructions over 16-bit ones.

Definition at line 142 of file ARMSubtarget.h.

Referenced by prefers32BitThumb().

bool llvm::ARMSubtarget::RestrictIT [protected]

RestrictIT - If true, the subtarget disallows generation of deprecated IT blocks to conform to ARMv8 rule.

Definition at line 194 of file ARMSubtarget.h.

Referenced by restrictIT().

MCSchedModel llvm::ARMSubtarget::SchedModel [protected]

SchedModel - Processor specific instruction costs.

Definition at line 220 of file ARMSubtarget.h.

Referenced by getMispredictionPenalty().

bool llvm::ARMSubtarget::SlowFPBrcc [protected]

SlowFPBrcc - True if floating point compare + branch is slow.

Definition at line 95 of file ARMSubtarget.h.

Referenced by isFPBrccSlow().

bool llvm::ARMSubtarget::SlowFPVMLx [protected]

SlowFPVMLx - If the VFP2 / NEON instructions are available, indicates whether the FP VML[AS] instructions are slow (if so, don't use them).

Definition at line 88 of file ARMSubtarget.h.

Referenced by useFPVMLx().

unsigned llvm::ARMSubtarget::stackAlignment [protected]

stackAlignment - The minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function.

Definition at line 208 of file ARMSubtarget.h.

Referenced by getStackAlignment().

bool llvm::ARMSubtarget::SupportsTailCall [protected]

SupportsTailCall - True if the OS supports tail call. The dynamic linker must be able to synthesize call stubs for interworking between ARM and Thumb.

Definition at line 116 of file ARMSubtarget.h.

Referenced by supportsTailCall().

enum { ... } llvm::ARMSubtarget::TargetABI

Referenced by isAAPCS_ABI(), and isAPCS_ABI().

Triple llvm::ARMSubtarget::TargetTriple [protected]

TargetTriple - What processor and OS we're targeting.

Definition at line 217 of file ARMSubtarget.h.

Referenced by getTargetTriple(), isTargetAEABI(), isTargetAndroid(), isTargetCOFF(), isTargetDarwin(), isTargetEHABICompatible(), isTargetELF(), isTargetHardFloat(), isTargetIOS(), isTargetLinux(), isTargetMachO(), isTargetNaCl(), isTargetNetBSD(), and isTargetWindows().

bool llvm::ARMSubtarget::Thumb2DSP [protected]

Thumb2DSP - If true, the subtarget supports the v7 DSP (saturating arith and such) instructions in Thumb2 code.

Definition at line 198 of file ARMSubtarget.h.

Referenced by hasThumb2DSP().

bool llvm::ARMSubtarget::UnsafeFPMath [protected]

Target machine allowed unsafe FP math (such as use of NEON fp)

Definition at line 204 of file ARMSubtarget.h.

bool llvm::ARMSubtarget::UseMovt [protected]

UseMovt - True if MOVT / MOVW pairs are used for materialization of 32-bit imms (including global addresses).

Definition at line 111 of file ARMSubtarget.h.

Referenced by useMovt().

bool llvm::ARMSubtarget::UseMulOps [protected]

UseMulOps - True if non-microcoded fused integer multiply-add and multiply-subtract instructions should be used.

Definition at line 84 of file ARMSubtarget.h.

Referenced by useMulOps().

bool llvm::ARMSubtarget::UseNaClTrap [protected]

NaCl TRAP instruction is generated instead of the regular TRAP.

Definition at line 201 of file ARMSubtarget.h.

Referenced by useNaClTrap().

bool llvm::ARMSubtarget::UseNEONForSinglePrecisionFP [protected]

UseNEONForSinglePrecisionFP - if the NEONFP attribute has been specified. Use the method useNEONForSinglePrecisionFP() to determine if NEON should actually be used.

Definition at line 80 of file ARMSubtarget.h.

Referenced by useNEONForSinglePrecisionFP().

The documentation for this class was generated from the following files:

Public Types

Public Member Functions

Public Attributes

Protected Types

Protected Attributes

Detailed Description

Member Enumeration Documentation

Constructor & Destructor Documentation

Member Function Documentation

Member Data Documentation