LLVM API Documentation

ARMSelectionDAGInfo.h
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00001 //===-- ARMSelectionDAGInfo.h - ARM SelectionDAG Info -----------*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file defines the ARM subclass for TargetSelectionDAGInfo.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 #ifndef LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
00015 #define LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
00016 
00017 #include "MCTargetDesc/ARMAddressingModes.h"
00018 #include "llvm/Target/TargetSelectionDAGInfo.h"
00019 
00020 namespace llvm {
00021 
00022 namespace ARM_AM {
00023   static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) {
00024     switch (Opcode) {
00025     default:          return ARM_AM::no_shift;
00026     case ISD::SHL:    return ARM_AM::lsl;
00027     case ISD::SRL:    return ARM_AM::lsr;
00028     case ISD::SRA:    return ARM_AM::asr;
00029     case ISD::ROTR:   return ARM_AM::ror;
00030     //case ISD::ROTL:  // Only if imm -> turn into ROTR.
00031     // Can't handle RRX here, because it would require folding a flag into
00032     // the addressing mode.  :(  This causes us to miss certain things.
00033     //case ARMISD::RRX: return ARM_AM::rrx;
00034     }
00035   }
00036 }  // end namespace ARM_AM
00037 
00038 class ARMSelectionDAGInfo : public TargetSelectionDAGInfo {
00039 public:
00040   explicit ARMSelectionDAGInfo(const DataLayout &DL);
00041   ~ARMSelectionDAGInfo();
00042 
00043   SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
00044                                   SDValue Chain,
00045                                   SDValue Dst, SDValue Src,
00046                                   SDValue Size, unsigned Align,
00047                                   bool isVolatile, bool AlwaysInline,
00048                                   MachinePointerInfo DstPtrInfo,
00049                                   MachinePointerInfo SrcPtrInfo) const override;
00050 
00051   // Adjust parameters for memset, see RTABI section 4.3.4
00052   SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
00053                                   SDValue Chain,
00054                                   SDValue Op1, SDValue Op2,
00055                                   SDValue Op3, unsigned Align,
00056                                   bool isVolatile,
00057                                   MachinePointerInfo DstPtrInfo) const override;
00058 };
00059 
00060 }
00061 
00062 #endif