llvm::SDValue Class Reference

#include <SelectionDAGNodes.h>

List of all members.

Public Member Functions
	SDValue ()
	SDValue (SDNode *node, unsigned resno)
unsigned	getResNo () const
	get the index which selects a specific result in the SDNode
SDNode *	getNode () const
	get the SDNode which holds the desired result
void	setNode (SDNode *N)
	set the SDNode
SDNode *	operator-> () const
bool	operator== (const SDValue &O) const
bool	operator!= (const SDValue &O) const
bool	operator< (const SDValue &O) const
LLVM_EXPLICIT	operator bool () const
SDValue	getValue (unsigned R) const
bool	isOperandOf (SDNode *N) const
EVT	getValueType () const
MVT	getSimpleValueType () const
	Return the simple ValueType of the referenced return value.
unsigned	getValueSizeInBits () const
unsigned	getScalarValueSizeInBits () const
unsigned	getOpcode () const
unsigned	getNumOperands () const
const SDValue &	getOperand (unsigned i) const
uint64_t	getConstantOperandVal (unsigned i) const
bool	isTargetMemoryOpcode () const
bool	isTargetOpcode () const
bool	isMachineOpcode () const
unsigned	getMachineOpcode () const
const DebugLoc	getDebugLoc () const
void	dump () const
void	dumpr () const
bool	reachesChainWithoutSideEffects (SDValue Dest, unsigned Depth=2) const
bool	use_empty () const
bool	hasOneUse () const
Friends
struct	DenseMapInfo< SDValue >

---

Detailed Description

SDValue - Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation. Many nodes return multiple values, from loads (which define a token and a return value) to ADDC (which returns a result and a carry value), to calls (which may return an arbitrary number of values).

As such, each use of a SelectionDAG computation must indicate the node that computes it as well as which return value to use from that node. This pair of information is represented with the SDValue value type.

Definition at line 119 of file SelectionDAGNodes.h.

---

Constructor & Destructor Documentation

llvm::SDValue::SDValue

(

)

[inline]

Definition at line 125 of file SelectionDAGNodes.h.

Referenced by getValue().

llvm::SDValue::SDValue	(	SDNode *	node,
		unsigned	resno
	)		[inline]

Definition at line 896 of file SelectionDAGNodes.h.

---

Member Function Documentation

void llvm::SDValue::dump

(

)

const [inline]

Definition at line 939 of file SelectionDAGNodes.h.

References llvm::SDNode::dump().

void llvm::SDValue::dumpr

(

)

const [inline]

Definition at line 942 of file SelectionDAGNodes.h.

References llvm::SDNode::dumpr().

uint64_t llvm::SDValue::getConstantOperandVal

(

unsigned

i

)

const [inline]

Definition at line 915 of file SelectionDAGNodes.h.

References llvm::SDNode::getConstantOperandVal().

Referenced by checkBoolTestSetCCCombine(), CMPEQCombine(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::InferPtrAlignment(), LowerAsSplatVectorLoad(), LowerFRAMEADDR(), LowerRETURNADDR(), and OptimizeConditionalInDecrement().

const DebugLoc llvm::SDValue::getDebugLoc

(

)

const [inline]

Definition at line 936 of file SelectionDAGNodes.h.

References llvm::SDNode::getDebugLoc().

unsigned llvm::SDValue::getMachineOpcode

(

)

const [inline]

Definition at line 927 of file SelectionDAGNodes.h.

References llvm::SDNode::getMachineOpcode().

Referenced by FoldOperand().

SDNode* llvm::SDValue::getNode

(

)

const [inline]

get the SDNode which holds the desired result

Definition at line 132 of file SelectionDAGNodes.h.

References Node.

Referenced by AddCombineTo64bitMLAL(), AddCombineToVPADDL(), llvm::DOTGraphTraits< SelectionDAG * >::addCustomGraphFeatures(), AddGlue(), buildFromShuffleMostly(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::BuildUDIV(), canChangeToInt(), canFoldInAddressingMode(), CanFoldXORWithAllOnes(), ChangeVSETULTtoVSETULE(), checkBoolTestSetCCCombine(), llvm::checkForCycles(), checkForCyclesHelper(), CheckForMaskedLoad(), checkHighLaneIndex(), checkV64LaneV128(), checkValueWidth(), ChooseConstraint(), CombineBaseUpdate(), combineRedundantDWordShuffle(), combineRedundantHalfShuffle(), combineSelectAndUse(), combineSelectAndUseCommutative(), CombineVLDDUP(), combineX86ShuffleChain(), combineX86ShufflesRecursively(), llvm::SelectionDAG::computeKnownBits(), ConvertSelectToConcatVector(), llvm::SelectionDAG::dump(), DumpNodes(), DumpNodesr(), EltsFromConsecutiveLoads(), EmitVectorComparison(), llvm::TargetLowering::expandMUL(), ExpandPowI(), ExtendUsesToFormExtLoad(), FindCallSeqStart(), findConsecutiveLoad(), findNonImmUse(), findUser(), FoldOperand(), llvm::SelectionDAG::FoldSetCC(), GenerateTBL(), llvm::PPC::get_VSPLTI_elt(), getAArch64Cmp(), getBuildPairElt(), llvm::SelectionDAG::getCALLSEQ_END(), llvm::BuildVectorSDNode::getConstantFPSplatNode(), llvm::BuildVectorSDNode::getConstantSplatNode(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getCopyToReg(), llvm::ScheduleDAGSDNodes::getCustomGraphFeatures(), llvm::DOTGraphTraits< SelectionDAG * >::getEdgeAttributes(), getExtractVEXTRACTImmediate(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), llvm::SDNode::getGluedNode(), llvm::DenseMapInfo< SDValue >::getHashValue(), getINSERTPS(), getInsertVINSERTImmediate(), llvm::SelectionDAG::getMemcpy(), getMemcpyLoadsAndStores(), llvm::SelectionDAG::getMemmove(), llvm::SelectionDAG::getMemset(), llvm::SDUse::getNode(), llvm::SelectionDAG::getNode(), getNodeRegMask(), llvm::SelectionDAGBuilder::getNonRegisterValue(), getNumOfConsecutiveZeros(), llvm::MipsTargetLowering::getOpndList(), llvm::HexagonTargetLowering::getPostIndexedAddressParts(), llvm::ARMTargetLowering::getPreIndexedAddressParts(), llvm::PPCTargetLowering::getPreIndexedAddressParts(), getPSHUFShuffleMask(), getShuffleScalarElt(), llvm::simplify_type< SDValue >::getSimplifiedValue(), llvm::simplify_type< const SDValue >::getSimplifiedValue(), getTargetVShiftByConstNode(), getUsefulBits(), getUsefulBitsFromAndWithImmediate(), getUsefulBitsFromBFM(), getUsefulBitsFromOrWithShiftedReg(), getUsefulBitsFromUBFM(), llvm::SelectionDAGBuilder::getValue(), llvm::SelectionDAGBuilder::getValueImpl(), getVShiftImm(), getVZextMovL(), HandleMergeInputChains(), hasNormalLoadOperand(), llvm::SDNode::hasPredecessorHelper(), llvm::SelectionDAG::InferPtrAlignment(), insertDAGNode(), InsertDAGNode(), isAddSubSExt(), isAddSubZExt(), isBitfieldExtractOp(), isBitfieldExtractOpFromAnd(), isBitfieldExtractOpFromShr(), isBitfieldInsertOpFromOr(), isBitfieldPositioningOp(), isBSwapHWordElement(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), isCalleeLoad(), IsChainDependent(), llvm::SelectionDAG::isConsecutiveLoad(), isConsecutiveLSLoc(), isConstantBuildVectorOrConstantInt(), isExtendedBUILD_VECTOR(), isFloatingPointZero(), llvm::TargetLowering::isGAPlusOffset(), isHorizontalBinOp(), isInt32Immediate(), isIntImmediate(), isIntS16Immediate(), llvm::SelectionDAGISel::IsLegalToFold(), isLoadIncOrDecStore(), isNaturalMemoryOperand(), isNodeChanged(), isOpcWithIntImmediate(), IsPredicateKnownToFail(), isScalarLoadToVector(), isSeveralBitsExtractOpFromShr(), isVEXTRACTIndex(), isVINSERTIndex(), isVSplat(), isX86LogicalCmp(), isZeroShuffle(), llvm::SelectionDAG::Legalize(), LowerADDC_ADDE_SUBC_SUBE(), LowerANY_EXTEND(), llvm::SparcTargetLowering::LowerAsmOperandForConstraint(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), llvm::PPCTargetLowering::LowerAsmOperandForConstraint(), LowerATOMIC_STORE(), LowerBuildVectorv16i8(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::TargetLowering::LowerCallTo(), lowerCTPOP32BitElements(), lowerDSPIntr(), LowerExtendedLoad(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerF128Load(), LowerF128Store(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerINLINEASM(), LowerINSERT_SUBVECTOR(), lowerIntegerElementInsertionVectorShuffle(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), LowerLOAD_SUB(), lowerMSABinaryBitImmIntr(), LowerMUL(), llvm::R600TargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), llvm::XCoreTargetLowering::LowerOperation(), llvm::AMDGPUTargetLowering::LowerOperation(), llvm::ARMTargetLowering::LowerOperation(), llvm::TargetLowering::LowerOperationWrapper(), LowerREADCYCLECOUNTER(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), LowerScalarVariableShift(), LowerShift(), llvm::MSP430TargetLowering::LowerShifts(), llvm::AMDGPUTargetLowering::LowerSTORE(), lowerV4F32VectorShuffle(), LowerVAARG(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE_256(), LowerVECTOR_SHUFFLEv16i8(), LowerVECTOR_SHUFFLEv32i8(), LowerVECTOR_SHUFFLEv8i16(), LowerVECTOR_SHUFFLEv8i8(), LowerVectorAllZeroTest(), LowerVectorBroadcast(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), LowerVectorIntExtend(), LowerVSELECTtoBlend(), LowerVSETCC(), LowerXALUO(), LowerZERO_EXTEND(), MayFoldIntoStore(), MayFoldLoad(), MoveBelowOrigChain(), NormalizeVectorShuffle(), PerformADDCombine(), PerformADDCombineWithOperands(), performAddSubLongCombine(), PerformANDCombine(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), performBRCONDCombine(), PerformBUILD_VECTORCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), PerformCMOVCombine(), performCONDCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::MipsSETargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performExtendCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformInsertEltCombine(), performIntegerAbsCombine(), PerformINTRINSIC_WO_CHAINCombine(), performIntToFpCombine(), PerformISDSETCCCombine(), PerformMULCombine(), performNEONPostLDSTCombine(), performORCombine(), PerformORCombine(), PerformOrCombine(), performPostLD1Combine(), PerformSELECTCombine(), PerformSETCCCombine(), PerformSExtCombine(), PerformShiftCombine(), PerformSHLCombine(), PerformShuffleCombine(), PerformShuffleCombine256(), PerformSIGN_EXTEND_INREGCombine(), PerformSINT_TO_FPCombine(), PerformSTORECombine(), PerformSUBCombine(), PerformTargetShuffleCombine(), PerformVDIVCombine(), PerformVMOVDRRCombine(), PerformVMOVRRDCombine(), performXORCombine(), PerformXORCombine(), PerformXorCombine(), PerformZExtCombine(), PrepareCall(), llvm::SDNode::print(), printrWithDepthHelper(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), llvm::SelectionDAG::ReplaceAllUsesOfValuesWith(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), ReplaceINTRINSIC_W_CHAIN(), llvm::AMDGPUTargetLowering::ReplaceNodeResults(), llvm::ARMTargetLowering::ReplaceNodeResults(), llvm::SelectionDAGBuilder::resolveDanglingDebugInfo(), llvm::DAGTypeLegalizer::run(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::SelectionDAGISel::SelectCodeCommon(), selectMADD(), selectMSUB(), llvm::SelectionDAG::setRoot(), llvm::SelectionDAGBuilder::setUnusedArgValue(), llvm::SelectionDAGBuilder::setValue(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), SkipExtensionForVMULL(), llvm::SelectionDAG::TransferDbgValues(), TransformVSELECTtoBlendVECTOR_SHUFFLE(), TranslateX86CC(), tryCombineLongOpWithDup(), tryExtendDUPToExtractHigh(), tryToFoldExtendOfConstant(), useDivRem(), useSinCos(), ValueHasExactlyOneBitSet(), WillBeConstantPoolLoad(), and XFormVExtractWithShuffleIntoLoad().

unsigned llvm::SDValue::getNumOperands

(

)

const [inline]

Definition at line 909 of file SelectionDAGNodes.h.

References llvm::SDNode::getNumOperands().

Referenced by buildFromShuffleMostly(), CheckChildInteger(), CheckChildSame(), CheckChildType(), llvm::InstrEmitter::EmitDbgValue(), llvm::SelectionDAG::getNode(), isCalleeLoad(), isLoadIncOrDecStore(), LowerAVXCONCAT_VECTORS(), LowerCONCAT_VECTORS(), LowerScalarImmediateShift(), LowerScalarVariableShift(), LowerShiftParts(), LowerVECTOR_SHUFFLE(), MayFoldVectorLoad(), MoveBelowOrigChain(), partitionShuffleOfConcats(), PerformSELECTCombine(), PerformVECTOR_SHUFFLECombine(), reachesChainWithoutSideEffects(), llvm::SelectionDAGISel::SelectCodeCommon(), and llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp().

unsigned llvm::SDValue::getOpcode

(

)

const [inline]

Definition at line 903 of file SelectionDAGNodes.h.

References llvm::SDNode::getOpcode().

Referenced by AddCombineToVPADDL(), llvm::ISD::allOperandsUndef(), buildFromShuffleMostly(), CanFoldXORWithAllOnes(), checkBoolTestSetCCCombine(), checkHighLaneIndex(), CMPEQCombine(), combineRedundantDWordShuffle(), combineRedundantHalfShuffle(), combineX86ShufflesRecursively(), CompactSwizzlableVector(), llvm::SelectionDAG::computeKnownBits(), llvm::SparcTargetLowering::computeKnownBitsForTargetNode(), llvm::AMDGPUTargetLowering::computeKnownBitsForTargetNode(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), llvm::PPCTargetLowering::computeKnownBitsForTargetNode(), llvm::TargetLowering::computeKnownBitsForTargetNode(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::AMDGPUTargetLowering::ComputeNumSignBitsForTargetNode(), llvm::TargetLowering::ComputeNumSignBitsForTargetNode(), ConvertSelectToConcatVector(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), createFPCmp(), EltsFromConsecutiveLoads(), EmitCMP(), emitComparison(), ExpandBVWithShuffles(), ExtractSubVector(), FindBaseOffset(), findEXTRHalf(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), llvm::PPC::get_VSPLTI_elt(), getAArch64XALUOOp(), getARMIndexedAddressParts(), getAtomicLoadArithTargetConstant(), getBuildPairElt(), llvm::SelectionDAGBuilder::getControlRoot(), getExtendTypeForNode(), getGatherNode(), llvm::SelectionDAG::getIndexedLoad(), llvm::SelectionDAG::getIndexedStore(), llvm::SelectionDAG::getLoad(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), getMemsetStores(), getMemsetValue(), getMOVHighToLow(), GetNegatedExpression(), llvm::SelectionDAG::getNode(), getNumOfConsecutiveZeros(), getPSHUFShuffleMask(), getShiftTypeForNode(), getShuffleScalarElt(), llvm::BuildVectorSDNode::getSplatValue(), getTruncatedArgReg(), llvm::SelectionDAG::getVectorShuffle(), getVShiftImm(), getVZextMovL(), InferPointerInfo(), InsertSubVector(), isAbsolute(), isADDADDMUL(), isAndOrOfSetCCs(), llvm::SelectionDAG::isBaseWithConstantOffset(), isBSwapHWordElement(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), llvm::ISD::isBuildVectorOfConstantSDNodes(), isCalleeLoad(), llvm::SelectionDAG::isConsecutiveLoad(), isConsecutiveLSLoc(), llvm::BuildVectorSDNode::isConstant(), llvm::BuildVectorSDNode::isConstantSplat(), llvm::AArch64TargetLowering::isDesirableToCommuteWithShift(), isEssentiallyExtractSubvector(), isFloatingPointZero(), isHorizontalBinOp(), llvm::SelectionDAG::isKnownNeverZero(), isLoadIncOrDecStore(), isMemSrcFromString(), IsMulWideOperandDemotable(), isNegatibleForFree(), llvm::ISD::isScalarToVector(), isSetCC(), isSetCCOrZExtSetCC(), isTruncWithZeroHighBitsInput(), isXor1OfSetCC(), isZeroShuffle(), llvm::XCoreTargetLowering::isZExtFree(), llvm::ARMTargetLowering::isZExtFree(), llvm::AArch64TargetLowering::isZExtFree(), LookThroughSetCC(), Lower256IntArith(), Lower256IntVSETCC(), LowerADDC_ADDE_SUBC_SUBE(), llvm::TargetLowering::LowerAsmOperandForConstraint(), LowerAVXExtend(), LowerBuildVectorv4x32(), LowerCONCAT_VECTORS(), lowerDSPIntr(), LowerF128Load(), LowerF128Store(), LowerFABSorFNEG(), LowerFNEGorFABS(), lowerFP_TO_SINT_STORE(), lowerIntegerElementInsertionVectorShuffle(), llvm::R600TargetLowering::LowerOperation(), llvm::MipsSETargetLowering::LowerOperation(), llvm::SparcTargetLowering::LowerOperation(), llvm::MSP430TargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), llvm::HexagonTargetLowering::LowerOperation(), llvm::XCoreTargetLowering::LowerOperation(), llvm::AMDGPUTargetLowering::LowerOperation(), llvm::SystemZTargetLowering::LowerOperation(), llvm::AArch64TargetLowering::LowerOperation(), llvm::MipsTargetLowering::LowerOperation(), llvm::ARMTargetLowering::LowerOperation(), llvm::PPCTargetLowering::LowerOperation(), llvm::NVPTXTargetLowering::LowerOperation(), LowerScalarImmediateShift(), LowerScalarVariableShift(), llvm::MSP430TargetLowering::LowerSETCC(), LowerShift(), LowerShiftParts(), llvm::MSP430TargetLowering::LowerShifts(), LowerUMULO_SMULO(), lowerV4F32VectorShuffle(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLEv16i16(), LowerVECTOR_SHUFFLEv16i8(), LowerVECTOR_SHUFFLEv32i8(), LowerVECTOR_SHUFFLEv8i16(), LowerVectorAllZeroTest(), LowerVectorBroadcast(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), LowerVectorIntExtend(), lowerVectorShuffle(), LowerVSETCC(), LowerXALUO(), LowerXOR(), matchAddSub(), MatchingStackOffset(), MatchRotateHalf(), matchRotateSub(), MayFoldVectorLoad(), MoveBelowOrigChain(), NormalizeBuildVector(), OptimizeConditionalInDecrement(), performADDCombine(), PerformADDCombineWithOperands(), performAddSubLongCombine(), performANDCombine(), PerformANDCombine(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), PerformBFICombine(), performBRCONDCombine(), PerformBUILD_VECTORCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), PerformCMOVCombine(), performCONDCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performExtendCombine(), PerformExtendCombine(), PerformFMACombine(), performIntegerAbsCombine(), PerformISDSETCCCombine(), performORCombine(), PerformORCombine(), PerformOrCombine(), performSELECTCombine(), performSelectCombine(), PerformSELECTCombine(), PerformShiftCombine(), PerformSHLCombine(), PerformShuffleCombine(), PerformShuffleCombine256(), PerformSIGN_EXTEND_INREGCombine(), PerformSINT_TO_FPCombine(), PerformSubCombine(), PerformTargetShuffleCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), PerformVMOVDRRCombine(), PerformVMOVRRDCombine(), PerformVMULCombine(), performVSELECTCombine(), performVSelectCombine(), PerformVZEXT_MOVLCombine(), performVZEXTCombine(), PerformZExtCombine(), reachesChainWithoutSideEffects(), llvm::AArch64TargetLowering::ReconstructShuffle(), ReorganizeVector(), replaceSplatVectorStore(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegReg(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), llvm::SelectionDAGISel::SelectCodeCommon(), selectMADD(), selectMSUB(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), TransformVSELECTtoBlendVECTOR_SHUFFLE(), tryCombineCRC32(), tryCombineFixedPointConvert(), tryCombineToBSL(), tryExtendDUPToExtractHigh(), tryLowerToSLI(), ValueHasExactlyOneBitSet(), WidenMaskArithmetic(), and XFormVExtractWithShuffleIntoLoad().

const SDValue & llvm::SDValue::getOperand

(

unsigned

i

)

const [inline]

Definition at line 912 of file SelectionDAGNodes.h.

References llvm::SDNode::getOperand().

Referenced by buildFromShuffleMostly(), CanFoldXORWithAllOnes(), CheckAndImm(), checkBoolTestSetCCCombine(), CheckChildInteger(), CheckChildSame(), CheckChildType(), checkHighLaneIndex(), CheckOrImm(), combineRedundantDWordShuffle(), combineRedundantHalfShuffle(), combineX86ShuffleChain(), combineX86ShufflesRecursively(), CompactSwizzlableVector(), llvm::SelectionDAG::computeKnownBits(), llvm::SparcTargetLowering::computeKnownBitsForTargetNode(), llvm::AMDGPUTargetLowering::computeKnownBitsForTargetNode(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), llvm::PPCTargetLowering::computeKnownBitsForTargetNode(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::AMDGPUTargetLowering::ComputeNumSignBitsForTargetNode(), ConvertSelectToConcatVector(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), createCMovFP(), createFPCmp(), emitComparison(), FindBaseOffset(), findEXTRHalf(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), FoldOperand(), GenerateTBL(), getAArch64XALUOOp(), getAltivecCompareInfo(), getAtomicLoadArithTargetConstant(), getBuildPairElt(), getExtendTypeForNode(), getMOVHighToLow(), getMOVLowToHigh(), getMOVLP(), GetNegatedExpression(), llvm::SelectionDAG::getNode(), getShuffleScalarElt(), getTruncatedArgReg(), getUsefulBitsFromAndWithImmediate(), getUsefulBitsFromBFM(), getUsefulBitsFromOrWithShiftedReg(), getUsefulBitsFromUBFM(), getVShiftImm(), getVZextMovL(), InferPointerInfo(), llvm::SelectionDAG::InferPtrAlignment(), isAbsolute(), isADDADDMUL(), isAndOrOfSetCCs(), llvm::SelectionDAG::isBaseWithConstantOffset(), isBitfieldExtractOpFromAnd(), isBitfieldExtractOpFromShr(), isBitfieldPositioningOp(), isBSwapHWordElement(), isCalleeLoad(), llvm::SelectionDAG::isConsecutiveLoad(), isConsecutiveLSLoc(), isConstVecPow2(), isEssentiallyExtractSubvector(), isFloatingPointZero(), isHorizontalBinOp(), llvm::SelectionDAG::isKnownNeverZero(), isLoadIncOrDecStore(), isMemSrcFromString(), IsMulWideOperandDemotable(), isNegatibleForFree(), isSetCC(), isSeveralBitsExtractOpFromShr(), isSimpleShift(), isTruncWithZeroHighBitsInput(), isXor1OfSetCC(), isZeroShuffle(), LookThroughSetCC(), Lower256IntArith(), Lower256IntVSETCC(), LowerADDC_ADDE_SUBC_SUBE(), LowerADJUST_TRAMPOLINE(), llvm::TargetLowering::LowerAsmOperandForConstraint(), LowerAsSplatVectorLoad(), llvm::HexagonTargetLowering::LowerATOMIC_FENCE(), LowerATOMIC_FENCE(), LowerAVXCONCAT_VECTORS(), LowerBITCAST(), llvm::MSP430TargetLowering::LowerBR_CC(), LowerBR_CC(), llvm::HexagonTargetLowering::LowerBR_JT(), LowerBuildVectorv16i8(), LowerBuildVectorv4x32(), LowerBuildVectorv8i16(), llvm::SparcTargetLowering::LowerCall_64(), LowerCMP_SWAP(), LowerCONCAT_VECTORS(), LowerCTLZ(), LowerCTLZ_ZERO_UNDEF(), LowerCTTZ(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerEH_RETURN(), LowerEXTRACT_SUBVECTOR(), LowerEXTRACT_VECTOR_ELT(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerF128_FPEXTEND(), LowerF128_FPROUND(), llvm::SparcTargetLowering::LowerF128Op(), LowerF64Op(), LowerFABSorFNEG(), LowerFCOPYSIGN(), lowerFCOPYSIGN32(), lowerFCOPYSIGN64(), LowerFGETSIGN(), LowerFNEGorFABS(), LowerFP_EXTEND(), LowerFP_TO_SINT(), lowerFP_TO_SINT_STORE(), LowerFP_TO_UINT(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), LowerFSINCOS(), LowerINSERT_VECTOR_ELT(), lowerIntegerElementInsertionVectorShuffle(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::AMDGPUTargetLowering::LowerIntrinsicIABS(), llvm::AMDGPUTargetLowering::LowerIntrinsicLRP(), LowerIntVSETCC_AVX512(), llvm::AMDGPUTargetLowering::LowerLOAD(), LowerMUL(), LowerMUL_LOHI(), llvm::R600TargetLowering::LowerOperation(), LowerPREFETCH(), llvm::MSP430TargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerReverse_VECTOR_SHUFFLEv16i8_v8i16(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerScalarVariableShift(), LowerSDIV(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::MSP430TargetLowering::LowerSELECT_CC(), LowerSELECT_CC(), llvm::MSP430TargetLowering::LowerSETCC(), LowerShift(), LowerShiftParts(), llvm::MSP430TargetLowering::LowerSIGN_EXTEND(), LowerSINT_TO_FP(), LowerUDIV(), LowerUINT_TO_FP(), LowerUMULO_SMULO(), lowerV4F32VectorShuffle(), LowerVACOPY(), llvm::MSP430TargetLowering::LowerVASTART(), llvm::HexagonTargetLowering::LowerVASTART(), LowerVASTART(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLEv8i16(), LowerVECTOR_SHUFFLEv8i8(), LowerVectorBroadcast(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), LowerVectorIntExtend(), lowerVectorShuffle(), LowerVSELECTtoBlend(), LowerVSETCC(), LowerXOR(), LowerZERO_EXTEND(), matchAddSub(), MatchingStackOffset(), matchIntegerMINMAX(), MatchRotateHalf(), matchRotateSub(), MayFoldVectorLoad(), MoveBelowOrigChain(), NormalizeBuildVector(), NormalizeVectorShuffle(), OptimizeConditionalInDecrement(), partitionShuffleOfConcats(), performADDCombine(), PerformADDCombineWithOperands(), performAddSubLongCombine(), performANDCombine(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), PerformBFICombine(), performBRCONDCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), PerformCMOVCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformExtendCombine(), PerformFMACombine(), performIntegerAbsCombine(), PerformINTRINSIC_WO_CHAINCombine(), PerformISDSETCCCombine(), performORCombine(), PerformORCombine(), PerformOrCombine(), performSELECTCombine(), performSelectCombine(), PerformSELECTCombine(), PerformShiftCombine(), PerformSHLCombine(), PerformShuffleCombine(), PerformShuffleCombine256(), PerformSIGN_EXTEND_INREGCombine(), PerformSTORECombine(), PerformSubCombine(), PerformTargetShuffleCombine(), PerformVDIVCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), PerformVMOVDRRCombine(), PerformVMOVRRDCombine(), performVSELECTCombine(), performVSelectCombine(), PerformVZEXT_MOVLCombine(), performVZEXTCombine(), PerformZExtCombine(), reachesChainWithoutSideEffects(), llvm::AArch64TargetLowering::ReconstructShuffle(), ReorganizeVector(), replaceSplatVectorStore(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegReg(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), TransformVSELECTtoBlendVECTOR_SHUFFLE(), tryCombineCRC32(), tryCombineFixedPointConvert(), tryExtendDUPToExtractHigh(), tryFormConcatFromShuffle(), tryLowerToSLI(), llvm::TargetLowering::verifyReturnAddressArgumentIsConstant(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), and XFormVExtractWithShuffleIntoLoad().

unsigned llvm::SDValue::getResNo

(

)

const [inline]

get the index which selects a specific result in the SDNode

Definition at line 129 of file SelectionDAGNodes.h.

Referenced by llvm::DOTGraphTraits< SelectionDAG * >::addCustomGraphFeatures(), checkBoolTestSetCCCombine(), CheckForPhysRegDependency(), CombineBaseUpdate(), CombineVLDDUP(), llvm::SelectionDAG::computeKnownBits(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), DumpNodesr(), ExtendUsesToFormExtLoad(), getBuildPairElt(), llvm::DenseMapInfo< SDValue >::getHashValue(), llvm::SDUse::getResNo(), isLoadIncOrDecStore(), isX86LogicalCmp(), PerformEXTRACT_VECTOR_ELTCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), PerformVMOVDRRCombine(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), llvm::SelectionDAG::ReplaceAllUsesOfValuesWith(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::SelectionDAGBuilder::resolveDanglingDebugInfo(), llvm::ResourcePriorityQueue::scheduledNode(), selectMADD(), selectMSUB(), and llvm::SelectionDAG::TransferDbgValues().

unsigned llvm::SDValue::getScalarValueSizeInBits

(

)

const [inline]

Definition at line 174 of file SelectionDAGNodes.h.

References llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), and getValueType().

MVT llvm::SDValue::getSimpleValueType

(

)

const [inline]

Return the simple ValueType of the referenced return value.

Definition at line 164 of file SelectionDAGNodes.h.

References llvm::EVT::getSimpleVT(), and getValueType().

Referenced by buildFromShuffleMostly(), ChangeVSETULTtoVSETULE(), combineX86ShuffleChain(), combineX86ShufflesRecursively(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), getExtractVEXTRACTImmediate(), getGatherNode(), getLegalSplat(), getMOVDDup(), getMOVHighToLow(), getMOVLowToHigh(), getMOVLP(), llvm::SelectionDAG::getNode(), getPrefetchNode(), getPSHUFB(), getPSHUFShuffleMask(), getScatterNode(), getShuffleScalarElt(), getShuffleVectorZeroOrUndef(), getTargetVShiftByConstNode(), getUnderlyingExtractedFromVec(), isHorizontalBinOp(), Lower256IntArith(), Lower256IntVSETCC(), LowerADD(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerBITCAST(), LowerBuildVectorv4x32(), LowerCMP_SWAP(), LowerCONCAT_VECTORS(), LowerCTLZ(), LowerCTLZ_ZERO_UNDEF(), LowerCTTZ(), LowerExtendedLoad(), LowerEXTRACT_SUBVECTOR(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerFABSorFNEG(), LowerFCOPYSIGN(), LowerFGETSIGN(), LowerFP_EXTEND(), lowerIntegerElementInsertionVectorShuffle(), LowerINTRINSIC_WO_CHAIN(), LowerIntVSETCC_AVX512(), LowerMUL(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerScalarVariableShift(), LowerShift(), LowerShiftParts(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), LowerSUB(), lowerV16I8VectorShuffle(), lowerV2F64VectorShuffle(), lowerV2I64VectorShuffle(), lowerV4F32VectorShuffle(), lowerV4F64VectorShuffle(), lowerV4I32VectorShuffle(), lowerV4I64VectorShuffle(), lowerV8I16BasicBlendVectorShuffle(), lowerV8I16SingleInputVectorShuffle(), lowerV8I16VectorShuffle(), LowerVectorBroadcast(), LowerVectorIntExtend(), lowerVectorShuffle(), LowerVSELECTtoBlend(), LowerVSETCC(), LowerZERO_EXTEND(), LowerZERO_EXTEND_AVX512(), NarrowVectorLoadToElement(), NormalizeVectorShuffle(), llvm::R600TargetLowering::PerformDAGCombine(), PerformTargetShuffleCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PromoteSplati8i16(), llvm::TargetLowering::SimplifySetCC(), splitAndLower256BitVectorShuffle(), and tryExtendDUPToExtractHigh().

SDValue llvm::SDValue::getValue

(

unsigned

R

)

const [inline]

Definition at line 152 of file SelectionDAGNodes.h.

References Node, and SDValue().

Referenced by llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemcmp(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), Expand64BitShift(), ExpandBITCAST(), llvm::TargetLowering::expandMUL(), ExpandUnalignedLoad(), ExpandUnalignedStore(), getAArch64XALUOOp(), getBoundedStrlen(), getMemCmpLoad(), getMemmoveLoadsAndStores(), llvm::MipsTargetLowering::getOpndList(), getReadPerformanceCounter(), getReadTimeStampCounter(), GetTLSADDR(), isCalleeLoad(), isLoadIncOrDecStore(), LowerADDC_ADDE_SUBC_SUBE(), LowerATOMIC_STORE(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), LowerCallResult(), llvm::TargetLowering::LowerCallTo(), LowerCMP_SWAP(), LowerCTLZ(), LowerCTTZ(), LowerDYNAMIC_STACKALLOC(), LowerExtendedLoad(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerINTRINSIC_W_CHAIN(), llvm::AMDGPUTargetLowering::LowerLOAD(), llvm::MipsTargetLowering::lowerLOAD(), llvm::MipsTargetLowering::LowerOperationWrapper(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), LowerToTLSGeneralDynamicModel32(), LowerToTLSLocalDynamicModel(), LowerVAARG(), llvm::PPCTargetLowering::PerformDAGCombine(), performDivRemCombine(), performIntToFpCombine(), PerformLOADCombine(), PerformSINT_TO_FPCombine(), performSTORECombine(), PerformSTORECombine(), PerformVMOVRRDCombine(), PrepareCall(), PrepareTailCall(), ReplaceATOMIC_LOAD(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::R600TargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), ReplaceREADCYCLECOUNTER(), replaceSplatVectorStore(), llvm::AMDGPUTargetLowering::ScalarizeVectorLoad(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), and llvm::SelectionDAGBuilder::visitJumpTable().

unsigned llvm::SDValue::getValueSizeInBits

(

)

const [inline]

getValueSizeInBits - Returns the size of the value in bits.

Definition at line 170 of file SelectionDAGNodes.h.

References llvm::EVT::getSizeInBits(), and getValueType().

Referenced by llvm::SelectionDAGISel::CheckAndMask(), CheckForMaskedLoad(), llvm::SelectionDAGISel::CheckOrMask(), isTruncateOf(), isTruncWithZeroHighBitsInput(), lowerFCOPYSIGN64(), lowerFP_TO_SINT_STORE(), PerformBTCombine(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifySetCC(), and VerifySDNode().

EVT llvm::SDValue::getValueType

(

)

const [inline]

getValueType - Return the ValueType of the referenced return value.

Definition at line 906 of file SelectionDAGNodes.h.

References llvm::SDNode::getValueType().

Referenced by AddCombineTo64bitMLAL(), AddCombineToVPADDL(), llvm::TargetLowering::BuildExactSDIV(), buildFromShuffleMostly(), BuildIntrinsicOp(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::BuildUDIV(), CalculateTailCallArgDest(), canChangeToInt(), CheckForMaskedLoad(), CheckType(), CMPEQCombine(), CombineBaseUpdate(), combineRedundantDWordShuffle(), CompactSwizzlableVector(), llvm::SelectionDAG::computeKnownBits(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::SelectionDAG::ComputeNumSignBits(), countOperands(), createCMovFP(), createFPCmp(), createLoadLR(), createStoreLR(), emitCLC(), EmitCMP(), emitComparison(), emitMemMem(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrlen(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrnlen(), EmitVectorComparison(), ExpandBITCAST(), expandExp(), expandExp2(), expandf64Toi32(), llvm::TargetLowering::expandFP_TO_SINT(), ExpandHorizontalBinOp(), expandLog(), expandLog10(), expandLog2(), expandPow(), ExpandPowI(), ExpandUnalignedLoad(), ExpandUnalignedStore(), ExtendUsesToFormExtLoad(), Extract128BitVector(), Extract256BitVector(), ExtractSubVector(), llvm::SelectionDAG::ExtractVectorElements(), FindCallSeqStart(), findChainOperand(), findNonImmUse(), FoldMaskAndShiftToScale(), llvm::SelectionDAG::FoldSetCC(), GeneratePerfectShuffle(), GenerateTBL(), getAArch64Cmp(), getAArch64XALUOOp(), getAbsolute(), llvm::SelectionDAG::getAnyExtendVectorInReg(), llvm::SelectionDAG::getAnyExtOrTrunc(), llvm::SelectionDAG::getAtomic(), llvm::SelectionDAG::getAtomicCmpSwap(), llvm::SelectionDAG::getBoolExtOrTrunc(), getBoundedStrlen(), getCopyFromParts(), getCopyFromPartsVector(), getCopyToParts(), getCopyToPartsVector(), llvm::SelectionDAG::getCopyToReg(), llvm::DOTGraphTraits< SelectionDAG * >::getEdgeAttributes(), getExtendTypeForNode(), getExtFactor(), llvm::SelectionDAG::getExtLoad(), getFRAMEADDR(), getGatherNode(), llvm::SelectionDAG::getIndexedLoad(), llvm::SelectionDAG::getIndexedStore(), getInputChainForNode(), getLeftShift(), llvm::SelectionDAG::getLoad(), getMemBasePlusOffset(), llvm::SelectionDAG::getMemset(), getMemsetStores(), GetNegatedExpression(), llvm::SelectionDAG::getNode(), getNumOperandsNoGlue(), getScalarValueSizeInBits(), llvm::SelectionDAG::getSelect(), llvm::SelectionDAG::getSelectCC(), llvm::SelectionDAG::getSetCC(), llvm::SelectionDAG::getSExtOrTrunc(), llvm::SelectionDAG::getShiftAmountOperand(), getShuffleScalarElt(), llvm::SelectionDAG::getSignExtendVectorInReg(), getSimpleValueType(), llvm::SelectionDAG::getStore(), getTargetShuffleMask(), getTargetVShiftNode(), llvm::SelectionDAG::getTruncStore(), getUsefulBits(), getValueSizeInBits(), llvm::SDUse::getValueType(), getVectorMaskingNode(), llvm::SelectionDAG::getVectorShuffle(), getVShift(), getVZextMovL(), llvm::SelectionDAG::getZeroExtendInReg(), llvm::SelectionDAG::getZeroExtendVectorInReg(), llvm::SelectionDAG::getZExtOrTrunc(), HandleMergeInputChains(), Insert128BitVector(), Insert256BitVector(), InsertSubVector(), isBitfieldPositioningOp(), IsChainDependent(), isConditionalZeroOrAllOnes(), isConstOrConstSplat(), isConstVecPow2(), isI24(), IsMulWideOperandDemotable(), isNegatibleForFree(), isSimpleShift(), isTruncateOf(), isU24(), llvm::XCoreTargetLowering::isZExtFree(), llvm::AMDGPUTargetLowering::isZExtFree(), llvm::MSP430TargetLowering::isZExtFree(), llvm::ARMTargetLowering::isZExtFree(), llvm::AArch64TargetLowering::isZExtFree(), llvm::TargetLoweringBase::isZExtFree(), LowerADDC_ADDE_SUBC_SUBE(), llvm::SparcTargetLowering::LowerAsmOperandForConstraint(), llvm::SystemZTargetLowering::LowerAsmOperandForConstraint(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), llvm::PPCTargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), LowerAsSplatVectorLoad(), LowerBITCAST(), llvm::MSP430TargetLowering::LowerBR_CC(), LowerBR_CC(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::TargetLowering::LowerCallTo(), LowerCONCAT_VECTORS(), llvm::HexagonTargetLowering::LowerConstantPool(), LowerConstantPool(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), lowerDSPIntr(), LowerExtendedLoad(), LowerEXTRACT_VECTOR_ELT(), LowerF128_FPEXTEND(), LowerF128_FPROUND(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Compare(), LowerF128Load(), llvm::SparcTargetLowering::LowerF128Op(), LowerF128Store(), LowerF64Op(), lowerFCOPYSIGN32(), lowerFCOPYSIGN64(), LowerFNEGorFABS(), llvm::SITargetLowering::LowerFormalArguments(), LowerFP_TO_SINT(), LowerFP_TO_UINT(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), LowerFSINCOS(), llvm::HexagonTargetLowering::LowerINLINEASM(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::AMDGPUTargetLowering::LowerIntrinsicIABS(), llvm::AMDGPUTargetLowering::LowerIntrinsicLRP(), LowerIntVSETCC_AVX512(), LowerLabelRef(), llvm::AMDGPUTargetLowering::LowerLOAD(), llvm::MipsTargetLowering::lowerLOAD(), LowerMUL(), LowerMUL_LOHI(), llvm::R600TargetLowering::LowerOperation(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), LowerReverse_VECTOR_SHUFFLEv16i8_v8i16(), LowerSCALAR_TO_VECTOR(), LowerScalarVariableShift(), LowerSDIV(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::MSP430TargetLowering::LowerSELECT_CC(), LowerSELECT_CC(), llvm::MSP430TargetLowering::LowerSETCC(), LowerShift(), llvm::MSP430TargetLowering::LowerShifts(), llvm::MSP430TargetLowering::LowerSIGN_EXTEND(), LowerSINT_TO_FP(), llvm::AMDGPUTargetLowering::LowerSTORE(), LowerUDIV(), LowerUINT_TO_FP(), LowerUMULO_SMULO(), lowerUnalignedIntStore(), LowerVAARG(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLEv16i8(), LowerVectorAllZeroTest(), LowerVectorBroadcast(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), LowerVSETCC(), LowerXALUO(), LowerXOR(), llvm::SparcTargetLowering::makeHiLoPair(), llvm::TargetLowering::makeLibCall(), MatchingStackOffset(), narrowIfNeeded(), NarrowVector(), NormalizeBuildVector(), WidenVector::operator()(), OptimizeConditionalInDecrement(), partitionShuffleOfConcats(), PerformADDCombineWithOperands(), PerformANDCombine(), PerformARMBUILD_VECTORCombine(), performBRCONDCombine(), PerformCMOVCombine(), performConcatVectorsCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformExtendCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformINTRINSIC_WO_CHAINCombine(), PerformIntrinsicCombine(), performIntToFpCombine(), PerformISDSETCCCombine(), PerformLOADCombine(), performNEONPostLDSTCombine(), PerformOrCombine(), performSELECTCombine(), performSelectCombine(), PerformSELECTCombine(), performSetccAddFolding(), PerformSHLCombine(), PerformShuffleCombine(), PerformSIGN_EXTEND_INREGCombine(), performSTORECombine(), PerformSTORECombine(), PerformSubCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), performVSelectCombine(), PerformVZEXT_MOVLCombine(), PrepareCall(), printrWithDepthHelper(), llvm::AArch64TargetLowering::ReconstructShuffle(), ReorganizeVector(), ReplaceBITCASTResults(), llvm::R600TargetLowering::ReplaceNodeResults(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), replaceSplatVectorStore(), llvm::DAGTypeLegalizer::run(), llvm::AMDGPUTargetLowering::ScalarizeVectorLoad(), llvm::AMDGPUTargetLowering::ScalarizeVectorStore(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), selectCCOpsAreFMaxCompatible(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::SelectionDAG::setRoot(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(), ShrinkLoadReplaceStoreWithStore(), llvm::SelectionDAG::SignBitIsZero(), llvm::TargetLowering::SimplifyDemandedBits(), simplifyI24(), llvm::TargetLowering::SimplifySetCC(), llvm::TargetLowering::softenSetCCOperands(), llvm::SelectionDAG::SplitVector(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), llvm::AMDGPUTargetLowering::SplitVectorStore(), TranslateX86CC(), tryCombineFixedPointConvert(), tryCombineLongOpWithDup(), tryFormConcatFromShuffle(), llvm::SelectionDAG::UnrollVectorOp(), ValueHasExactlyOneBitSet(), VerifySDNode(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), llvm::SelectionDAGBuilder::visitSwitchCase(), WidenVector(), llvm::SparcTargetLowering::withTargetFlags(), and XFormVExtractWithShuffleIntoLoad().

bool llvm::SDValue::hasOneUse

(

)

const [inline]

hasOneUse - Return true if there is exactly one node using value ResNo of Node.

Definition at line 933 of file SelectionDAGNodes.h.

References llvm::SDNode::hasNUsesOfValue().

Referenced by combineRedundantDWordShuffle(), combineRedundantHalfShuffle(), combineX86ShufflesRecursively(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), getAtomicLoadArithTargetConstant(), GetNegatedExpression(), isADDADDMUL(), isAndOrOfSetCCs(), isCalleeLoad(), isLoadIncOrDecStore(), isNegatibleForFree(), llvm::SelectionDAGISel::IsProfitableToFold(), isXor1OfSetCC(), LowerEXTRACT_VECTOR_ELT_SSE4(), llvm::MSP430TargetLowering::LowerSETCC(), LowerVectorBroadcast(), LowerVectorIntExtend(), MayFoldIntoStore(), MayFoldLoad(), MayFoldVectorLoad(), OptimizeConditionalInDecrement(), PerformBTCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformEXTRACT_VECTOR_ELTCombine(), performIntToFpCombine(), PerformISDSETCCCombine(), PerformORCombine(), PerformOrCombine(), PerformShuffleCombine(), PerformSINT_TO_FPCombine(), PerformSTORECombine(), PerformTargetShuffleCombine(), PerformZExtCombine(), selectMADD(), selectMSUB(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), and XFormVExtractWithShuffleIntoLoad().

bool llvm::SDValue::isMachineOpcode

(

)

const [inline]

Definition at line 924 of file SelectionDAGNodes.h.

References llvm::SDNode::isMachineOpcode().

Referenced by FoldOperand().

bool SDValue::isOperandOf

(

SDNode *

N

)

const

isOperand - Return true if this node is an operand of N.

Definition at line 6334 of file SelectionDAG.cpp.

References llvm::SDNode::getNumOperands(), and llvm::SDNode::getOperand().

Referenced by isCalleeLoad().

bool llvm::SDValue::isTargetMemoryOpcode

(

)

const [inline]

Definition at line 921 of file SelectionDAGNodes.h.

References llvm::SDNode::isTargetMemoryOpcode().

bool llvm::SDValue::isTargetOpcode

(

)

const [inline]

Definition at line 918 of file SelectionDAGNodes.h.

References llvm::SDNode::isTargetOpcode().

LLVM_EXPLICIT llvm::SDValue::operator bool

(

)

const [inline]

Definition at line 148 of file SelectionDAGNodes.h.

References Node.

bool llvm::SDValue::operator!=

(

const SDValue &

O

)

const [inline]

Definition at line 142 of file SelectionDAGNodes.h.

References operator==().

SDNode* llvm::SDValue::operator->

(

)

const [inline]

Definition at line 137 of file SelectionDAGNodes.h.

References Node.

bool llvm::SDValue::operator<

(

const SDValue &

O

)

const [inline]

Definition at line 145 of file SelectionDAGNodes.h.

References Node.

bool llvm::SDValue::operator==

(

const SDValue &

O

)

const [inline]

Definition at line 139 of file SelectionDAGNodes.h.

References Node.

Referenced by operator!=().

bool SDValue::reachesChainWithoutSideEffects	(	SDValue	Dest,
		unsigned	Depth = 2
	)		const

reachesChainWithoutSideEffects - Return true if this operand (which must be a chain) reaches the specified operand without crossing any side-effecting instructions. In practice, this looks through token factors and non-volatile loads. In order to remain efficient, this only looks a couple of nodes in, it does not do an exhaustive search.

reachesChainWithoutSideEffects - Return true if this operand (which must be a chain) reaches the specified operand without crossing any side-effecting instructions on any chain path. In practice, this looks through token factors and non-volatile loads. In order to remain efficient, this only looks a couple of nodes in, it does not do an exhaustive search.

Definition at line 6353 of file SelectionDAG.cpp.

References getNumOperands(), getOpcode(), getOperand(), and llvm::ISD::TokenFactor.

void llvm::SDValue::setNode

(

SDNode *

N

)

[inline]

set the SDNode

Definition at line 135 of file SelectionDAGNodes.h.

References Node.

Referenced by PrepareCall().

bool llvm::SDValue::use_empty

(

)

const [inline]

use_empty - Return true if there are no nodes using value ResNo of Node.

Definition at line 930 of file SelectionDAGNodes.h.

References llvm::SDNode::hasAnyUseOfValue().

Referenced by PerformADCCombine(), PerformCMOVCombine(), selectMADD(), and selectMSUB().

---

Friends And Related Function Documentation

friend struct DenseMapInfo< SDValue > [friend]

Definition at line 120 of file SelectionDAGNodes.h.

---

The documentation for this class was generated from the following files:

• SelectionDAGNodes.h
• SelectionDAG.cpp