LLVM API Documentation

LiveIntervalUnion.h
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00001 //===-- LiveIntervalUnion.h - Live interval union data struct --*- C++ -*--===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // LiveIntervalUnion is a union of live segments across multiple live virtual
00011 // registers. This may be used during coalescing to represent a congruence
00012 // class, or during register allocation to model liveness of a physical
00013 // register.
00014 //
00015 //===----------------------------------------------------------------------===//
00016 
00017 #ifndef LLVM_CODEGEN_LIVEINTERVALUNION_H
00018 #define LLVM_CODEGEN_LIVEINTERVALUNION_H
00019 
00020 #include "llvm/ADT/IntervalMap.h"
00021 #include "llvm/CodeGen/LiveInterval.h"
00022 
00023 namespace llvm {
00024 
00025 class TargetRegisterInfo;
00026 
00027 #ifndef NDEBUG
00028 // forward declaration
00029 template <unsigned Element> class SparseBitVector;
00030 typedef SparseBitVector<128> LiveVirtRegBitSet;
00031 #endif
00032 
00033 /// Compare a live virtual register segment to a LiveIntervalUnion segment.
00034 inline bool
00035 overlap(const LiveInterval::Segment &VRSeg,
00036         const IntervalMap<SlotIndex, LiveInterval*>::const_iterator &LUSeg) {
00037   return VRSeg.start < LUSeg.stop() && LUSeg.start() < VRSeg.end;
00038 }
00039 
00040 /// Union of live intervals that are strong candidates for coalescing into a
00041 /// single register (either physical or virtual depending on the context).  We
00042 /// expect the constituent live intervals to be disjoint, although we may
00043 /// eventually make exceptions to handle value-based interference.
00044 class LiveIntervalUnion {
00045   // A set of live virtual register segments that supports fast insertion,
00046   // intersection, and removal.
00047   // Mapping SlotIndex intervals to virtual register numbers.
00048   typedef IntervalMap<SlotIndex, LiveInterval*> LiveSegments;
00049 
00050 public:
00051   // SegmentIter can advance to the next segment ordered by starting position
00052   // which may belong to a different live virtual register. We also must be able
00053   // to reach the current segment's containing virtual register.
00054   typedef LiveSegments::iterator SegmentIter;
00055 
00056   // LiveIntervalUnions share an external allocator.
00057   typedef LiveSegments::Allocator Allocator;
00058 
00059   class Query;
00060 
00061 private:
00062   unsigned Tag;           // unique tag for current contents.
00063   LiveSegments Segments;  // union of virtual reg segments
00064 
00065 public:
00066   explicit LiveIntervalUnion(Allocator &a) : Tag(0), Segments(a) {}
00067 
00068   // Iterate over all segments in the union of live virtual registers ordered
00069   // by their starting position.
00070   SegmentIter begin() { return Segments.begin(); }
00071   SegmentIter end() { return Segments.end(); }
00072   SegmentIter find(SlotIndex x) { return Segments.find(x); }
00073   bool empty() const { return Segments.empty(); }
00074   SlotIndex startIndex() const { return Segments.start(); }
00075 
00076   // Provide public access to the underlying map to allow overlap iteration.
00077   typedef LiveSegments Map;
00078   const Map &getMap() { return Segments; }
00079 
00080   /// getTag - Return an opaque tag representing the current state of the union.
00081   unsigned getTag() const { return Tag; }
00082 
00083   /// changedSince - Return true if the union change since getTag returned tag.
00084   bool changedSince(unsigned tag) const { return tag != Tag; }
00085 
00086   // Add a live virtual register to this union and merge its segments.
00087   void unify(LiveInterval &VirtReg);
00088 
00089   // Remove a live virtual register's segments from this union.
00090   void extract(LiveInterval &VirtReg);
00091 
00092   // Remove all inserted virtual registers.
00093   void clear() { Segments.clear(); ++Tag; }
00094 
00095   // Print union, using TRI to translate register names
00096   void print(raw_ostream &OS, const TargetRegisterInfo *TRI) const;
00097 
00098 #ifndef NDEBUG
00099   // Verify the live intervals in this union and add them to the visited set.
00100   void verify(LiveVirtRegBitSet& VisitedVRegs);
00101 #endif
00102 
00103   /// Query interferences between a single live virtual register and a live
00104   /// interval union.
00105   class Query {
00106     LiveIntervalUnion *LiveUnion;
00107     LiveInterval *VirtReg;
00108     LiveInterval::iterator VirtRegI; // current position in VirtReg
00109     SegmentIter LiveUnionI;          // current position in LiveUnion
00110     SmallVector<LiveInterval*,4> InterferingVRegs;
00111     bool CheckedFirstInterference;
00112     bool SeenAllInterferences;
00113     bool SeenUnspillableVReg;
00114     unsigned Tag, UserTag;
00115 
00116   public:
00117     Query(): LiveUnion(), VirtReg(), Tag(0), UserTag(0) {}
00118 
00119     Query(LiveInterval *VReg, LiveIntervalUnion *LIU):
00120       LiveUnion(LIU), VirtReg(VReg), CheckedFirstInterference(false),
00121       SeenAllInterferences(false), SeenUnspillableVReg(false)
00122     {}
00123 
00124     void clear() {
00125       LiveUnion = nullptr;
00126       VirtReg = nullptr;
00127       InterferingVRegs.clear();
00128       CheckedFirstInterference = false;
00129       SeenAllInterferences = false;
00130       SeenUnspillableVReg = false;
00131       Tag = 0;
00132       UserTag = 0;
00133     }
00134 
00135     void init(unsigned UTag, LiveInterval *VReg, LiveIntervalUnion *LIU) {
00136       assert(VReg && LIU && "Invalid arguments");
00137       if (UserTag == UTag && VirtReg == VReg &&
00138           LiveUnion == LIU && !LIU->changedSince(Tag)) {
00139         // Retain cached results, e.g. firstInterference.
00140         return;
00141       }
00142       clear();
00143       LiveUnion = LIU;
00144       VirtReg = VReg;
00145       Tag = LIU->getTag();
00146       UserTag = UTag;
00147     }
00148 
00149     LiveInterval &virtReg() const {
00150       assert(VirtReg && "uninitialized");
00151       return *VirtReg;
00152     }
00153 
00154     // Does this live virtual register interfere with the union?
00155     bool checkInterference() { return collectInterferingVRegs(1); }
00156 
00157     // Count the virtual registers in this union that interfere with this
00158     // query's live virtual register, up to maxInterferingRegs.
00159     unsigned collectInterferingVRegs(unsigned MaxInterferingRegs = UINT_MAX);
00160 
00161     // Was this virtual register visited during collectInterferingVRegs?
00162     bool isSeenInterference(LiveInterval *VReg) const;
00163 
00164     // Did collectInterferingVRegs collect all interferences?
00165     bool seenAllInterferences() const { return SeenAllInterferences; }
00166 
00167     // Did collectInterferingVRegs encounter an unspillable vreg?
00168     bool seenUnspillableVReg() const { return SeenUnspillableVReg; }
00169 
00170     // Vector generated by collectInterferingVRegs.
00171     const SmallVectorImpl<LiveInterval*> &interferingVRegs() const {
00172       return InterferingVRegs;
00173     }
00174 
00175   private:
00176     Query(const Query&) LLVM_DELETED_FUNCTION;
00177     void operator=(const Query&) LLVM_DELETED_FUNCTION;
00178   };
00179 
00180   // Array of LiveIntervalUnions.
00181   class Array {
00182     unsigned Size;
00183     LiveIntervalUnion *LIUs;
00184   public:
00185     Array() : Size(0), LIUs(nullptr) {}
00186     ~Array() { clear(); }
00187 
00188     // Initialize the array to have Size entries.
00189     // Reuse an existing allocation if the size matches.
00190     void init(LiveIntervalUnion::Allocator&, unsigned Size);
00191 
00192     unsigned size() const { return Size; }
00193 
00194     void clear();
00195 
00196     LiveIntervalUnion& operator[](unsigned idx) {
00197       assert(idx <  Size && "idx out of bounds");
00198       return LIUs[idx];
00199     }
00200   };
00201 };
00202 
00203 } // end namespace llvm
00204 
00205 #endif // !defined(LLVM_CODEGEN_LIVEINTERVALUNION_H)