LLVM API Documentation
00001 //===-- MipsRegisterInfo.h - Mips Register Information Impl -----*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file contains the Mips implementation of the TargetRegisterInfo class. 00011 // 00012 //===----------------------------------------------------------------------===// 00013 00014 #ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H 00015 #define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H 00016 00017 #include "Mips.h" 00018 #include "llvm/Target/TargetRegisterInfo.h" 00019 00020 #define GET_REGINFO_HEADER 00021 #include "MipsGenRegisterInfo.inc" 00022 00023 namespace llvm { 00024 class MipsSubtarget; 00025 class Type; 00026 00027 class MipsRegisterInfo : public MipsGenRegisterInfo { 00028 protected: 00029 const MipsSubtarget &Subtarget; 00030 00031 public: 00032 MipsRegisterInfo(const MipsSubtarget &Subtarget); 00033 00034 /// getRegisterNumbering - Given the enum value for some register, e.g. 00035 /// Mips::RA, return the number that it corresponds to (e.g. 31). 00036 static unsigned getRegisterNumbering(unsigned RegEnum); 00037 00038 /// Get PIC indirect call register 00039 static unsigned getPICCallReg(); 00040 00041 /// Adjust the Mips stack frame. 00042 void adjustMipsStackFrame(MachineFunction &MF) const; 00043 00044 /// Code Generation virtual methods... 00045 const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF, 00046 unsigned Kind) const override; 00047 00048 unsigned getRegPressureLimit(const TargetRegisterClass *RC, 00049 MachineFunction &MF) const override; 00050 const MCPhysReg * 00051 getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override; 00052 const uint32_t *getCallPreservedMask(CallingConv::ID) const override; 00053 static const uint32_t *getMips16RetHelperMask(); 00054 00055 BitVector getReservedRegs(const MachineFunction &MF) const override; 00056 00057 bool requiresRegisterScavenging(const MachineFunction &MF) const override; 00058 00059 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override; 00060 00061 /// Stack Frame Processing Methods 00062 void eliminateFrameIndex(MachineBasicBlock::iterator II, 00063 int SPAdj, unsigned FIOperandNum, 00064 RegScavenger *RS = nullptr) const override; 00065 00066 void processFunctionBeforeFrameFinalized(MachineFunction &MF, 00067 RegScavenger *RS = nullptr) const; 00068 00069 /// Debug information queries. 00070 unsigned getFrameRegister(const MachineFunction &MF) const override; 00071 00072 /// \brief Return GPR register class. 00073 virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0; 00074 00075 private: 00076 virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo, 00077 int FrameIndex, uint64_t StackSize, 00078 int64_t SPOffset) const = 0; 00079 }; 00080 00081 } // end namespace llvm 00082 00083 #endif