LLVM API Documentation
| ARMBaseRegisterInfo(const ARMSubtarget &STI) | llvm::ARMBaseRegisterInfo | [explicit, protected] |
| avoidWriteAfterWrite(const TargetRegisterClass *RC) const override | llvm::ARMBaseRegisterInfo | |
| BasePtr | llvm::ARMBaseRegisterInfo | [protected] |
| cannotEliminateFrame(const MachineFunction &MF) const | llvm::ARMBaseRegisterInfo | |
| canRealignStack(const MachineFunction &MF) const | llvm::ARMBaseRegisterInfo | |
| eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override | llvm::ARMBaseRegisterInfo | |
| emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred=ARMCC::AL, unsigned PredReg=0, unsigned MIFlags=MachineInstr::NoFlags) const | llvm::ARMBaseRegisterInfo | [virtual] |
| FramePtr | llvm::ARMBaseRegisterInfo | [protected] |
| getBaseRegister() const | llvm::ARMBaseRegisterInfo | [inline] |
| getCalleeSavedRegs(const MachineFunction *MF=nullptr) const override | llvm::ARMBaseRegisterInfo | |
| getCallPreservedMask(CallingConv::ID) const override | llvm::ARMBaseRegisterInfo | |
| getCrossCopyRegClass(const TargetRegisterClass *RC) const override | llvm::ARMBaseRegisterInfo | |
| getFrameIndexInstrOffset(const MachineInstr *MI, int Idx) const override | llvm::ARMBaseRegisterInfo | |
| getFrameRegister(const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| getLargestLegalSuperClass(const TargetRegisterClass *RC) const override | llvm::ARMBaseRegisterInfo | |
| getNoPreservedMask() const | llvm::ARMBaseRegisterInfo | |
| getOpcode(int Op) const | llvm::ARMBaseRegisterInfo | [protected] |
| getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const override | llvm::ARMBaseRegisterInfo | |
| getRegAllocationHints(unsigned VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM) const override | llvm::ARMBaseRegisterInfo | |
| getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| getReservedRegs(const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| getThisReturnPreservedMask(CallingConv::ID) const | llvm::ARMBaseRegisterInfo | |
| hasBasePointer(const MachineFunction &MF) const | llvm::ARMBaseRegisterInfo | |
| isFrameOffsetLegal(const MachineInstr *MI, int64_t Offset) const override | llvm::ARMBaseRegisterInfo | |
| isLowRegister(unsigned Reg) const | llvm::ARMBaseRegisterInfo | |
| materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const override | llvm::ARMBaseRegisterInfo | |
| mayOverrideLocalAssignment() const override | llvm::ARMBaseRegisterInfo | |
| needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override | llvm::ARMBaseRegisterInfo | |
| needsStackRealignment(const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| requiresFrameIndexScavenging(const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| requiresRegisterScavenging(const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| requiresVirtualBaseRegisters(const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, int64_t Offset) const override | llvm::ARMBaseRegisterInfo | |
| shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC) const override | llvm::ARMBaseRegisterInfo | |
| STI | llvm::ARMBaseRegisterInfo | [protected] |
| trackLivenessAfterRegAlloc(const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| UpdateRegAllocHint(unsigned Reg, unsigned NewReg, MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo |