llvm::ARMBaseRegisterInfo Class Reference

#include <ARMBaseRegisterInfo.h>

Inheritance diagram for llvm::ARMBaseRegisterInfo:

Collaboration diagram for llvm::ARMBaseRegisterInfo:

List of all members.

Public Member Functions
const MCPhysReg *	getCalleeSavedRegs (const MachineFunction *MF=nullptr) const override
	Code Generation virtual methods...
const uint32_t *	getCallPreservedMask (CallingConv::ID) const override
const uint32_t *	getNoPreservedMask () const
const uint32_t *	getThisReturnPreservedMask (CallingConv::ID) const
BitVector	getReservedRegs (const MachineFunction &MF) const override
const TargetRegisterClass *	getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
const TargetRegisterClass *	getCrossCopyRegClass (const TargetRegisterClass *RC) const override
const TargetRegisterClass *	getLargestLegalSuperClass (const TargetRegisterClass *RC) const override
unsigned	getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const override
void	getRegAllocationHints (unsigned VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM) const override
void	UpdateRegAllocHint (unsigned Reg, unsigned NewReg, MachineFunction &MF) const override
bool	avoidWriteAfterWrite (const TargetRegisterClass *RC) const override
bool	hasBasePointer (const MachineFunction &MF) const
bool	canRealignStack (const MachineFunction &MF) const
bool	needsStackRealignment (const MachineFunction &MF) const override
int64_t	getFrameIndexInstrOffset (const MachineInstr *MI, int Idx) const override
bool	needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
void	materializeFrameBaseRegister (MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const override
void	resolveFrameIndex (MachineInstr &MI, unsigned BaseReg, int64_t Offset) const override
bool	isFrameOffsetLegal (const MachineInstr *MI, int64_t Offset) const override
bool	cannotEliminateFrame (const MachineFunction &MF) const
unsigned	getFrameRegister (const MachineFunction &MF) const override
unsigned	getBaseRegister () const
bool	isLowRegister (unsigned Reg) const
virtual void	emitLoadConstPool (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred=ARMCC::AL, unsigned PredReg=0, unsigned MIFlags=MachineInstr::NoFlags) const
bool	mayOverrideLocalAssignment () const override
	Code Generation virtual methods...
bool	requiresRegisterScavenging (const MachineFunction &MF) const override
bool	trackLivenessAfterRegAlloc (const MachineFunction &MF) const override
bool	requiresFrameIndexScavenging (const MachineFunction &MF) const override
bool	requiresVirtualBaseRegisters (const MachineFunction &MF) const override
void	eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
bool	shouldCoalesce (MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC) const override
	SrcRC and DstRC will be morphed into NewRC if this returns true.
Protected Member Functions
	ARMBaseRegisterInfo (const ARMSubtarget &STI)
unsigned	getOpcode (int Op) const
Protected Attributes
const ARMSubtarget &	STI
unsigned	FramePtr
	FramePtr - ARM physical register used as frame ptr.
unsigned	BasePtr

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Detailed Description

Definition at line 83 of file ARMBaseRegisterInfo.h.

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Constructor & Destructor Documentation

ARMBaseRegisterInfo::ARMBaseRegisterInfo

(

const ARMSubtarget &

STI

)

[explicit, protected]

Definition at line 48 of file ARMBaseRegisterInfo.cpp.

References FramePtr, llvm::ARMSubtarget::isTargetDarwin(), llvm::ARMSubtarget::isTargetMachO(), llvm::ARMSubtarget::isTargetWindows(), llvm::ARMSubtarget::isThumb(), llvm::ARMSubtarget::isThumb1Only(), R6, and STI.

---

Member Function Documentation

bool ARMBaseRegisterInfo::avoidWriteAfterWrite

(

const TargetRegisterClass *

RC

)

const [override]

Definition at line 289 of file ARMBaseRegisterInfo.cpp.

References llvm::TargetRegisterClass::getID(), llvm::ARMSubtarget::isLikeA9(), and STI.

bool ARMBaseRegisterInfo::cannotEliminateFrame

(

const MachineFunction &

MF

)

const

Definition at line 386 of file ARMBaseRegisterInfo.cpp.

References llvm::MachineFrameInfo::adjustsStack(), llvm::TargetOptions::DisableFramePointerElim(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getTarget(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::MachineFrameInfo::isFrameAddressTaken(), needsStackRealignment(), and llvm::TargetMachine::Options.

Referenced by llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan().

bool ARMBaseRegisterInfo::canRealignStack

(

const MachineFunction &

MF

)

const

Definition at line 342 of file ARMBaseRegisterInfo.cpp.

References BasePtr, llvm::MachineRegisterInfo::canReserveReg(), FramePtr, llvm::TargetSubtargetInfo::getFrameLowering(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getRegInfo(), llvm::TargetMachine::getSubtargetImpl(), llvm::MachineFunction::getTarget(), llvm::Function::hasFnAttribute(), llvm::TargetFrameLowering::hasReservedCallFrame(), and llvm::ARMFunctionInfo::isThumb1OnlyFunction().

Referenced by checkNumAlignedDPRCS2Regs(), needsFrameBaseReg(), and needsStackRealignment().

void ARMBaseRegisterInfo::eliminateFrameIndex	(	MachineBasicBlock::iterator	II,
		int	SPAdj,
		unsigned	FIOperandNum,
		RegScavenger *	RS = nullptr
	)		const [override]

Reimplemented in llvm::Thumb1RegisterInfo.

Definition at line 710 of file ARMBaseRegisterInfo.cpp.

References llvm::ARMII::AddrMode4, llvm::ARMII::AddrMode6, llvm::ARMII::AddrModeMask, llvm::ARMCC::AL, llvm::MachineOperand::ChangeToRegister(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::emitARMRegPlusImmediate(), llvm::emitT2RegPlusImmediate(), llvm::MachineInstr::findFirstPredOperandIdx(), llvm::ISD::FrameIndex, llvm::MachineInstr::getDebugLoc(), llvm::MachineInstr::getDesc(), llvm::MachineFunction::getFrameInfo(), llvm::TargetSubtargetInfo::getFrameLowering(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineFunction::getInfo(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::ARMFrameLowering::hasReservedCallFrame(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::MachineInstr::isDebugValue(), llvm::RegScavenger::isScavengingFrameIndex(), llvm::ARMFunctionInfo::isThumb1OnlyFunction(), llvm::ARMFunctionInfo::isThumb2Function(), llvm::ARMFunctionInfo::isThumbFunction(), llvm::AArch64CC::MI, llvm::ARMFrameLowering::ResolveFrameIndexReference(), llvm::rewriteARMFrameIndex(), llvm::rewriteT2FrameIndex(), TII, and llvm::MCInstrDesc::TSFlags.

void ARMBaseRegisterInfo::emitLoadConstPool	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator &	MBBI,
		DebugLoc	dl,
		unsigned	DestReg,
		unsigned	SubIdx,
		int	Val,
		ARMCC::CondCodes	Pred = ARMCC::AL,
		unsigned	PredReg = 0,
		unsigned	MIFlags = MachineInstr::NoFlags
	)		const [virtual]

emitLoadConstPool - Emits a load from constpool to materialize the specified immediate.

Reimplemented in llvm::Thumb1RegisterInfo, and llvm::Thumb2RegisterInfo.

Definition at line 406 of file ARMBaseRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::CallingConv::C, llvm::MCInstrInfo::get(), llvm::ConstantInt::get(), llvm::MachineFunction::getConstantPool(), llvm::MachineConstantPool::getConstantPoolIndex(), llvm::Function::getContext(), llvm::getDefRegState(), llvm::MachineFunction::getFunction(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::Type::getInt32Ty(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), llvm::MachineInstrBuilder::setMIFlags(), and TII.

Referenced by emitThumbRegPlusImmInReg().

unsigned llvm::ARMBaseRegisterInfo::getBaseRegister

(

)

const [inline]

Definition at line 162 of file ARMBaseRegisterInfo.h.

References BasePtr.

Referenced by llvm::Thumb1FrameLowering::emitPrologue(), llvm::ARMFrameLowering::emitPrologue(), llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::ARMFrameLowering::ResolveFrameIndexReference().

const MCPhysReg * ARMBaseRegisterInfo::getCalleeSavedRegs

(

const MachineFunction *

MF = nullptr

)

const [override]

Code Generation virtual methods...

Definition at line 62 of file ARMBaseRegisterInfo.cpp.

References F(), llvm::Function::getCallingConv(), llvm::Function::getFnAttribute(), llvm::MachineFunction::getFunction(), llvm::Attribute::getValueAsString(), llvm::CallingConv::GHC, llvm::Function::hasFnAttribute(), llvm::ARMSubtarget::isAAPCS_ABI(), llvm::ARMSubtarget::isMClass(), llvm::ARMSubtarget::isTargetIOS(), and STI.

Referenced by llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan().

const uint32_t * ARMBaseRegisterInfo::getCallPreservedMask

(

CallingConv::ID

CC

)

const [override]

Definition at line 94 of file ARMBaseRegisterInfo.cpp.

References llvm::CallingConv::GHC, llvm::ARMSubtarget::isAAPCS_ABI(), llvm::ARMSubtarget::isTargetIOS(), and STI.

const TargetRegisterClass * ARMBaseRegisterInfo::getCrossCopyRegClass

(

const TargetRegisterClass *

RC

)

const [override]

Definition at line 183 of file ARMBaseRegisterInfo.cpp.

int64_t ARMBaseRegisterInfo::getFrameIndexInstrOffset	(	const MachineInstr *	MI,
		int	Idx
	)		const [override]

Definition at line 452 of file ARMBaseRegisterInfo.cpp.

References llvm::ARMII::AddrMode2, llvm::ARMII::AddrMode3, llvm::ARMII::AddrMode5, llvm::ARMII::AddrMode_i12, llvm::ARMII::AddrModeMask, llvm::ARMII::AddrModeT1_s, llvm::ARMII::AddrModeT2_i12, llvm::ARMII::AddrModeT2_i8, llvm::ARM_AM::getAM2Offset(), llvm::ARM_AM::getAM2Op(), llvm::ARM_AM::getAM3Offset(), llvm::ARM_AM::getAM3Op(), llvm::ARM_AM::getAM5Offset(), llvm::ARM_AM::getAM5Op(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getImm(), llvm::MachineInstr::getOperand(), llvm_unreachable, llvm::ARM_AM::sub, and llvm::MCInstrDesc::TSFlags.

Referenced by isFrameOffsetLegal().

unsigned ARMBaseRegisterInfo::getFrameRegister

(

const MachineFunction &

MF

)

const [override]

Definition at line 395 of file ARMBaseRegisterInfo.cpp.

References FramePtr, llvm::TargetSubtargetInfo::getFrameLowering(), llvm::MachineFunction::getSubtarget(), and llvm::TargetFrameLowering::hasFP().

Referenced by llvm::Thumb1RegisterInfo::eliminateFrameIndex(), llvm::Thumb1FrameLowering::emitPrologue(), llvm::ARMFrameLowering::emitPrologue(), llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::ARMFrameLowering::ResolveFrameIndexReference().

const TargetRegisterClass * ARMBaseRegisterInfo::getLargestLegalSuperClass

(

const TargetRegisterClass *

RC

)

const [override]

Reimplemented in llvm::Thumb1RegisterInfo.

Definition at line 156 of file ARMBaseRegisterInfo.cpp.

References llvm::TargetRegisterClass::getID(), llvm::TargetRegisterClass::getSuperClasses(), and I.

const uint32_t * ARMBaseRegisterInfo::getNoPreservedMask

(

)

const

Definition at line 103 of file ARMBaseRegisterInfo.cpp.

unsigned llvm::ARMBaseRegisterInfo::getOpcode

(

int

Op

)

const [protected]

const TargetRegisterClass * ARMBaseRegisterInfo::getPointerRegClass	(	const MachineFunction &	MF,
		unsigned	Kind = 0
	)		const [override]

Reimplemented in llvm::Thumb1RegisterInfo.

Definition at line 177 of file ARMBaseRegisterInfo.cpp.

void ARMBaseRegisterInfo::getRegAllocationHints	(	unsigned	VirtReg,
		ArrayRef< MCPhysReg >	Order,
		SmallVectorImpl< MCPhysReg > &	Hints,
		const MachineFunction &	MF,
		const VirtRegMap *	VRM
	)		const [override]

Definition at line 219 of file ARMBaseRegisterInfo.cpp.

References llvm::ArrayRef< T >::begin(), llvm::ArrayRef< T >::end(), getPairedGPR(), llvm::VirtRegMap::getPhys(), llvm::MachineRegisterInfo::getRegAllocationHint(), llvm::MachineFunction::getRegInfo(), llvm::VirtRegMap::hasPhys(), Hint(), I, llvm::MachineRegisterInfo::isReserved(), llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::ARMRI::RegPairEven, llvm::ARMRI::RegPairOdd, and llvm::ArrayRef< T >::size().

unsigned ARMBaseRegisterInfo::getRegPressureLimit	(	const TargetRegisterClass *	RC,
		MachineFunction &	MF
	)		const [override]

Definition at line 190 of file ARMBaseRegisterInfo.cpp.

References llvm::TargetSubtargetInfo::getFrameLowering(), llvm::TargetRegisterClass::getID(), llvm::MachineFunction::getSubtarget(), llvm::TargetFrameLowering::hasFP(), llvm::ARMSubtarget::isR9Reserved(), and STI.

BitVector ARMBaseRegisterInfo::getReservedRegs

(

const MachineFunction &

MF

)

const [override]

Definition at line 125 of file ARMBaseRegisterInfo.cpp.

References BasePtr, llvm::TargetRegisterClass::begin(), llvm::TargetRegisterClass::end(), FramePtr, llvm::TargetSubtargetInfo::getFrameLowering(), llvm::MachineFunction::getSubtarget(), hasBasePointer(), llvm::ARMSubtarget::hasD16(), llvm::TargetFrameLowering::hasFP(), llvm::ARMSubtarget::hasVFP3(), I, llvm::ARMSubtarget::isR9Reserved(), llvm::MCRegisterInfo::DiffListIterator::isValid(), llvm::BitVector::set(), STI, and llvm::BitVector::test().

const uint32_t * ARMBaseRegisterInfo::getThisReturnPreservedMask

(

CallingConv::ID

CC

)

const

getThisReturnPreservedMask - Returns a call preserved mask specific to the case that 'returned' is on an i32 first argument if the calling convention is one that can (partially) model this attribute with a preserved mask (i.e. it is a calling convention that uses the same register for the first i32 argument and an i32 return value)

Should return NULL in the case that the calling convention does not have this property

Definition at line 108 of file ARMBaseRegisterInfo.cpp.

References llvm::CallingConv::GHC, llvm::ARMSubtarget::isAAPCS_ABI(), llvm::ARMSubtarget::isTargetIOS(), and STI.

bool ARMBaseRegisterInfo::hasBasePointer

(

const MachineFunction &

MF

)

const

Definition at line 311 of file ARMBaseRegisterInfo.cpp.

References llvm::MachineFunction::getFrameInfo(), llvm::TargetSubtargetInfo::getFrameLowering(), llvm::MachineFunction::getInfo(), llvm::MachineFrameInfo::getLocalFrameSize(), llvm::MachineFunction::getSubtarget(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::ARMFunctionInfo::isThumb2Function(), llvm::ARMFunctionInfo::isThumbFunction(), and needsStackRealignment().

Referenced by llvm::Thumb1RegisterInfo::eliminateFrameIndex(), llvm::Thumb1FrameLowering::emitPrologue(), llvm::ARMFrameLowering::emitPrologue(), getReservedRegs(), llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::ARMFrameLowering::ResolveFrameIndexReference().

bool ARMBaseRegisterInfo::isFrameOffsetLegal	(	const MachineInstr *	MI,
		int64_t	Offset
	)		const [override]

Definition at line 641 of file ARMBaseRegisterInfo.cpp.

References llvm::ARMII::AddrMode2, llvm::ARMII::AddrMode3, llvm::ARMII::AddrMode4, llvm::ARMII::AddrMode5, llvm::ARMII::AddrMode6, llvm::ARMII::AddrMode_i12, llvm::ARMII::AddrModeMask, llvm::ARMII::AddrModeT1_s, llvm::ARMII::AddrModeT2_i12, llvm::ARMII::AddrModeT2_i8, llvm::MachineInstr::getDesc(), getFrameIndexInstrOffset(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::isFI(), llvm_unreachable, and llvm::MCInstrDesc::TSFlags.

Referenced by needsFrameBaseReg().

bool llvm::ARMBaseRegisterInfo::isLowRegister

(

unsigned

Reg

)

const

void ARMBaseRegisterInfo::materializeFrameBaseRegister	(	MachineBasicBlock *	MBB,
		unsigned	BaseReg,
		int	FrameIdx,
		int64_t	Offset
	)		const [override]

materializeFrameBaseRegister - Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block.

Definition at line 588 of file ARMBaseRegisterInfo.cpp.

References llvm::AddDefaultCC(), llvm::AddDefaultPred(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::MachineRegisterInfo::constrainRegClass(), llvm::MachineBasicBlock::end(), llvm::MCInstrInfo::get(), llvm::MachineFunction::getInfo(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::TargetInstrInfo::getRegClass(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::MipsISD::Ins, llvm::ARMFunctionInfo::isThumb1OnlyFunction(), llvm::ARMFunctionInfo::isThumbFunction(), and TII.

bool ARMBaseRegisterInfo::mayOverrideLocalAssignment

(

)

const [override]

Code Generation virtual methods...

Definition at line 426 of file ARMBaseRegisterInfo.cpp.

References llvm::ARMSubtarget::isTargetDarwin(), and STI.

bool ARMBaseRegisterInfo::needsFrameBaseReg	(	MachineInstr *	MI,
		int64_t	Offset
	)		const [override]

needsFrameBaseReg - Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP. Used by LocalStackFrameAllocation to determine which frame index references it should create new base registers for.

Definition at line 506 of file ARMBaseRegisterInfo.cpp.

References canRealignStack(), llvm::MachineFunction::getFrameInfo(), llvm::TargetSubtargetInfo::getFrameLowering(), llvm::MachineFunction::getInfo(), llvm::MachineFrameInfo::getLocalFrameMaxAlign(), llvm::MachineFrameInfo::getLocalFrameSize(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::TargetFrameLowering::getStackAlignment(), llvm::MachineFunction::getSubtarget(), llvm::TargetFrameLowering::hasFP(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::MachineOperand::isFI(), isFrameOffsetLegal(), llvm::ARMFunctionInfo::isThumb1OnlyFunction(), and llvm::ARMFunctionInfo::isThumbFunction().

bool ARMBaseRegisterInfo::needsStackRealignment

(

const MachineFunction &

MF

)

const [override]

Definition at line 370 of file ARMBaseRegisterInfo.cpp.

References canRealignStack(), F(), llvm::AttributeSet::FunctionIndex, llvm::Function::getAttributes(), llvm::MachineFunction::getFrameInfo(), llvm::TargetSubtargetInfo::getFrameLowering(), llvm::MachineFunction::getFunction(), llvm::MachineFrameInfo::getMaxAlignment(), llvm::TargetFrameLowering::getStackAlignment(), llvm::TargetMachine::getSubtargetImpl(), llvm::MachineFunction::getTarget(), llvm::AttributeSet::hasAttribute(), and llvm::Attribute::StackAlignment.

Referenced by cannotEliminateFrame(), llvm::Thumb1FrameLowering::emitPrologue(), llvm::ARMFrameLowering::emitPrologue(), hasBasePointer(), llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::ARMFrameLowering::ResolveFrameIndexReference().

bool ARMBaseRegisterInfo::requiresFrameIndexScavenging

(

const MachineFunction &

MF

)

const [override]

Definition at line 442 of file ARMBaseRegisterInfo.cpp.

bool ARMBaseRegisterInfo::requiresRegisterScavenging

(

const MachineFunction &

MF

)

const [override]

Definition at line 432 of file ARMBaseRegisterInfo.cpp.

bool ARMBaseRegisterInfo::requiresVirtualBaseRegisters

(

const MachineFunction &

MF

)

const [override]

Definition at line 447 of file ARMBaseRegisterInfo.cpp.

void ARMBaseRegisterInfo::resolveFrameIndex	(	MachineInstr &	MI,
		unsigned	BaseReg,
		int64_t	Offset
	)		const [override]

Reimplemented in llvm::Thumb1RegisterInfo.

Definition at line 613 of file ARMBaseRegisterInfo.cpp.

References llvm::MachineFunction::getInfo(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), llvm::MachineOperand::isFI(), llvm::ARMFunctionInfo::isThumb1OnlyFunction(), llvm::ARMFunctionInfo::isThumb2Function(), llvm::ARMFunctionInfo::isThumbFunction(), llvm::rewriteARMFrameIndex(), llvm::rewriteT2FrameIndex(), and TII.

bool ARMBaseRegisterInfo::shouldCoalesce	(	MachineInstr *	MI,
		const TargetRegisterClass *	SrcRC,
		unsigned	SubReg,
		const TargetRegisterClass *	DstRC,
		unsigned	DstSubReg,
		const TargetRegisterClass *	NewRC
	)		const [override]

SrcRC and DstRC will be morphed into NewRC if this returns true.

Definition at line 787 of file ARMBaseRegisterInfo.cpp.

References llvm::dbgs(), DEBUG, llvm::ARMFunctionInfo::getCoalescedWeight(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::TargetRegisterInfo::getRegClassWeight(), llvm::TargetRegisterClass::getSize(), and llvm::MachineRegisterInfo::getTargetRegisterInfo().

bool ARMBaseRegisterInfo::trackLivenessAfterRegAlloc

(

const MachineFunction &

MF

)

const [override]

Definition at line 437 of file ARMBaseRegisterInfo.cpp.

void ARMBaseRegisterInfo::UpdateRegAllocHint	(	unsigned	Reg,
		unsigned	NewReg,
		MachineFunction &	MF
	)		const [override]

Definition at line 269 of file ARMBaseRegisterInfo.cpp.

References llvm::MachineRegisterInfo::getRegAllocationHint(), llvm::MachineFunction::getRegInfo(), Hint(), llvm::TargetRegisterInfo::isVirtualRegister(), llvm::ARMRI::RegPairEven, llvm::ARMRI::RegPairOdd, and llvm::MachineRegisterInfo::setRegAllocationHint().

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Member Data Documentation

unsigned llvm::ARMBaseRegisterInfo::BasePtr [protected]

BasePtr - ARM physical register used as a base ptr in complex stack frames. I.e., when we need a 3rd base, not just SP and FP, due to variable size stack objects.

Definition at line 93 of file ARMBaseRegisterInfo.h.

Referenced by canRealignStack(), llvm::Thumb1RegisterInfo::eliminateFrameIndex(), getBaseRegister(), and getReservedRegs().

unsigned llvm::ARMBaseRegisterInfo::FramePtr [protected]

FramePtr - ARM physical register used as frame ptr.

Definition at line 88 of file ARMBaseRegisterInfo.h.

Referenced by ARMBaseRegisterInfo(), canRealignStack(), getFrameRegister(), and getReservedRegs().

const ARMSubtarget& llvm::ARMBaseRegisterInfo::STI [protected]

Definition at line 85 of file ARMBaseRegisterInfo.h.

Referenced by ARMBaseRegisterInfo(), avoidWriteAfterWrite(), getCalleeSavedRegs(), getCallPreservedMask(), getRegPressureLimit(), getReservedRegs(), getThisReturnPreservedMask(), and mayOverrideLocalAssignment().

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The documentation for this class was generated from the following files:

• ARMBaseRegisterInfo.h
• ARMBaseRegisterInfo.cpp